公开(公告)号：US20250117264A1

公开(公告)日：2025-04-10

申请号：US18935248

申请日：2024-11-01

Applicant: Intel Corporation

Inventor： Utkarsh Y. KAKAIYA ,  Rajesh M. SANKARAN ,  Sanjay KUMAR ,  Kun TIAN ,  Philip LANTZ

IPC: G06F9/54 ,  G06F9/455 ,  G06F9/48 ,  G06F15/17

Abstract: Techniques for scalable virtualization of an Input/Output (I/O) device are described. An electronic device composes a virtual device comprising one or more assignable interface (AI) instances of a plurality of AI instances of a hosting function exposed by the I/O device. The electronic device emulates device resources of the I/O device via the virtual device. The electronic device intercepts a request from the guest pertaining to the virtual device, and determines whether the request from the guest is a fast-path operation to be passed directly to one of the one or more AI instances of the I/O device or a slow-path operation that is to be at least partially serviced via software executed by the electronic device. For a slow-path operation, the electronic device services the request at least partially via the software executed by the electronic device.

公开(公告)号：US20230251912A1

公开(公告)日：2023-08-10

申请号：US18301733

申请日：2023-04-17

Applicant: Intel Corporation

Inventor： Utkarsh Y. KAKAIYA ,  Rajesh SANKARAN ,  Sanjay KUMAR ,  Kun TIAN ,  Philip LANTZ

IPC: G06F9/50 ,  G06F15/76 ,  H04L51/226

CPC classification number: G06F9/5077 ,  G06F9/5038 ,  G06F15/76 ,  H04L51/226 ,  H04T2001/2093 ,  G06F15/17

Abstract: Techniques for scalable virtualization of an Input/Output (I/O) device are described. An electronic device composes a virtual device comprising one or more assignable interface (AI) instances of a plurality of AI instances of a hosting function exposed by the I/O device. The electronic device emulates device resources of the I/O device via the virtual device. The electronic device intercepts a request from the guest pertaining to the virtual device, and determines whether the request from the guest is a fast-path operation to be passed directly to one of the one or more AI instances of the I/O device or a slow-path operation that is to be at least partially serviced via software executed by the electronic device. For a slow-path operation, the electronic device services the request at least partially via the software executed by the electronic device.

公开(公告)号：US20230040226A1

公开(公告)日：2023-02-09

申请号：US17559612

申请日：2021-12-22

Applicant: INTEL CORPORATION

Inventor： Saurabh GAYEN ,  Dhananjay JOSHI ,  Philip LANTZ ,  Rajesh SANKARAN ,  Narayan RANGANATHAN

IPC: G06F9/48 ,  G06F9/455 ,  G06F9/30

Abstract: Apparatus and method for managing pipeline depth of a data processing device. For example, one embodiment of an apparatus comprises: an interface to receive a plurality of work requests from a plurality of clients; and a plurality of engines to perform the plurality of work requests; wherein the work requests are to be dispatched to the plurality of engines from a plurality of work queues, the work queues to store a work descriptor per work request, each work descriptor to include information needed to perform a corresponding work request, wherein the plurality of work queues include a first work queue to store work descriptors associated with first latency characteristics and a second work queue to store work descriptors associated with second latency characteristics; engine configuration circuitry to configure a first engine to have a first pipeline depth based on the first latency characteristics and to configure a second engine to have a second pipeline depth based on the second latency characteristics.

公开(公告)号：US20200226066A1

公开(公告)日：2020-07-16

申请号：US16833337

申请日：2020-03-27

Applicant: Intel Corporation

Inventor： Eran SHIFER ,  Zeshan A. CHISHTI ,  Sanjay K. KUMAR ,  Zvika GREENFIELD ,  Philip LANTZ ,  Eshel SERLIN ,  Asaf RUBINSTEIN ,  Robert J. ROYER, JR.

IPC: G06F12/0811 ,  G06F12/0882 ,  G06F12/1027 ,  G06F12/02 ,  G06F11/30 ,  G06F1/30

Abstract: An apparatus is described. The apparatus includes a memory controller to interface with a multi-level memory having a near memory and a far memory. The memory controller to maintain first and second caches. The first cache to cache pages recently accessed from the far memory. The second cache to cache addresses of pages recently accessed from the far memory. The second cache having a first level and a second level. The first level to cache addresses of pages that are more recently accessed than pages whose respective addresses are cached in the second level. The memory controller comprising logic circuitry to inform system software that: a) a first page in the first cache that is accessed less than other pages in the first cache is a candidate for migration from the far memory to the near memory; and/or, b) a second page whose address travels a threshold number of round trips between the first and second levels of the second cache is a candidate for migration from the far memory to the near memory.

公开(公告)号：US20200012530A1

公开(公告)日：2020-01-09

申请号：US16351396

申请日：2019-03-12

Applicant: Intel Corporation

Inventor： Utkarsh Y. KAKAIYA ,  Rajesh SANKARAN ,  Sanjay KUMAR ,  Kun TIAN ,  Philip LANTZ

IPC: G06F9/50 ,  H04L12/58

Abstract: Techniques for scalable virtualization of an Input/Output (I/O) device are described. An electronic device composes a virtual device comprising one or more assignable interface (AI) instances of a plurality of AI instances of a hosting function exposed by the I/O device. The electronic device emulates device resources of the I/O device via the virtual device. The electronic device intercepts a request from the guest pertaining to the virtual device, and determines whether the request from the guest is a fast-path operation to be passed directly to one of the one or more AI instances of the I/O device or a slow-path operation that is to be at least partially serviced via software executed by the electronic device. For a slow-path operation, the electronic device services the request at least partially via the software executed by the electronic device.

公开(公告)号：US20190114196A1

公开(公告)日：2019-04-18

申请号：US16211950

申请日：2018-12-06

Applicant: Intel Corporation

Inventor： Mitu AGGARWAL ,  Nrupal JANI ,  Manasi DEVAL ,  Kiran PATIL ,  Parthasarathy SARANGAM ,  Rajesh M. SANKARAN ,  Sanjay K. KUMAR ,  Utkarsh Y. KAKAIYA ,  Philip LANTZ ,  Kun TIAN

IPC: G06F9/455 ,  G06F9/48

Abstract: Examples include a method of live migrating a virtual device by creating a virtual device in a virtual machine, creating first and second interfaces for the virtual device, transferring data over the first interface, detecting a disconnection of the virtual device from the virtual machine, switching data transfers for the virtual device from the first interface to the second interface, detecting a reconnection of the virtual device to the virtual machine, and switching data transfers for the virtual device from the second interface to the first interface.

公开(公告)号：US20190107965A1

公开(公告)日：2019-04-11

申请号：US16211930

申请日：2018-12-06

Applicant: Intel Corporation

Inventor： Manasi DEVAL ,  Nrupal JANI ,  Parthasarathy SARANGAM ,  Mitu AGGARWAL ,  Kiran PATIL ,  Rajesh M. SANKARAN ,  Sanjay K. KUMAR ,  Utkarsh Y. KAKAIYA ,  Philip LANTZ ,  Kun TIAN

IPC: G06F3/06 ,  G06F13/16 ,  G06F13/42

Abstract: Examples may include a method of protecting memory and I/O transactions. The method includes allocating memory for an application, assigning a resource of a physical device to the application, assigning a process address space identifier to the assigned resource, creating a security enclave to protect the allocated memory of the application, and associating the security enclave with the process address space identifier to protect the allocated memory and the assigned resource.

公开(公告)号：US20230042934A1

公开(公告)日：2023-02-09

申请号：US17560170

申请日：2021-12-22

Applicant: Intel Corporation

Inventor： Utkarsh Y. KAKAIYA ,  Philip LANTZ ,  Sanjay KUMAR ,  Rajesh SANKARAN ,  Narayan RANGANATHAN ,  Saurabh GAYEN ,  Dhananjay JOSHI ,  Nikhil P. RAO

IPC: G06F11/07

Abstract: Apparatus and method for high-performance page fault handling. For example, one embodiment of an apparatus comprises: one or more accelerator engines to process work descriptors submitted by clients to a plurality of work queues; fault processing hardware logic associated with the one or more accelerator engines, the fault processing hardware logic to implement a specified page fault handling mode for each work queue of the plurality of work queues, the page fault handling modes including a first page fault handling mode and a second page fault handling mode.

公开(公告)号：US20220261178A1

公开(公告)日：2022-08-18

申请号：US17688710

申请日：2022-03-07

Applicant: Intel Corporation

Inventor： Shaopeng HE ,  Yadong LI ,  Anjali Singhai JAIN ,  Kun TIAN ,  Yan ZHAO ,  Yaozu DONG ,  Baolu LU ,  Rajesh M. SANKARAN ,  Eliel LOUZOUN ,  Rupin H. VAKHARWALA ,  David HARRIMAN ,  Saurabh GAYEN ,  Philip LANTZ ,  Israel BEN SHAHAR ,  Kenneth G. KEELS

IPC: G06F3/06 ,  G06F12/10

Abstract: Examples described herein relate to a packet processing device that includes circuitry to receive an address translation for a virtual to physical address prior to receipt of a GPUDirect remote direct memory access (RDMA) operation, wherein the address translation is provided at initiation of a process executed by a host system and circuitry to apply the address translation for a received GPUDirect RDMA operation.

公开(公告)号：US20220027207A1

公开(公告)日：2022-01-27

申请号：US17361932

申请日：2021-06-29

Applicant: Intel Corporation

Inventor： Utkarsh Y. KAKAIYA ,  Rajesh SANKARAN ,  Sanjay KUMAR ,  Kun TIAN ,  Philip LANTZ

IPC: G06F9/50 ,  H04L12/58 ,  G06F15/76

Abstract: Techniques for scalable virtualization of an Input/Output (I/O) device are described. An electronic device composes a virtual device comprising one or more assignable interface (AI) instances of a plurality of AI instances of a hosting function exposed by the I/O device. The electronic device emulates device resources of the I/O device via the virtual device. The electronic device intercepts a request from the guest pertaining to the virtual device, and determines whether the request from the guest is a fast-path operation to be passed directly to one of the one or more AI instances of the I/O device or a slow-path operation that is to be at least partially serviced via software executed by the electronic device. For a slow-path operation, the electronic device services the request at least partially via the software executed by the electronic device.