公开(公告)号：US12045640B2

公开(公告)日：2024-07-23

申请号：US16909084

申请日：2020-06-23

Applicant: Intel Corporation

Inventor： Sanjay K. Kumar ,  Philip Lantz ,  Rajesh Sankaran ,  Narayan Ranganathan ,  Saurabh Gayen ,  David A. Koufaty ,  Utkarsh Y. Kakaiya

IPC: G06F9/455 ,  G06F9/34 ,  G06F9/48 ,  G06F12/10 ,  G06F12/109 ,  G06F12/14

CPC classification number: G06F9/45558 ,  G06F9/342 ,  G06F9/4875 ,  G06F12/10 ,  G06F12/109 ,  G06F12/1441 ,  G06F2009/45579 ,  G06F2009/45583 ,  G06F12/145 ,  G06F12/1475 ,  G06F12/1483 ,  G06F2212/1016 ,  G06F2212/152 ,  G06F2212/656 ,  G06F2212/657

Abstract: In one embodiment, a data mover accelerator is to receive, from a first agent having a first address space and a first process address space identifier (PASID) to identify the first address space, a first job descriptor comprising a second PASID selector to specify a second PASID to identify a second address space. In response to the first job descriptor, the data mover accelerator is to securely access the first address space and the second address space. Other embodiments are described and claimed.

公开(公告)号：US20220414020A1

公开(公告)日：2022-12-29

申请号：US17899912

申请日：2022-08-31

Applicant: Intel Corporation

Inventor： Rupin H. Vakharwala ,  Philip Lantz ,  David J. Harriman

IPC: G06F12/1027 ,  G06F12/0891

Abstract: In an embodiment, a core includes at least one execution circuit. The core may be configured to: send a command for a first address translation cache (ATC) of a first device to perform an operation, the core to send the command to a first device queue of a shared memory, the first device queue associated with the first ATC; and send a register write directly to the first device to inform the first ATC regarding presence of the command in the first device queue. Other embodiments are described and claimed.

公开(公告)号：US11513924B2

公开(公告)日：2022-11-29

申请号：US16211934

申请日：2018-12-06

Applicant: Intel Corporation

Inventor： Nrupal Jani ,  Manasi Deval ,  Anjali Singhai Jain ,  Parthasarathy Sarangam ,  Mitu Aggarwal ,  Neerav Parikh ,  Alexander H. Duyck ,  Kiran Patil ,  Rajesh M. Sankaran ,  Sanjay K. Kumar ,  Utkarsh Y. Kakaiya ,  Philip Lantz ,  Kun Tian

IPC: G06F9/455 ,  G06F11/20 ,  G06F3/06 ,  G06F13/16 ,  G06F13/42 ,  G06F13/40 ,  G06F15/173 ,  G06F9/48

Abstract: Examples may include a method of instantiating a virtual machine; instantiating a virtual device to transmit data to and receive data from assigned resources of a shared physical device by receiving input data requesting assigned resources for the virtual device, allocating assigned resources to the virtual device based at least in part on the input data, and mapping a page location in an address space of the shared physical device for a selected one of the assigned resources to a page location in a memory-mapped input/output (MMIO) space of the virtual device; and assigning the virtual device to the virtual machine, the virtual machine to transmit data to and receive data from the physical device via the MMIO space of the virtual device.

公开(公告)号：US12117910B2

公开(公告)日：2024-10-15

申请号：US17868596

申请日：2022-07-19

Applicant: Intel Corporation

Inventor： Nrupal Jani ,  Manasi Deval ,  Anjali Singhai Jain ,  Parthasarathy Sarangam ,  Mitu Aggarwal ,  Neerav Parikh ,  Alexander H. Duyck ,  Kiran Patil ,  Rajesh M. Sankaran ,  Sanjay K. Kumar ,  Utkarsh Y. Kakaiya ,  Philip Lantz ,  Kun Tian

IPC: G06F11/20 ,  G06F3/06 ,  G06F9/455 ,  G06F9/48 ,  G06F13/16 ,  G06F13/40 ,  G06F13/42 ,  G06F15/173

CPC classification number: G06F11/2023 ,  G06F3/0622 ,  G06F3/0631 ,  G06F3/0659 ,  G06F3/0673 ,  G06F9/45558 ,  G06F9/4856 ,  G06F11/2007 ,  G06F13/1668 ,  G06F13/4068 ,  G06F13/4221 ,  G06F13/4282 ,  G06F15/17331 ,  G06F2009/45562 ,  G06F2009/4557 ,  G06F2009/45579 ,  G06F2009/45583 ,  G06F2009/45595 ,  G06F2201/805 ,  G06F2201/815 ,  G06F2213/0026

Abstract: Examples may include a method of instantiating a virtual machine, instantiating a virtual device to transmit data to and receive data from assigned resources of a shared physical device; and assigning the virtual device to the virtual machine, the virtual machine to transmit data to and receive data from the physical device via the virtual device.

公开(公告)号：US11573870B2

公开(公告)日：2023-02-07

申请号：US16211924

申请日：2018-12-06

Applicant: Intel Corporation

Inventor： Manasi Deval ,  Nrupal Jani ,  Anjali Singhai Jain ,  Parthasarathy Sarangam ,  Mitu Aggarwal ,  Neerav Parikh ,  Kiran Patil ,  Rajesh M. Sankaran ,  Sanjay K. Kumar ,  Utkarsh Y. Kakaiya ,  Philip Lantz ,  Kun Tian

IPC: G06F11/20 ,  G06F9/455 ,  G06F13/42 ,  G06F9/48 ,  G06F13/40 ,  G06F15/173 ,  G06F3/06 ,  G06F13/16 ,  G06F9/50 ,  G06F21/60 ,  G06F9/54

Abstract: Examples may include a computing platform having a host driver to get a packet descriptor of a received packet stored in a receive queue and to modify the packet descriptor from a first format to a second format. The computing platform also includes a guest virtual machine including a guest driver coupled to the host driver, the guest driver to receive the modified packet descriptor and to read a packet buffer stored in the receive queue using the modified packet descriptor, the packet buffer corresponding to the packet descriptor.

公开(公告)号：US20210406199A1

公开(公告)日：2021-12-30

申请号：US16912542

申请日：2020-06-25

Applicant: Intel Corporation

Inventor： Michael Kounavis ,  David Koufaty ,  Anna Trikalinou ,  Karanvir Grewal ,  Philip Lantz ,  Utkarsh Y. Kakaiya ,  Vedvyas Shanbhogue

IPC: G06F12/14 ,  G06F12/1036 ,  G06F12/1081 ,  G06F12/0831 ,  G06F12/0882 ,  G06F12/06 ,  G06F21/60 ,  H04L9/32

Abstract: Embodiments are directed to providing a secure address translation service. An embodiment of a system includes a memory for storage of data, an Input/Output Memory Management Unit (IOMMU) coupled to the memory via a host-to-device link the IOMMU to perform operations, comprising receiving an address translation request from a remote device via a host-to-device link, wherein the address translation request comprises a virtual address (VA), determining a physical address (PA) associated with the virtual address (VA), generating an encrypted physical address (EPA) using at least the physical address (PA) and a cryptographic key, and sending the encrypted physical address (EPA) to the remote device via the host-to-device link.

公开(公告)号：US20200310993A1

公开(公告)日：2020-10-01

申请号：US16370587

申请日：2019-03-29

Applicant: INTEL CORPORATION

Inventor： Sanjay Kumar ,  David Koufaty ,  Philip Lantz ,  Pratik Marolia ,  Rajesh Sankaran ,  Koen Koning

IPC: G06F13/16 ,  G06F12/1027 ,  G06F3/06

Abstract: The present disclosure is directed to systems and methods sharing memory circuitry between processor memory circuitry and accelerator memory circuitry in each of a plurality of peer-to-peer connected accelerator units. Each of the accelerator units includes physical-to-virtual address translation circuitry and migration circuitry. The physical-to-virtual address translation circuitry in each accelerator unit includes pages for each of at least some of the plurality of accelerator units. The migration circuitry causes the transfer of data between the processor memory circuitry and the accelerator memory circuitry in each of the plurality of accelerator circuits. The migration circuitry migrates and evicts data to/from accelerator memory circuitry based on statistical information associated with accesses to at least one of: processor memory circuitry or accelerator memory circuitry in one or more peer accelerator circuits. Thus, the processor memory circuitry and accelerator memory circuitry may be dynamically allocated to advantageously minimize system latency attributable to data access operations.

公开(公告)号：US11907744B2

公开(公告)日：2024-02-20

申请号：US16911445

申请日：2020-06-25

Applicant: Intel Corporation

Inventor： Utkarsh Y. Kakaiya ,  Sanjay K. Kumar ,  Philip Lantz ,  Gilbert Neiger ,  Rajesh Sankaran ,  Vedvyas Shanbhogue

IPC: G06F9/455 ,  G06F9/30 ,  G06F9/50 ,  G06F9/54

CPC classification number: G06F9/45558 ,  G06F9/30098 ,  G06F9/5005 ,  G06F9/546 ,  G06F2009/4557 ,  G06F2009/45579

Abstract: In one embodiment, a processor comprises: a first configuration register to store quality of service (QoS) information for a process address space identifier (PASID) value associated with a first process; and an execution circuit coupled to the first configuration register, where the execution circuit, in response to a first instruction, is to obtain command data from a first location identified in a source operand of the first instruction, insert the QoS information and the PASID value into the command data, and send a request comprising the command data to a device coupled to the processor, to enable the device to use the QoS information of a plurality of requests to manage sharing between a plurality of processes. Other embodiments are described and claimed.

公开(公告)号：US20230185603A1

公开(公告)日：2023-06-15

申请号：US17551166

申请日：2021-12-14

Applicant: Intel Corporation

Inventor： Saurabh Gayen ,  Philip Lantz ,  Narayan Ranganathan ,  Dhananjay Joshi ,  Rajesh Sankaran ,  Utkarsh Kakaiya

IPC: G06F9/48 ,  G06Q30/02

CPC classification number: G06F9/4881 ,  G06Q30/0283

Abstract: Methods and apparatus relating to dynamic capability discovery and enforcement for accelerators and devices in multi-tenant systems are described. In an embodiment, a hardware accelerator device advertises one or more available operations and/or capabilities of the hardware accelerator device to one or more tenants. Logic circuitry controls access to the one or more available operations and/or capabilities of the one or more work queues on a per-tenant basis. Other embodiments are also disclosed and claimed.

公开(公告)号：US11556436B2

公开(公告)日：2023-01-17

申请号：US16211930

申请日：2018-12-06

Applicant: Intel Corporation

Inventor： Manasi Deval ,  Nrupal Jani ,  Parthasarathy Sarangam ,  Mitu Aggarwal ,  Kiran Patil ,  Rajesh M. Sankaran ,  Sanjay K. Kumar ,  Utkarsh Y. Kakaiya ,  Philip Lantz ,  Kun Tian

IPC: G06F11/20 ,  G06F3/06 ,  G06F13/16 ,  G06F13/42 ,  G06F13/40 ,  G06F15/173 ,  G06F9/455 ,  G06F9/48

Abstract: Examples may include a method of protecting memory and I/O transactions. The method includes allocating memory for an application, assigning a resource of a physical device to the application, assigning a process address space identifier to the assigned resource, creating a security enclave to protect the allocated memory of the application, and associating the security enclave with the process address space identifier to protect the allocated memory and the assigned resource.