公开(公告)号：US09552316B2

公开(公告)日：2017-01-24

申请号：US14229870

申请日：2014-03-29

Applicant: INTEL CORPORATION

Inventor： Nathaniel L. Desimone ,  Robert E. Gough ,  Sean C. Dardis

IPC: G06F13/38 ,  G06F9/44 ,  G06F13/42

CPC classification number: G06F9/4411 ,  G06F9/4406 ,  G06F13/382 ,  G06F13/385 ,  G06F13/387 ,  G06F13/4221 ,  G06F13/4282

Abstract: Techniques for adaptive interface support are described. In one embodiment, for example, an apparatus may comprise logic, at least a portion of which is in hardware, the logic to execute a basic input/output system (BIOS), determine a respective impedance state for each of one or more pins in an M.2 physical interface, determine an interface type for a peripheral device coupled with the M.2 physical interface based on the impedance states for the one or more pins, and control an operational state of the peripheral device during execution of the BIOS, based on the interface type for the peripheral device. Other embodiments are described and claimed.

Abstract translation: 描述了自适应接口支持的技术。 在一个实施例中，例如，设备可以包括其硬件中的至少一部分的逻辑，用于执行基本输入/输出系统（BIOS）的逻辑，为每个的一个或多个引脚确定相应的阻抗状态 M.2物理接口，基于一个或多个引脚的阻抗状态确定与M.2物理接口耦合的外围设备的接口类型，并且在BIOS的执行期间控制外围设备的操作状态， 基于外围设备的接口类型。 描述和要求保护其他实施例。

公开(公告)号：US10571992B2

公开(公告)日：2020-02-25

申请号：US15634805

申请日：2017-06-27

Applicant: INTEL CORPORATION

Inventor： Robert E. Gough ,  Mazen G. Gedeon ,  Barnes Cooper ,  Basavaraj B. Astekar ,  Sean C. Dardis

IPC: G06F1/32 ,  G06F1/3234 ,  G06F1/3231 ,  G06F1/3293

Abstract: An electronic device may be provided that includes a first controller, a second controller, and a bus to connect between the first controller and the second controller. The electronic device may also include a first signal line between the first controller and the second controller, and the first controller to provide a first signal on the first signal line to the second controller to wake up the second controller from a low power mode.

公开(公告)号：US10224003B1

公开(公告)日：2019-03-05

申请号：US15721056

申请日：2017-09-29

Applicant: Intel Corporation

Inventor： James E. Akiyama ,  Sean C. Dardis ,  Srikanth Kambhatla

IPC: G09G5/36 ,  G06T1/20 ,  G09G5/00 ,  G06T15/00 ,  G06F15/78

Abstract: Systems, apparatuses and methods may provide for technology that based on information from a connected display device, forms a determination whether to connect a discrete graphics processor or an integrated graphics processor to the connected display device, the information corresponding to whether the connected display device is to be driven by the integrated graphics processor or the discrete graphics processor.

公开(公告)号：US09965293B2

公开(公告)日：2018-05-08

申请号：US15394922

申请日：2016-12-30

Applicant: INTEL CORPORATION

Inventor： Nathaniel L. Desimone ,  Robert E. Gough ,  Sean C. Dardis

IPC: G06F9/44 ,  G06F13/38 ,  G06F13/42

CPC classification number: G06F9/4411 ,  G06F9/4406 ,  G06F13/382 ,  G06F13/385 ,  G06F13/387 ,  G06F13/4221 ,  G06F13/4282

Abstract: Techniques for adaptive interface support are described. In one embodiment, for example, an apparatus may comprise logic, at least a portion of which is in hardware, the logic to execute a basic input/output system (BIOS), determine a respective impedance state for each of one or more pins in an M.2 physical interface, determine an interface type for a peripheral device coupled with the M.2 physical interface based on the impedance states for the one or more pins, and control an operational state of the peripheral device during execution of the BIOS, based on the interface type for the peripheral device. Other embodiments are described and claimed.

公开(公告)号：US09696785B2

公开(公告)日：2017-07-04

申请号：US14142791

申请日：2013-12-28

Applicant: INTEL CORPORATION

Inventor： Robert E. Gough ,  Mazen G. Gedeon ,  Barnes Cooper ,  Basavaraj B. Astekar ,  Sean C. Dardis

IPC: G06F1/32

CPC classification number: G06F1/3234 ,  G06F1/3231 ,  G06F1/3253 ,  G06F1/3293 ,  Y02D10/122 ,  Y02D10/151 ,  Y02D10/173 ,  Y02D50/20

Abstract: An electronic device may be provided that includes a first controller, a second controller, and a bus to connect between the first controller and the second controller. The electronic device may also include a first signal line between the first controller and the second controller, and the first controller to provide a first signal on the first signal line to the second controller to wake up the second controller from a low power mode.