Abstract:
Embodiments provided herein describe solid-state lithium batteries and methods for forming such batteries. A first current collector is provided. A first layer is formed above the first current collector. The first layer includes lithium and cobalt. The first layer is annealed. A second layer is formed above the annealed first layer. The second layer includes lithium and cobalt, and the annealed first layer and the second layer jointly form a first electrode. An electrolyte is formed above the first electrode. A second electrode is formed above the electrolyte. A second current collector is formed above the second electrode.
Abstract:
Embodiments provided herein describe solid-state lithium batteries and methods for forming such batteries. A layer stack may be formed between a substrate of the batteries and a current collector of the batteries. A texturing may be provided to at least one of the components of the batteries to increase the interfacial area between the components. At least one of conductive metal oxides, conductive metal nitrides, conductive metal carbides, or a combination thereof may be used to form a current collector of the batteries.
Abstract:
Optical absorbers and methods are disclosed. The methods comprise depositing a plurality of precursor layers comprising one or more of Cu, Ga, and In on a substrate, and heating the layers in a chalcogenizing atmosphere. The plurality of precursor layers can be one or more sets of layers comprising at least two layers, wherein each layer in each set of layers comprises one or more of Cu, Ga, and In exhibiting a single phase. The layers can be deposited using two or three targets selected from Ag and In containing less than 21% In by weight, Cu and Ga where the Cu and Ga target comprises less than 45% Ga by weight, Cu(In,Ga), wherein the Cu(In,Ga) target has an atomic ratio of Cu to (In+Ga) greater than 2 and an atomic ratio of Ga to (Ga+In) greater than 0.5, elemental In, elemental Cu, and In2Se3 and In2S3.
Abstract:
A gradient in the composition of at least one of the elements of a metal-based semiconductor layer is introduced as a function of depth through the layer. The gradient(s) influence the current density response of the device at different gate voltages. In some embodiments, the composition of an element (e.g. Ga) is greater at the interface between the metal-based semiconductor layer and the source/drain layers. The shape of the gradient profile is one of linear, stepped, parabolic, exponential, and the like.
Abstract:
Embodiments provided herein describe solid-state lithium batteries and methods for forming such batteries. A first current collector is provided. A first electrode is formed above the first current collector. The first electrode includes lithium and cobalt and is formed using PVD in a gaseous environment including at least 96% argon. An electrolyte is formed above the first electrode. A second electrode is formed above the electrolyte. A second current collector is formed above the second electrode.
Abstract:
Methods for HPC techniques are applied to the processing of site-isolated regions (SIR) on a substrate to form at least a portion of a TFT device used in display applications. The processing may be applied to at least one of gate dielectric deposition, gate dielectric patterning, metal-based semiconductor deposition, metal-based patterning, etch stop deposition, etch stop patterning, source/drain deposition, or source/drain patterning. The SIRs may be defined during the deposition process with uniform deposition within each SIR or the SIRs may be defined subsequent to the deposition of layers wherein the layers are deposited with a gradient in one or more properties across the substrate.
Abstract:
Methods for HPC techniques are applied to the processing of site-isolated regions (SIR) on a substrate to form at least a portion of a TFT device used in display applications. The processing may be applied to at least one of gate dielectric deposition, gate dielectric patterning, metal-based semiconductor (e.g. ZnOx, ZnSnOx, ZnInOx, or ZnGaOx) deposition, metal-based semiconductor (e.g. ZnOx, ZnSnOx, ZnInOx, or ZnGaOx) patterning, etch stop deposition, etch stop patterning, source/drain deposition, or source/drain patterning. The SIRs may be defined during the deposition process with uniform deposition within each SIR or the SIRs may be defined subsequent to the deposition of layers wherein the layers are deposited with a gradient in one or more properties across the substrate.
Abstract:
Methods of forming absorber layers in a TFPV device are provided. Methods are described to provide the formation of metal oxide films and heating the metal oxide films in the presence of a chalcogen to form a metal-oxygen-chalcogen alloy. Methods are described to provide the formation of metal oxide films, forming a layer of elemental chalcogen on the metal oxide film, and heating the stack to form a metal-oxygen-chalcogen alloy. In some embodiments, the metal oxide film includes zinc oxide and the chalcogen includes selenium.
Abstract:
Methods and formulations for the selective etching of etch stop layers deposited above metal-based semiconductor layers used in the manufacture of TFT-based display devices are presented. The formulations are based on an alkaline solution. Methods and formulations for the selective etching of molybdenum-based and/or copper-based source/drain electrode layers deposited above metal-based semiconductor layers used in the manufacture of TFT-based display devices are presented. The formulations are based on an alkaline solution.
Abstract:
Methods for increasing the power output of a TFPV solar panel using thin absorber layers comprise techniques for roughening and/or texturing the back contact layer. The techniques comprise roughening the substrate prior to the back contact deposition, embedding particles in sol-gel films formed on the substrate, and forming multicomponent, polycrystalline films that result in a roughened surface after a wet etch step, etc.