公开(公告)号：US20140159163A1

公开(公告)日：2014-06-12

申请号：US13968570

申请日：2013-08-16

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： JIN CAI ,  KEVIN K. CHAN ,  ROBERT H. DENNARD ,  BRUCE B. DORIS ,  BARRY P. LINDER ,  RAMACHANDRAN MURALIDHAR ,  GHAVAM G. SHAHIDI

IPC: H01L27/088

CPC classification number: H01L29/785 ,  H01L21/823821 ,  H01L27/0886 ,  H01L27/0924 ,  H01L29/66795 ,  H01L29/7851

Abstract: A method for forming a fin transistor in a bulk substrate includes forming a super steep retrograde well (SSRW) on a bulk substrate. The well includes a doped portion of a first conductivity type dopant formed below an undoped layer. A fin material is grown over the undoped layer. A fin structure is formed from the fin material, and the fin material is undoped or doped. Source and drain regions are provided adjacent to the fin structure to form a fin field effect transistor.

Abstract translation: 一种用于在体衬底中形成翅片晶体管的方法包括在大容量衬底上形成超陡逆行阱（SSRW）。 该阱包括在未掺杂层下形成的第一导电型掺杂剂的掺杂部分。 翅片材料生长在未掺杂的层上。 鳍状结构由翅片材料形成，翅片材料是未掺杂的或掺杂的。 源极和漏极区域邻近翅片结构设置以形成鳍状场效应晶体管。

公开(公告)号：US20150236118A1

公开(公告)日：2015-08-20

申请号：US14699859

申请日：2015-04-29

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： KEVIN K. CHAN ,  YOUNG-HEE KIM ,  ISAAC LAUER ,  RAMACHANDRAN MURALIDHAR ,  DAE-GYU PARK ,  XINHUI WANG ,  MIN YANG

IPC: H01L29/66 ,  H01L29/45 ,  H01L29/78 ,  H01L29/08 ,  H01L21/225 ,  H01L21/324

CPC classification number: H01L21/31 ,  H01L21/0228 ,  H01L21/2252 ,  H01L21/2254 ,  H01L21/3141 ,  H01L21/324 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/365 ,  H01L29/45 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/66803 ,  H01L29/7833 ,  H01L29/7848 ,  H01L29/785

Abstract: Field effect transistors fabricated using atomic layer doping processes are disclosed. In accordance with an embodiment of an atomic layer doping method, a semiconducting surface and a dopant gas mixture are prepared. Further, a dopant layer is grown on the semiconducting surface by applying the dopant gas mixture to the semiconducting surface under a pressure that is less than 500 Torr and a temperature that is between 300° C. and 750° C. The dopant layer includes at least 4×1020 active dopant atoms per cm3 that react with atoms on the semiconducting surface such that the reacted atoms increase the conductivity of the semiconducting surface.

Abstract translation: 公开了使用原子层掺杂工艺制造的场效应晶体管。 根据原子层掺杂方法的实施方案，制备半导体表面和掺杂剂气体混合物。 此外，通过在小于500托的压力和300℃至750℃的温度下将掺杂剂气体混合物施加到半导体表面，在半导体表面上生长掺杂剂层。掺杂剂层包括在 与半导体表面上的原子反应的每立方厘米的最小4×10 20有源掺杂剂原子使得反应的原子增加了半导体表面的导电性。

公开(公告)号：US20150014752A1

公开(公告)日：2015-01-15

申请号：US13941124

申请日：2013-07-12

Applicant: International Business Machines Corporation

Inventor： CHRISTOPHER P. D'EMIC ,  RAMACHANDRAN MURALIDHAR ,  PHILIP J. OLDIGES ,  SUFI ZAFAR

IPC: G01N27/414 ,  H01L29/66

CPC classification number: G01N27/4145 ,  G01N27/4146 ,  G01N33/48721

Abstract: A thin body field effect transistor (FET) nanopore sensor includes a silicon on insulator (SOI) structure having an annular shape and comprising a source, a drain and a thin body channel interposed therebetween. A nanopore is formed in a central opening of the SOI structure. A gate dielectric is disposed on the SOI structure insulating the SOI structure from a liquid gate within the nanopore. A back gate is formed around the SOI structure. A shallow trench isolation (STI) layer is formed between the SOI structure and the back gate.

Abstract translation: 薄体场效应晶体管（FET）纳米孔传感器包括具有环形形状的绝缘体上硅（SOI）结构，并且包括源极，漏极和介于其间的薄体通道。 在SOI结构的中心开口形成纳米孔。 栅极电介质设置在SOI结构上，使SOI结构与纳米孔内的液体栅极绝缘。 在SOI结构周围形成背栅。 在SOI结构和后门之间形成浅沟槽隔离（STI）层。

公开(公告)号：US20140159162A1

公开(公告)日：2014-06-12

申请号：US13708531

申请日：2012-12-07

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： JIN CAI ,  KEVIN K. CHAN ,  ROBERT H. DENNARD ,  BRUCE B. DORIS ,  BARRY P. LINDER ,  RAMACHANDRAN MURALIDHAR ,  GHAVAM G. SHAHIDI

IPC: H01L29/78 ,  H01L29/66

CPC classification number: H01L29/785 ,  H01L21/823821 ,  H01L27/0886 ,  H01L27/0924 ,  H01L29/66795 ,  H01L29/7851

Abstract: A method for forming a fin transistor in a bulk substrate includes forming a super steep retrograde well (SSRW) on a bulk substrate. The well includes a doped portion of a first conductivity type dopant formed below an undoped layer. A fin material is grown over the undoped layer. A fin structure is formed from the fin material, and the fin material is undoped or doped. Source and drain regions are provided adjacent to the fin structure to form a fin field effect transistor.