公开(公告)号：US5974102A

公开(公告)日：1999-10-26

申请号：US929692

申请日：1997-09-15

申请人： Ik Soo Eo ,  Kwang Il Yeon ,  In Gi Lim

发明人： Ik Soo Eo ,  Kwang Il Yeon ,  In Gi Lim

IPC分类号： H03K19/003 ,  G06F5/06 ,  H04L7/00 ,  H04L7/02

CPC分类号： H04L7/02 ,  G06F5/06 ,  H04L7/0008

摘要： In case microcontroller and digital signal processing blocks are used together in one chip, there has been a problem in which the synchronization of the clocks are not consistent with each other when sending a signal from one block to another. In addition, when a reference clock is activated during a change of input signal, an incomplete interval has occurred. Accordingly, in order to solve the above mentioned problem, the present invention discloses a synchronizing circuit which uses a latch circuit("RS") consisted of NAND gates to synchronize an asynchronous input data and a reference clock, thereby solving the problem in which an incomplete interval occurs.

摘要翻译： 在单片机和数字信号处理块在一个芯片中一起使用的情况下，存在当从一个块向另一个块发送信号时时钟的同步彼此不一致的问题。 另外，当在输入信号变化期间激活参考时钟时，发生了不完整的间隔。 因此，为了解决上述问题，本发明公开了一种使用由NAND门构成的锁存电路（“RS”）同步异步输入数据和参考时钟的同步电路，由此解决了 不完整间隔发生。

公开(公告)号：US6069574A

公开(公告)日：2000-05-30

申请号：US138545

申请日：1998-08-24

申请人： Ik Soo Eo ,  Kwang Il Yeon ,  Kyung Soo Kim

发明人： Ik Soo Eo ,  Kwang Il Yeon ,  Kyung Soo Kim

IPC分类号： H03K3/84 ,  H04J11/00 ,  H04J13/00 ,  H04J13/12 ,  H04L23/00 ,  H03M7/00 ,  G06K9/36 ,  G06F15/332

CPC分类号： H04J13/0048 ,  H04J13/10 ,  H04B1/707

摘要： A hadamard code generation circuit is disclosed. The circuit includes a start reset signal generator for generating a start reset signal START.sub.-- RESET when a 6-bit output signal REF.sub.-- C from the 6-bit reference counter, a higher 4-bit index output signal H(5:2) of the 6-bit register and a 2-bit value from a ground circuit are identical; a "0" value force allocation unit for outputting a FORCE.sub.-- 0.sub.-- DEL signal for forcibly allocating all values of the 0th column to "0" when a 4-bit output signal REF.sub.-- C (5:2) from the 6-bit reference counter and a 4-bit value from the ground circuit are identical; a 2-bit counter for receiving the start reset signal and an external clock signal, outputting lowest bit signals C1 and C0 and outputting a carry-out signal; a 4-bit counter operated in accordance with a result that an inverted FORCE.sub.-- 0 signal and a carry-out signal are ANDed and outputting higher bit signals C4, C3 and C2; a 4th hadamard code generator for logically processing a lower 2-bit output signal from the 2-bit counter and a lower 2-bit index value from the 6-bit register and generating a 4-th hadamard code; a 12th paley code generator for generating a 12th paley code using an output signal from the counter and the FORCE.sub.-- 0.sub.-- DEL signal and the ALL.sub.-- ZERO signal; and a 48th hadamard code generator for logically processing a 4th hadamard code and a 12th paley code and generating a 48th hadamard code.

摘要翻译： 公开了一种hasamard代码生成电路。 该电路包括一个启动复位信号发生器，当来自6位参考计数器的6位输出信号REF-C，较高的4位索引输出信号H（5：2）为 6位寄存器和来自接地电路的2位值相同; 一个“0”值分配单元，用于当来自6位的4位输出信号REF-C（5：2）时输出用于强制分配第0列的所有值的FORCE-0-DEL信号为“0” 参考计数器和来自接地电路的4位值相同; 用于接收起始复位信号的2位计数器和外部时钟信号，输出最低位信号C1和C0并输出进位信号; 根据反相FORCE-0信号和进位信号进行AND运算并输出较高位信号C4，C3和C2的4位计数器; 用于逻辑处理来自2位计数器的较低2位输出信号和来自6位寄存器的较低2位索引值的第4个哈达马斯代码发生器，并生成第4个哈达玛码; 用于使用来自计数器的输出信号和FORCE-0-DEL信号和ALL-ZERO信号来产生第12个Paley码的第12个Paley码发生器; 以及第48个hasamard代码生成器，用于逻辑处理第4个hadamard代码和第12个paley代码，并生成第48个hasamard代码。

公开(公告)号：US20070237246A1

公开(公告)日：2007-10-11

申请号：US11496897

申请日：2006-08-01

申请人： In Gi Lim ,  Hyung Il Park ,  Young Seok Baek ,  Hyuk Kim ,  Tae Joon Kim ,  Kyung Soo Kim ,  Ik Soo Eo ,  Hee Bum Jung

发明人： In Gi Lim ,  Hyung Il Park ,  Young Seok Baek ,  Hyuk Kim ,  Tae Joon Kim ,  Kyung Soo Kim ,  Ik Soo Eo ,  Hee Bum Jung

IPC分类号： H04K1/10

CPC分类号： H04L27/2662 ,  H04L1/0041 ,  H04L1/0045 ,  H04L1/0071 ,  H04L5/06 ,  H04L27/2657

摘要： A wireless modem is mounted to a terminal for wireless communication, and specifically controls an internal drive clock to reduce power consumption in an active mode. The wireless modem includes: a wireless core module for transmitting and receiving a radio signal; a modulator for converting data to be transmitted into a wireless transmission signal and transmitting the converted signal to the wireless core module; a demodulator for converting the signal received from the wireless core module into reception data; a synchronizer for synchronizing the signal received from the wireless core module; and a clock controller for generating a drive clock of each of the modulator, the demodulator, and the synchronizer. A low power clock controller is divided into six main functional blocks of a synchronizer, an analog controller, a modulator, a channel decoder, a demodulator, and a channel encoder, and has a feature that a clock is input only when a main functional block operates. As a result, it is possible to minimize power consumption caused by clock switching when an Orthogonal Frequency Division Multiplexing Access (OFDMA) mobile station modem operates in an active mode through the clock controller.

摘要翻译： 无线调制解调器被安装到用于无线通信的终端，并且具体地控制内部驱动时钟以降低活动模式中的功耗。 无线调制解调器包括：用于发送和接收无线电信号的无线核心模块; 用于将要发送的数据转换成无线发送信号并将转换的信号发送到无线核心模块的调制器; 解调器，用于将从无线核心模块接收的信号转换为接收数据; 用于使从所述无线核心模块接收的信号同步的同步器; 以及时钟控制器，用于产生调制器，解调器和同步器中的每一个的驱动时钟。 低功率时钟控制器被分为同步器，模拟控制器，调制器，信道解码器，解调器和信道编码器的六个主要功能块，并且具有仅当主功能块 操作。 结果，当正交频分复用接入（OFDMA）移动台调制解调器通过时钟控制器以活动模式操作时，可以最小化由时钟切换引起的功率消耗。

公开(公告)号：US07929620B2

公开(公告)日：2011-04-19

申请号：US11634276

申请日：2006-12-05

申请人： Tae Joon Kim ,  Ik Soo Eo ,  Hee Bum Jung

发明人： Tae Joon Kim ,  Ik Soo Eo ,  Hee Bum Jung

IPC分类号： H04L27/28 ,  H04J11/00

CPC分类号： H04L25/0238 ,  H04L25/0212 ,  H04L25/0248

摘要： A method for stable channel estimation to increase frequency band efficiency that is lost by using a pilot, and to reduce the complexity and the sensitivity to channel zero. The method includes generating an i-th symbol block Si including N carriers, performing an inverse fast Fourier transform (IFFT) operation on the i-th symbol block, and forming an orthogonal frequency division multiplexing (OFDM) symbol block. The method also includes attaching a guard interval sample in front of the i-th OFDM symbol block Ui and forming at least one OFDM symbol block Ui,cp. The method further includes modeling the formed OFDM symbol block Ui,cp with a channel finite impulse response (FIR) filter and estimating channel impulse response using signals yi received through a channel.

摘要翻译： 一种用于稳定信道估计的方法，以增加使用导频丢失的频带效率，并降低对信道零的复杂度和灵敏度。 该方法包括生成包括N个载波的第i个符号块Si，对第i个符号块执行快速傅里叶逆变换（IFFT），并形成正交频分复用（OFDM）符号块。 该方法还包括在第i个OFDM符号块Ui的前面附加保护间隔样本并形成至少一个OFDM符号块U 1，c p。 该方法还包括使用信道有限脉冲响应（FIR）滤波器对形成的OFDM符号块Ui，cp进行建模，并且使用通过信道接收的信号y i来估计信道脉冲响应。

公开(公告)号：US07787555B2

公开(公告)日：2010-08-31

申请号：US11739209

申请日：2007-04-24

申请人： Tae Joon Kim ,  Ik Soo Eo ,  Hyoun Kuk Kim ,  Hyun Cheol Park

发明人： Tae Joon Kim ,  Ik Soo Eo ,  Hyoun Kuk Kim ,  Hyun Cheol Park

IPC分类号： H04K1/10 ,  H04L27/28 ,  H04L1/02 ,  H04B7/02 ,  H04B7/08

CPC分类号： H04B7/0434

摘要： Provided is a receiver of a multi-input multi-output system using multiple antennas, the receiver including: a first multiplying unit for multiplying a vector r received via the antenna by a Hermitian matrix Q; a candidate transmitting vector generating unit for detecting a signal on a lowest modulation order transmitting antenna from the received vector y output from the first multiplying unit, creating as many symbol candidates as the modulation order of the detected signal, and generating a candidate transmitting vector using each symbol candidate; a transmitting vector determining unit for obtaining a distance between each candidate transmitting vector generated by the candidate transmitting vector generating unit and the received vector y to determine a final transmitting vector; and a demodulating unit for demodulating the final transmitting vector determined by the transmitting vector determining unit. Since the receiver detects a transmitting vector with reference to a signal on a lowest modulation order transmitting antenna, the receiver can have a simpler structure.

摘要翻译： 提供了一种使用多个天线的多输入多输出系统的接收机，所述接收机包括：第一乘法单元，用于将通过所述天线接收的矢量r乘以Hermitian矩阵Q; 候选发射矢量产生单元，用于从从第一乘法单元输出的接收矢量y中检测最低调制阶发射天线上的信号，创建与检测信号的调制阶数一样多的符号候选，并使用 每个符号候选人; 发送矢量确定单元，用于获得由候选发射矢量生成单元生成的每个候选发射矢量与接收矢量y之间的距离，以确定最终发射矢量; 以及解调单元，用于解调由发送矢量确定单元确定的最终发送矢量。 由于接收机参考最低调制阶发射天线上的信号检测发射矢量，所以接收机可以具有更简单的结构。

公开(公告)号：US08693581B2

公开(公告)日：2014-04-08

申请号：US13284751

申请日：2011-10-28

申请人： Sang-Kyun Kim ,  Ik Soo Eo ,  Mijeong Park ,  Hyun Kyu Yu

发明人： Sang-Kyun Kim ,  Ik Soo Eo ,  Mijeong Park ,  Hyun Kyu Yu

IPC分类号： H03K9/00 ,  H04L27/00

CPC分类号： H04B1/001 ,  H04B1/0021

摘要： Disclosed is a method for receiving an analog signal from a receiver supporting at least a first channel band and a second channel band. The method for receiving an analog signal includes sampling the analog signal received through an antenna, generating a decimated signal by passing the sampled signal to a CIC decimation filter; and inputting the decimated signal to a channel selection filter.

摘要翻译： 公开了一种从支持至少第一信道频带和第二信道频带的接收机接收模拟信号的方法。 用于接收模拟信号的方法包括对通过天线接收的模拟信号进行采样，通过将采样信号传递给CIC抽取滤波器来产生抽取信号; 并将抽取的信号输入到频道选择滤波器。

公开(公告)号：US20130163699A1

公开(公告)日：2013-06-27

申请号：US13609704

申请日：2012-09-11

申请人： Sang-Kyun Kim ,  Ik Soo Eo ,  Hyun Kyu Yu

发明人： Sang-Kyun Kim ,  Ik Soo Eo ,  Hyun Kyu Yu

IPC分类号： H04B1/16

CPC分类号： H04B1/0017 ,  H04B1/0021

摘要： The present invention relates to a digital front end receiver using a DC offset compensation scheme. The digital front end receiver includes a DC offset compensation filter configured to remove DC offset components from signals received from a digital mixer and a Cascaded Integrator-Comb (CIC) decimation filter configured to reduce a sampling rate of the signals received from the DC offset compensation block.

摘要翻译： 本发明涉及使用DC偏移补偿方案的数字前端接收机。 数字前端接收器包括DC偏移补偿滤波器，其被配置为从数字混频器接收的信号中去除DC偏移分量，并且Cascaded Integrator-Comb（CIC）抽取滤波器被配置为降低从DC偏移补偿接收到的信号的采样率 块。

公开(公告)号：US20120163434A1

公开(公告)日：2012-06-28

申请号：US13331252

申请日：2011-12-20

申请人： Sang-Kyun Kim ,  Mijeong Park ,  Ik Soo Eo ,  Hyun Kyu Yu

发明人： Sang-Kyun Kim ,  Mijeong Park ,  Ik Soo Eo ,  Hyun Kyu Yu

IPC分类号： H04B1/38 ,  H04L27/00

CPC分类号： H04L27/0014 ,  H04B1/0007 ,  H04L25/03114 ,  H04L2027/0024

摘要： This invention is regarding mobile communication digital receiver and operating methods of a digital front end, which uses a digital mixer to change the center frequency to DC; a digital mixer allows the user to evade I/Q mismatch challenges; an Analog-to-Digital Converter (ADC) converts a Radio Frequency analog signal to a digital signal; a digital mixer converts the ADC's output signal's center frequency to DC; a digital front end has an automatic gain control over multiple frequency bands and contains a noise filter; a modem receives the digital front end's output and demodulates the signal.

摘要翻译： 本发明涉及数字前端的移动通信数字接收机和操作方法，其使用数字混频器将中心频率改变为DC; 数字混合器允许用户逃避I / Q不匹配的挑战; 模拟数字转换器（ADC）将射频模拟信号转换为数字信号; 数字混频器将ADC的输出信号的中心频率转换为DC; 数字前端具有对多个频带的自动增益控制，并包含噪声滤波器; 调制解调器接收数字前端的输出并解调信号。

公开(公告)号：US07197065B2

公开(公告)日：2007-03-27

申请号：US10238685

申请日：2002-09-09

申请人： Ik Soo Eo ,  Young Hoon Kim ,  Hee Bum Jung ,  Kyung Soo Kim

发明人： Ik Soo Eo ,  Young Hoon Kim ,  Hee Bum Jung ,  Kyung Soo Kim

IPC分类号： H04B1/69

CPC分类号： H04B1/7077 ,  H04B1/70755

摘要： A region searcher, a method of driving the same, and a code searcher using the same are disclosed. When a predetermined region is iteratively searched, the energy value corresponding to the same hypothesis location value is stored by using a searcher having divided two buffers, thereby the implementation complexity thereof can be remarkably reduced, without using a simple memory.In addition, in case where the region is iteratively searched in the state of the deteriorated signal-to-noise ratio to find the energy value at one hypothesis location and in case where the region must be iteratively searched because of the restriction which the size of the matched filter can be not increased, the implementation complexity thereof can be remarkably reduced.

摘要翻译： 公开了一种区域搜索器，其驱动方法和使用该搜索器的代码搜索器。 当迭代地搜索预定区域时，通过使用具有划分的两个缓冲器的搜索器来存储对应于相同假设位置值的能量值，从而可以显着地减少其实施复杂度，而不使用简单的存储器。

公开(公告)号：US09294135B2

公开(公告)日：2016-03-22

申请号：US13609638

申请日：2012-09-11

申请人： Ik Soo Eo ,  Sang-Kyun Kim ,  Mun Yang Park ,  Seon-Ho Han ,  Hyun Kyu Yu

发明人： Ik Soo Eo ,  Sang-Kyun Kim ,  Mun Yang Park ,  Seon-Ho Han ,  Hyun Kyu Yu

IPC分类号： H04B1/00

CPC分类号： H04B1/0021

摘要： A digital RF receiver does not use a separate receiver according to a mode and a band for multi-mode reception, MIMO reception, and bandwidth extension reception, and changes only setting variables in a single receiver structure so as to implement multi-mode reception, MIMO reception, bandwidth extension reception, and/or simultaneous multi-mode operation, such that complexity of the receiver, development cost, and power consumption can be reduced.

摘要翻译： 数字RF接收机根据用于多模式接收，MIMO接收和带宽扩展接收的模式和频带不使用单独的接收机，并且仅改变单个接收机结构中的设置变量以便实现多模式接收， MIMO接收，带宽扩展接收和/或同时多模式操作，从而可以减少接收机的复杂性，开发成本和功耗。