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公开(公告)号:US12009341B2
公开(公告)日:2024-06-11
申请号:US17564197
申请日:2021-12-28
Applicant: Industrial Technology Research Institute
Inventor: Po-Kai Chiu , Sheng-Tsai Wu , Yu-Min Lin , Wen-Hung Liu , Ang-Ying Lin , Chang-Sheng Chen
IPC: H01L31/0203 , H01L23/00 , H01L23/31 , H01L23/367 , H01L23/498 , H01L23/66 , H01L25/065
CPC classification number: H01L25/0652 , H01L23/3107 , H01L23/367 , H01L23/49811 , H01L23/49822 , H01L23/66 , H01L24/16 , H01L2223/6677 , H01L2224/16227
Abstract: An integrated antenna package structure includes a first redistribution structure, a first chip, a heat dissipation structure, a second chip, and an antenna structure. The first chip is located on a first side of the first redistribution structure, and is electrically connected to the first redistribution structure. The heat dissipation structure is thermally connected to the first chip, and the first chip is located between the heat dissipation structure and the first redistribution structure. The second chip is located on a second side of the first redistribution structure opposite to the first side, and is electrically connected to the first redistribution structure. The antenna structure is electrically connected to the first redistribution structure.
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公开(公告)号:US20230197680A1
公开(公告)日:2023-06-22
申请号:US17564197
申请日:2021-12-28
Applicant: Industrial Technology Research Institute
Inventor: Po-Kai Chiu , Sheng-Tsai Wu , Yu-Min Lin , Wen-Hung Liu , Ang-Ying Lin , Chang-Sheng Chen
IPC: H01L25/065 , H01L23/367 , H01L23/498 , H01L23/66 , H01L23/31 , H01L23/00
CPC classification number: H01L25/0652 , H01L23/367 , H01L23/49822 , H01L23/66 , H01L23/3107 , H01L23/49811 , H01L24/16 , H01L2223/6677 , H01L2224/16227
Abstract: An integrated antenna package structure includes a first redistribution structure, a first chip, a heat dissipation structure, a second chip, and an antenna structure. The first chip is located on a first side of the first redistribution structure, and is electrically connected to the first redistribution structure. The heat dissipation structure is thermally connected to the first chip, and the first chip is located between the heat dissipation structure and the first redistribution structure. The second chip is located on a second side of the first redistribution structure opposite to the first side, and is electrically connected to the first redistribution structure. The antenna structure is electrically connected to the first redistribution structure.
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公开(公告)号:US20240170473A1
公开(公告)日:2024-05-23
申请号:US18347594
申请日:2023-07-06
Applicant: Industrial Technology Research Institute
Inventor: Hao-Che Kao , Wen-Hung Liu , Yu-Min Lin , Ching-Kuan Lee
IPC: H01L25/00 , H01L21/56 , H01L21/683 , H01L23/00 , H01L23/31 , H01L23/373 , H01L23/498 , H01L25/065
CPC classification number: H01L25/50 , H01L21/561 , H01L21/568 , H01L21/6836 , H01L23/3121 , H01L23/3735 , H01L23/49822 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/83 , H01L24/95 , H01L25/0655 , H01L21/4853 , H01L24/16 , H01L24/73 , H01L2221/68381 , H01L2224/16227 , H01L2224/29111 , H01L2224/2919 , H01L2224/32245 , H01L2224/33181 , H01L2224/33505 , H01L2224/73204 , H01L2224/73253 , H01L2924/0665
Abstract: A chip package structure including a heat dissipation base, a first redistribution layer, a second redistribution layer, at least one chip, at least one metal stack, a plurality of conductive structures, and an encapsulant is provided. The second redistribution layer is disposed on the heat dissipation base and thermally coupled to the heat dissipation base. The chip, the metal stack, and the conductive structures are disposed between the second redistribution layer and the first redistribution layer. An active surface of the chip is electrically connected to the first redistribution layer and an inactive surface of the chip is thermally coupled to the second redistribution layer via the metal stack. The first redistribution layer is electrically connected to the second redistribution layer via the conductive structures. The encapsulant is filled between the second redistribution layer and the first redistribution layer. A manufacturing method of a chip package structure is also provided.
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公开(公告)号:US20190198807A1
公开(公告)日:2019-06-27
申请号:US16231959
申请日:2018-12-25
Applicant: Industrial Technology Research Institute
Inventor: Wen-Hung Liu , Cheng-Yi Chen , Hao-Che Kao , Hsin-Chu Chen
CPC classification number: H01L51/5253 , C08G77/54 , C08J7/042 , C08J2323/00 , C08J2367/02 , C08J2483/14 , C09D5/24 , C09D183/14 , H01L27/3244 , H01L27/3281 , H01L51/0094 , H01L51/56
Abstract: Provided is a barrier film which includes an organo-silicon polymeric composition having Si3—N4 bonds and Si—OH bonds. The peak height of Si4—N4 bonds in an infrared absorption spectrum is represented by A, and the peak height of Si—OH bonds in the infrared absorption spectrum is represented by B; and a ratio of A to B is greater than 2.
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公开(公告)号:US10461281B2
公开(公告)日:2019-10-29
申请号:US16178617
申请日:2018-11-02
Applicant: Industrial Technology Research Institute
Inventor: Hsuan-Yu Lin , Ting-Yu Wang , Wen-Hung Liu
Abstract: A light emitting device including a substrate, a first electrode, a light emitting layer, a second electrode, a heat shrinkable film and a first adhesive layer is provided. The first electrode is disposed on the substrate. The light emitting layer is disposed on the first electrode. The second electrode is disposed on the light emitting layer. The first electrode, the light emitting layer, and the second electrode are sequentially stacked on the substrate to form a light emitting cell. The heat shrinkable film is disposed on the light emitting cell. The first adhesive layer is disposed between the heat shrinkable film and the second electrode.
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公开(公告)号:US20190305258A1
公开(公告)日:2019-10-03
申请号:US16178617
申请日:2018-11-02
Applicant: Industrial Technology Research Institute
Inventor: Hsuan-Yu Lin , Ting-Yu Wang , Wen-Hung Liu
Abstract: A light emitting device including a substrate, a first electrode, a light emitting layer, a second electrode, a heat shrinkable film and a first adhesive layer is provided. The first electrode is disposed on the substrate. The light emitting layer is disposed on the first electrode. The second electrode is disposed on the light emitting layer. The first electrode, the light emitting layer, and the second electrode are sequentially stacked on the substrate to form a light emitting cell. The heat shrinkable film is disposed on the light emitting cell. The first adhesive layer is disposed between the heat shrinkable film and the second electrode.
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