公开(公告)号：US20140099777A1

公开(公告)日：2014-04-10

申请号：US13648216

申请日：2012-10-09

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Gunther Mackh ,  Maria Heidenblut ,  Adolf Koller ,  Anatoly Sotnikov

IPC: H01L21/78

CPC classification number: H01L21/78 ,  H01L21/6835 ,  H01L21/6836 ,  H01L2221/68327 ,  H01L2221/68336 ,  H01L2221/6834

Abstract: In one embodiment, a method of forming a semiconductor device comprises forming a groove on and/or over a first side of a substrate. A dicing layer is formed from a second side of the substrate using a laser process. The second side is opposite the first side. The dicing layer is disposed under the groove within the substrate. The substrate is singulated through the dicing layer.

Abstract translation: 在一个实施例中，形成半导体器件的方法包括在衬底的第一侧上和/或之上形成凹槽。 使用激光工艺从基板的第二侧形成切割层。 第二面与第一面相对。 切割层设置在基板内的凹槽下方。 通过切割层将衬底分离。

公开(公告)号：US20220270985A1

公开(公告)日：2022-08-25

申请号：US17582285

申请日：2022-01-24

Applicant: Infineon Technologies AG

Inventor： Sergey Ananiev ,  Andreas Bauer ,  Michael Goroll ,  Maria Heidenblut ,  Stefan Kaiser ,  Gunther Mackh ,  Kabula Mutamba ,  Reinhard Pufall ,  Georg Reuther

IPC: H01L23/00

Abstract: A semiconductor chip having a crack stop structure is disclosed. The crack stop structure includes one or more recesses formed in the semiconductor chip. The one or more recesses extend adjacent to and along a periphery of the semiconductor chip. The one or more recesses are filled with a metal material. The metal material has an intrinsic tensile stress at room temperature that induces compressive stress in at least a region of the periphery of the semiconductor chip.

公开(公告)号：US10090214B2

公开(公告)日：2018-10-02

申请号：US13651496

申请日：2012-10-15

Applicant: Infineon Technologies AG

Inventor： Gunther Mackh ,  Gerhard Leschik ,  Maria Heidenblut

IPC: H01L21/66 ,  H01L21/683

Abstract: A wafer in accordance with various embodiments may include: at least one metallization structure including at least one opening; and at least one separation line region along which the wafer is to be diced, wherein the at least one separation line region intersects the at least one opening.

公开(公告)号：US09040389B2

公开(公告)日：2015-05-26

申请号：US13648216

申请日：2012-10-09

Applicant: Infineon Technologies AG

Inventor： Gunther Mackh ,  Maria Heidenblut ,  Adolf Koller ,  Anatoly Sotnikov

IPC: H01L21/78 ,  H01L21/683

CPC classification number: H01L21/78 ,  H01L21/6835 ,  H01L21/6836 ,  H01L2221/68327 ,  H01L2221/68336 ,  H01L2221/6834

Abstract: In one embodiment, a method of forming a semiconductor device comprises forming a groove on and/or over a first side of a substrate. A dicing layer is formed from a second side of the substrate using a laser process. The second side is opposite the first side. The dicing layer is disposed under the groove within the substrate. The substrate is singulated through the dicing layer.

Abstract translation: 在一个实施例中，形成半导体器件的方法包括在衬底的第一侧上和/或之上形成凹槽。 使用激光工艺从基板的第二侧形成切割层。 第二面与第一面相对。 切割层设置在基板内的凹槽下方。 通过切割层将衬底分离。

公开(公告)号：US10600701B2

公开(公告)日：2020-03-24

申请号：US16120485

申请日：2018-09-04

Applicant: Infineon Technologies AG

Inventor： Gunther Mackh ,  Gerhard Leschik ,  Maria Heidenblut

IPC: H01L21/66 ,  H01L21/683

Abstract: A wafer in accordance with various embodiments may include: at least one metallization structure including at least one opening; and at least one separation line region along which the wafer is to be diced, wherein the at least one separation line region intersects the at least one opening.

公开(公告)号：US20180374766A1

公开(公告)日：2018-12-27

申请号：US16120485

申请日：2018-09-04

Applicant: Infineon Technologies AG

Inventor： Gunther Mackh ,  Gerhard Leschik ,  Maria Heidenblut

IPC: H01L21/66

CPC classification number: H01L22/34 ,  H01L21/6836 ,  H01L2221/68336

Abstract: A wafer in accordance with various embodiments may include: at least one metallization structure including at least one opening; and at least one separation line region along which the wafer is to be diced, wherein the at least one separation line region intersects the at least one opening.

公开(公告)号：US20140103495A1

公开(公告)日：2014-04-17

申请号：US13651496

申请日：2012-10-15

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Gunther Mackh ,  Gerhard Leschik ,  Maria Heidenblut

IPC: H01L23/544 ,  H01L21/78

CPC classification number: H01L22/34 ,  H01L21/6836 ,  H01L2221/68336

Abstract: A wafer in accordance with various embodiments may include: at least one metallization structure including at least one opening; and at least one separation line region along which the wafer is to be diced, wherein the at least one separation line region intersects the at least one opening.

Abstract translation: 根据各种实施例的晶片可以包括：至少一个金属化结构，其包括至少一个开口; 以及要切割晶片的至少一个分离线区域，其中所述至少一个分离线区域与所述至少一个开口相交。