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公开(公告)号:US20160211227A1
公开(公告)日:2016-07-21
申请号:US14997946
申请日:2016-01-18
Applicant: Infineon Technologies AG
Inventor: Eva Wagner , Korbinian Kaspar , Adolf Koller
CPC classification number: H01L23/562 , H01L23/3178 , H01L2924/0002 , H01L2924/00
Abstract: A device includes a semiconductor chip including a dicing edge. The device further includes an active structure arranged in a semiconductor material of the semiconductor chip, and a protection structure arranged between the dicing edge and the active structure.
Abstract translation: 一种器件包括具有切割边缘的半导体芯片。 该器件还包括布置在半导体芯片的半导体材料中的有源结构,以及布置在切割边缘和活动结构之间的保护结构。
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公开(公告)号:US09147624B2
公开(公告)日:2015-09-29
申请号:US14296006
申请日:2014-06-04
Applicant: Infineon Technologies AG
Inventor: Gunther Mackh , Adolf Koller
CPC classification number: H01L23/29 , H01L21/78 , H01L23/562 , H01L2924/0002 , H01L2924/00
Abstract: A method for manufacturing a plurality of chips comprises the step of providing a wafer comprising a plurality of chip areas separated by one or more dicing lines, wherein the chip areas are arranged on a first main surface, the step of providing a laser absorption layer on a second main surface opposite to the first main surface and the step of providing a backside metal stack on the laser absorption layer. After that a laser light is applied to the laser absorption layer along the dicing lines before the chips are singulated along the dicing lines by using stealth dicing.
Abstract translation: 一种用于制造多个芯片的方法包括提供包括由一个或多个切割线分开的多个芯片区域的晶片的步骤,其中芯片区域布置在第一主表面上,提供激光吸收层的步骤 与第一主表面相对的第二主表面和在激光吸收层上提供背侧金属叠层的步骤。 之后,通过使用隐形切割,沿着切割线将芯片沿着切割线施加到激光吸收层。
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公开(公告)号:US08785234B2
公开(公告)日:2014-07-22
申请号:US13665501
申请日:2012-10-31
Applicant: Infineon Technologies AG
Inventor: Gunther Mackh , Adolf Koller
IPC: H01L21/00
CPC classification number: H01L23/29 , H01L21/78 , H01L23/562 , H01L2924/0002 , H01L2924/00
Abstract: A method for manufacturing a plurality of chips comprises the step of providing a wafer comprising a plurality of chip areas separated by one or more dicing lines, wherein the chip areas are arranged on a first main surface, the step of providing a laser absorption layer on a second main surface opposite to the first main surface and the step of providing a backside metal stack on the laser absorption layer. After that a laser light is applied to the laser absorption layer along the dicing lines before the chips are singulated along the dicing lines by using stealth dicing.
Abstract translation: 一种用于制造多个芯片的方法包括提供包括由一个或多个切割线分开的多个芯片区域的晶片的步骤,其中芯片区域布置在第一主表面上,提供激光吸收层的步骤 与第一主表面相对的第二主表面和在激光吸收层上提供背侧金属叠层的步骤。 之后,通过使用隐形切割,沿着切割线将芯片沿着切割线施加到激光吸收层。
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公开(公告)号:US11939216B2
公开(公告)日:2024-03-26
申请号:US17188082
申请日:2021-03-01
Applicant: Infineon Technologies AG
Inventor: Andre Brockmeier , Stephan Helbig , Adolf Koller
CPC classification number: B81C1/00904 , B81C1/00888 , G02B26/0833 , G02B26/105 , B81B2201/042 , B81C2201/0132 , B81C2201/0133 , B81C2201/0143
Abstract: A method includes producing a semiconductor wafer. The semiconductor wafer includes a plurality of microelectromechanical system (MEMS) semiconductor chips, wherein the MEMS semiconductor chips have MEMS structures arranged at a first main surface of the semiconductor wafer, a first semiconductor material layer arranged at the first main surface, and a second semiconductor material layer arranged under the first semiconductor material layer, wherein a doping of the first semiconductor material layer is greater than a doping of the second semiconductor material layer. The method further includes removing the first semiconductor material layer in a region between adjacent MEMS semiconductor chips. The method further includes applying a stealth dicing process from the first main surface of the semiconductor wafer and between the adjacent MEMS semiconductor chips.
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公开(公告)号:US10811297B2
公开(公告)日:2020-10-20
申请号:US15613156
申请日:2017-06-03
Applicant: Infineon Technologies AG
Inventor: Adolf Koller
IPC: H01L21/683 , H01L21/67
Abstract: An apparatus for expanding chips of a wafer, wherein the apparatus comprises an expansion mechanism configured for expanding a tape on which the chips of the wafer are arranged, and an inflation mechanism configured for inflating at least a part of an edge portion of the tape so that part of the edge portion approaches a frame.
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公开(公告)号:US10522478B2
公开(公告)日:2019-12-31
申请号:US15872322
申请日:2018-01-16
Applicant: Infineon Technologies AG
Inventor: Franco Mariani , Adolf Koller
IPC: H01L21/268 , H01L21/78 , H01L29/04 , H01L23/00 , H01L23/58 , H01L21/304
Abstract: A circumferential embedded structure is formed by laser irradiation in a semiconductor substrate, which is of a semiconductor material. The embedded structure includes a polycrystalline structure of the semiconductor material, and surrounds a central portion of a semiconductor die. The semiconductor die including the embedded structure is separated from the semiconductor substrate.
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公开(公告)号:US10029913B2
公开(公告)日:2018-07-24
申请号:US15613666
申请日:2017-06-05
Applicant: Infineon Technologies AG
Inventor: Adolf Koller , Bernhard Drummer
Abstract: A method of removing a reinforcement ring from a wafer is described. The method includes forming a ring-shaped recess in a first surface of the wafer and separating the reinforcement ring from an inner region of the wafer along the ring-shaped recess.
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公开(公告)号:US10460972B2
公开(公告)日:2019-10-29
申请号:US15137022
申请日:2016-04-25
Applicant: Infineon Technologies AG
Inventor: Adolf Koller , Florian Sedlmeier
IPC: H01L21/683 , H01L21/67 , H01L21/78
Abstract: Various embodiments provide a method of detaching semiconductor material from a carrier, wherein the method comprises providing a carrier having attached thereto a layer of semiconductor material, wherein the layer comprises an edge portion; and guiding an air stream onto the edge portion of the layer of semiconductor material.
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公开(公告)号:US09040389B2
公开(公告)日:2015-05-26
申请号:US13648216
申请日:2012-10-09
Applicant: Infineon Technologies AG
Inventor: Gunther Mackh , Maria Heidenblut , Adolf Koller , Anatoly Sotnikov
IPC: H01L21/78 , H01L21/683
CPC classification number: H01L21/78 , H01L21/6835 , H01L21/6836 , H01L2221/68327 , H01L2221/68336 , H01L2221/6834
Abstract: In one embodiment, a method of forming a semiconductor device comprises forming a groove on and/or over a first side of a substrate. A dicing layer is formed from a second side of the substrate using a laser process. The second side is opposite the first side. The dicing layer is disposed under the groove within the substrate. The substrate is singulated through the dicing layer.
Abstract translation: 在一个实施例中,形成半导体器件的方法包括在衬底的第一侧上和/或之上形成凹槽。 使用激光工艺从基板的第二侧形成切割层。 第二面与第一面相对。 切割层设置在基板内的凹槽下方。 通过切割层将衬底分离。
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公开(公告)号:US20140329373A1
公开(公告)日:2014-11-06
申请号:US14332120
申请日:2014-07-15
Applicant: INFINEON TECHNOLOGIES AG
Inventor: Giuseppe Miccoli , Adolf Koller , Jayachandran Bhaskaran
IPC: H01L21/78
CPC classification number: H01L21/78 , B23K26/032 , B23K26/042 , B23K26/40 , B23K26/53 , B23K2101/40 , B23K2103/172 , B23K2103/50
Abstract: A method of dicing a semiconductor wafer includes forming a layer stack on a first main surface of a substrate. The layer stack and a portion of the substrate are etched according to a pattern defining an intended dicing location to obtain a trench structure. The substrate is irradiated with a laser beam to locally modify the substrate between a bottom of the trench structure and a second main surface of the substrate opposite to the first main surface.
Abstract translation: 切割半导体晶片的方法包括在基板的第一主表面上形成层叠体。 根据限定预定切割位置的图案蚀刻层叠层和基板的一部分以获得沟槽结构。 用激光束照射衬底以局部地修改沟槽结构的底部和与第一主表面相对的衬底的第二主表面之间的衬底。
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