公开(公告)号：US11199836B2

公开(公告)日：2021-12-14

申请号：US16269594

申请日：2019-02-07

Applicant: Infineon Technologies AG

Inventor： Bernhard Greslehner-Nimmervoll ,  Rainer Findenig ,  Christian Schmid

IPC: G05B23/02 ,  G05B9/02 ,  H03M13/09 ,  G06F16/901 ,  G05B19/042

Abstract: A device for monitoring a digital control unit with regard to functional safety is proposed. The device comprises an interface configured to receive a control signal of the digital control unit for a circuit component. The control signal represents a digital value. Furthermore, the device comprises a timer circuit configured to output an associated timer value in each case for successive points in time. The device furthermore comprises a hash value generator, which is configurable, in response to a change in the digital value, to recalculate a hash value on the basis of the change in the digital value and the timer value at the point in time of the change in the digital value.

公开(公告)号：US20190250598A1

公开(公告)日：2019-08-15

申请号：US16269594

申请日：2019-02-07

Applicant: Infineon Technologies AG

Inventor： Bernhard Greslehner-Nimmervoll ,  Rainer Findenig ,  Christian Schmid

IPC: G05B23/02 ,  G05B9/02 ,  G06F16/901 ,  H03M13/09

CPC classification number: G05B23/0221 ,  G05B9/02 ,  G05B23/0224 ,  G05B23/0264 ,  G05B23/0297 ,  G06F16/9014 ,  H03M13/093

Abstract: A device for monitoring a digital control unit with regard to functional safety is proposed. The device comprises an interface configured to receive a control signal of the digital control unit for a circuit component. The control signal represents a digital value. Furthermore, the device comprises a timer circuit configured to output an associated timer value in each case for successive points in time. The device furthermore comprises a hash value generator, which is configurable, in response to a change in the digital value, to recalculate a hash value on the basis of the change in the digital value and the timer value at the point in time of the change in the digital value.

公开(公告)号：US12248088B2

公开(公告)日：2025-03-11

申请号：US17541687

申请日：2021-12-03

Applicant: Infineon Technologies AG

Inventor： Rainer Findenig ,  Bernhard Greslehner-Nimmervoll ,  Grigory Itkin ,  Markus Josef Lang ,  Ulrich Moeller ,  Martin Wiessflecker

IPC: G01S7/35 ,  G01S13/02

Abstract: A radar semiconductor chip includes a radar circuit component configured to generate at least part of a frequency-modulated ramp signal or process at least part of a reflected frequency-modulated ramp signal according to a control parameter; a memory configured to store a sequencing program associated with regulating the control parameter, wherein the sequencing program specifies a first data source, external to the sequencing program, that is configured to provide a first data value corresponding to the control parameter; and a decoder configured to read the sequencing program, access the first data value from the first data source specified by the sequencing program, derive a first control value for the control parameter from the first data value, and provide the first control value to the radar circuit component. The radar circuit component regulates a controlled circuit function in accordance with the control parameter based on the first control value.

公开(公告)号：US11567169B2

公开(公告)日：2023-01-31

申请号：US16943365

申请日：2020-07-30

Applicant: Infineon Technologies AG

Inventor： Francesco Lombardo ,  George Efthivoulidis ,  Rainer Findenig ,  Alexander Melzer

IPC: G01S7/40 ,  G01K3/00 ,  G01S7/35

Abstract: A radar system is provided that includes a radar monolithic microwave integrated circuit (MMIC). The radar MMIC includes a plurality of radar signal channels; and at least one sensor configured to measure a physical parameter related to a temperature of the radar MMIC, and to generate sensor data corresponding to measured values of the physical parameter; and a controller configured to receive the sensor data from the at least one sensor, and to determine a channel operation of the plurality of radar signal channels, including selectively disabling at least a first radar signal channel of the plurality of radar signal channels and selectively enabling at least a second radar signal channel of the plurality of radar signal channels based on the measured values.

公开(公告)号：US12000952B2

公开(公告)日：2024-06-04

申请号：US16949251

申请日：2020-10-21

Applicant: Infineon Technologies AG

Inventor： Rainer Findenig ,  Bernhard Greslehner-Nimmervoll

IPC: G01S7/35 ,  G06F5/06 ,  G06F13/16

CPC classification number: G01S7/35 ,  G06F5/06 ,  G06F13/1673 ,  G06F13/1689

Abstract: A radar device may include a memory to store a program associated with operating the radar device. The radar device may include a decoder to read the program from the memory, and generate a control value and a timestamp based at least in part on the program. The control value may be a value to be provided as an input to a component of the radar device at a time indicated by the timestamp. The radar device may include a first-in first-out (FIFO) buffer to store at least the control value and provide the control value as the input to the component of the radar device at the time indicated by the timestamp.

公开(公告)号：US11899125B2

公开(公告)日：2024-02-13

申请号：US17506048

申请日：2021-10-20

Applicant: Infineon Technologies AG

Inventor： Alexander Melzer ,  Rainer Findenig

IPC: G01S7/28 ,  G01S13/50 ,  G01S7/02

CPC classification number: G01S7/2813 ,  G01S7/0232 ,  G01S13/50

Abstract: A radio frequency (RF) circuit includes an input terminal configured to receive a reception signal from an antenna; an output terminal configured to output a digital output signal; a receive path including a mixer and an analog-to-digital converter (ADC), wherein the receive path is coupled to and between the input and output terminals, wherein the receive path includes an analog portion and a digital portion, and wherein the ADC generates a digital signal based on an analog signal received from the analog portion; a test signal generator configured to generate an analog test signal injected into the analog portion of the receive path; and a digital processor configured to receive a digital test signal from the digital portion, the digital test signal being derived from the analog test signal, analyze a frequency spectrum of the digital test signal, and determine a quality of the digital test signal.

公开(公告)号：US11428779B2

公开(公告)日：2022-08-30

申请号：US16262987

申请日：2019-01-31

Applicant: Infineon Technologies AG

Inventor： Christian Schmid ,  Rainer Findenig ,  Bernhard Greslehner-Nimmervoll

IPC: G01S7/40 ,  G01S7/03 ,  G01S13/87 ,  G01S7/35

Abstract: A semiconductor chip comprising at least one transmit channel and/or at least one receive channel for radar signals and also a sequencing circuit is proposed. In this case, the sequencing circuit is configured centrally to determine a sequencing scheme for time-dependent functions of the transmit channel and/or of the receive channel and to drive circuit elements of the transmit channel and/or of the receive channel in accordance with the sequencing scheme.