公开(公告)号：US20230197646A1

公开(公告)日：2023-06-22

申请号：US17557948

申请日：2021-12-21

Applicant: Intel Corporation

Inventor： Aleksandar ALEKSOV ,  Telesphor KAMGAING ,  Georgios C. DOGIAMIS ,  Neelam PRABHU GAUNKAR ,  Veronica STRONG ,  Brandon RAWLINGS ,  Andrew P. COLLINS ,  Arghya SAIN ,  Sivaseetharaman PANDI

IPC: H01L23/66 ,  H01L23/15 ,  H01L23/498 ,  H01P3/08

CPC classification number: H01L23/66 ,  H01L23/15 ,  H01L23/49827 ,  H01L23/49838 ,  H01P3/081 ,  H01L2223/6616 ,  H01L2223/6627 ,  H01L2223/6638

Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises a substrate with a first surface and a second surface opposite from the first surface, where the substrate comprises glass. In an embodiment, the electronic package further comprises a trace embedded in the substrate, where a width of the trace is less than a height of the trace. In an embodiment, the electronic package further comprises a first layer on the first surface of the substrate, where the first layer is a dielectric buildup film, and a second layer on the second surface of the substrate, where the second layer is the dielectric buildup film.

公开(公告)号：US20230197593A1

公开(公告)日：2023-06-22

申请号：US17553214

申请日：2021-12-16

Applicant: Intel Corporation

Inventor： Sivaseetharaman PANDI ,  Andrew P. COLLINS ,  Arghya SAIN ,  Telesphor KAMGAING

IPC: H01L23/498 ,  H01L21/48

CPC classification number: H01L23/49827 ,  H01L21/486

Abstract: Embodiments disclosed herein include an electronic package. In an embodiment, the electronic package comprises a core, where the core comprises glass, and a first via through the core. In an embodiment, a first fin extends out laterally from the first via. In an embodiment, the electronic package further comprises a second via through the core, and a second fin extending out laterally from the second via. In an embodiment, a face of the first fin overlaps a face of the second fin.

公开(公告)号：US20250142846A1

公开(公告)日：2025-05-01

申请号：US18383714

申请日：2023-10-25

Applicant: Intel Corporation

Inventor： Basavaraj KANTHI ,  Andrew P. COLLINS ,  Jian Yong XIE

IPC: H01L27/10

Abstract: Embodiments disclosed herein include a capacitor apparatus. In an embodiment, the apparatus comprises a first metal layer and a first plate above the first metal layer, where the first plate is electrically conductive. In an embodiment, a second plate is above the first plate, where the second plate is electrically conductive, and a third plate is above the second plate, where the third plate is electrically conductive. In an embodiment, a second metal layer is above the third plate, and a first via is between the first metal layer and the second metal layer, where the first via contacts the first plate and the third plate. In an embodiment, a second via is between the first metal layer and the second metal layer, where the second via contacts the second plate, and a third via is between the first metal layer and the first plate.

公开(公告)号：US20230207406A1

公开(公告)日：2023-06-29

申请号：US17561730

申请日：2021-12-24

Applicant: Intel Corporation

Inventor： Arghya SAIN ,  Andrew P. COLLINS ,  Sivaseetharaman PANDI ,  Jianyong XIE ,  Telesphor KAMGAING

IPC: H01L23/15 ,  H01L23/498 ,  H01L21/48 ,  H01L23/00

CPC classification number: H01L23/15 ,  H01L21/486 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/16 ,  H01L2224/16227 ,  H01L2924/15311

Abstract: Embodiments disclosed herein include a package core. In an embodiment, the package core includes a first layer, where the first layer comprises glass. In an embodiment, a second layer is over the first layer, where the second layer comprises glass. In an embodiment, a third layer is over the second layer, where the third layer comprises glass. In an embodiment, a first trace is between the first layer and the second layer. In an embodiment, a second trace is between the second layer and the third layer.

公开(公告)号：US20250112160A1

公开(公告)日：2025-04-03

申请号：US18374611

申请日：2023-09-28

Applicant: Intel Corporation

Inventor： Andrew P. COLLINS ,  Jian Yong XIE ,  Aruna KUMAR ,  Rinkle JAIN ,  Basavaraj KANTHI

IPC: H01L23/538 ,  H01L23/00 ,  H01L23/498 ,  H01L25/065 ,  H10B80/00

Abstract: Embodiments disclosed herein include an apparatus for bump translation. In an embodiment, the apparatus includes a substrate with a first bump field with a first height and a first depth on the substrate, where the first depth is orthogonal to the first height, and where the first bump field further comprises a first pitch in a direction of the first height. In an embodiment, the apparatus includes a second bump field with a second height and a second depth on the substrate, where the second depth is orthogonal to the second height, and where the second bump field comprises a second pitch in a direction of the second height, where the second pitch is smaller than the first pitch. Embodiments include a third bump field with a third height and the second depth, where a sum of the second height and the third height is equal to the first height.

公开(公告)号：US20230207405A1

公开(公告)日：2023-06-29

申请号：US17561722

申请日：2021-12-24

Applicant: Intel Corporation

Inventor： Arghya SAIN ,  Andrew P. COLLINS ,  Sivaseetharaman PANDI ,  Telesphor KAMGAING ,  Tolga ACIKALIN ,  Shuhei YAMADA

IPC: H01L23/15 ,  H01L23/498 ,  H01L21/48 ,  H01L23/00

CPC classification number: H01L23/15 ,  H01L23/49827 ,  H01L23/49822 ,  H01L21/486 ,  H01L24/16 ,  H01L2924/15311 ,  H01L2224/16227

Abstract: Embodiments disclosed herein include electronic devices. In an embodiment, an electronic device comprises a core, where the core comprises a first layer comprising glass, and a second layer comprising glass over the first layer. In an embodiment, a trace is between the first layer and the second layer. In an embodiment, routing layers are on the core.

公开(公告)号：US20230197592A1

公开(公告)日：2023-06-22

申请号：US17553189

申请日：2021-12-16

Applicant: Intel Corporation

Inventor： Telesphor KAMGAING ,  Brandon RAWLINGS ,  Aleksandar ALEKSOV ,  Andrew P. COLLINS ,  Georgios C. DOGIAMIS ,  Veronica STRONG ,  Neelam PRABHU GAUNKAR

IPC: H01L23/498 ,  H05K1/18 ,  H01L23/15 ,  H01L21/48

CPC classification number: H01L23/49827 ,  H01L21/486 ,  H01L23/15 ,  H01L23/49822 ,  H01L23/49838 ,  H05K1/181

Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises a core with a first surface and a second surface, where the core comprises glass. In an embodiment, a first buildup layer is over the first surface of the core, and a second buildup layer is under the second surface of the core. In an embodiment, the electronic package further comprises a via through the core between the first surface of the core and the second surface of the core, and a plane into the first surface of the core, where a width of the plane is greater than a width of the via.