公开(公告)号：US20230307449A1

公开(公告)日：2023-09-28

申请号：US17656490

申请日：2022-03-25

Applicant: Intel Corporation

Inventor： Tao Chu ,  Minwoo Jang ,  Aurelia Chi Wang ,  Conor Puls ,  Brian Greene ,  Tofizur Rahman ,  Lin Hu ,  Jaladhi Mehta ,  Chung-Hsun Lin ,  Walid Hafez

IPC: H01L27/088 ,  H01L29/06 ,  H01L29/423

CPC classification number: H01L27/088 ,  H01L29/0665 ,  H01L29/42392

Abstract: An integrated circuit includes a first source region, a first drain region, a first fin having (i) a first upper region laterally between the first source region and the first drain region and (ii) a first lower region below the first upper region, and a first gate structure on at least top and side surfaces of the first upper region. The integrated circuit further includes a second source region, a second drain region, a second fin having (i) a second upper region laterally between the second source region and the second drain region and (ii) a second lower region below the second upper region, and a second gate structure on at least top and side surfaces of the second upper region. In an example, a first vertical height of the first lower region is different from a second vertical height of the second lower region by at least 2 nanometers (nm).

公开(公告)号：US20200006634A1

公开(公告)日：2020-01-02

申请号：US16024522

申请日：2018-06-29

Applicant: Intel Corporation

Inventor： Justin Brockman ,  Conor Puls ,  Stephen Wu ,  Christopher Wiegand ,  Tofizur Rahman ,  Daniel Ouellette ,  Angeline Smith ,  Andrew Smith ,  Pedro Quintero ,  Juan Alzate-Vinasco ,  Oleg Golonzka

IPC: H01L43/02 ,  H01L43/08 ,  H01L43/10 ,  H01L43/12 ,  H01L21/768 ,  G11C11/16 ,  H01L27/22 ,  H01L23/528

Abstract: A memory device method of fabrication that includes a first electrode having a first conductive layer including titanium and nitrogen and a second conductive layer on the first conductive layer that includes tantalum and nitrogen. The memory device further includes a magnetic tunnel junction (MTJ) on the first electrode. In some embodiments, at least a portion of the first conductive layer proximal to an interface with the second conductive layer includes oxygen.

公开(公告)号：US11380838B2

公开(公告)日：2022-07-05

申请号：US16024522

申请日：2018-06-29

Applicant: Intel Corporation

Inventor： Justin Brockman ,  Conor Puls ,  Stephen Wu ,  Christopher Wiegand ,  Tofizur Rahman ,  Daniel Ouellette ,  Angeline Smith ,  Andrew Smith ,  Pedro Quintero ,  Juan Alzate-Vinasco ,  Oleg Golonzka

IPC: H01L43/02 ,  G11C11/16 ,  H01L21/768 ,  H01L23/528 ,  H01L27/22 ,  H01L43/08 ,  H01L43/10 ,  H01L43/12

Abstract: A memory device method of fabrication that includes a first electrode having a first conductive layer including titanium and nitrogen and a second conductive layer on the first conductive layer that includes tantalum and nitrogen. The memory device further includes a magnetic tunnel junction (MTJ) on the first electrode. In some embodiments, at least a portion of the first conductive layer proximal to an interface with the second conductive layer includes oxygen.