公开(公告)号：US11411173B2

公开(公告)日：2022-08-09

申请号：US16009776

申请日：2018-06-15

Applicant: Intel Corporation

Inventor： Angeline Smith ,  Justin Brockman ,  Tofizur Rahman ,  Daniel Ouellette ,  Andrew Smith ,  Juan Alzate Vinasco ,  James ODonnell ,  Christopher Wiegand ,  Oleg Golonzka

IPC: H01L43/10 ,  H01L43/02 ,  H01L43/08 ,  H01L43/12

Abstract: Material stacks for perpendicular spin transfer torque memory (pSTTM) devices, pSTTM devices and computing platforms employing such material stacks, and methods for forming them are discussed. The material stacks include a cladding layer of predominantly tungsten on a protective layer, which is in turn on an oxide capping layer over a magnetic junction stack. The cladding layer reduces oxygen dissociation from the oxide capping layer for improved thermal stability and retention.

公开(公告)号：US11380838B2

公开(公告)日：2022-07-05

申请号：US16024522

申请日：2018-06-29

Applicant: Intel Corporation

Inventor： Justin Brockman ,  Conor Puls ,  Stephen Wu ,  Christopher Wiegand ,  Tofizur Rahman ,  Daniel Ouellette ,  Angeline Smith ,  Andrew Smith ,  Pedro Quintero ,  Juan Alzate-Vinasco ,  Oleg Golonzka

IPC: H01L43/02 ,  G11C11/16 ,  H01L21/768 ,  H01L23/528 ,  H01L27/22 ,  H01L43/08 ,  H01L43/10 ,  H01L43/12

Abstract: A memory device method of fabrication that includes a first electrode having a first conductive layer including titanium and nitrogen and a second conductive layer on the first conductive layer that includes tantalum and nitrogen. The memory device further includes a magnetic tunnel junction (MTJ) on the first electrode. In some embodiments, at least a portion of the first conductive layer proximal to an interface with the second conductive layer includes oxygen.

公开(公告)号：US20200006631A1

公开(公告)日：2020-01-02

申请号：US16024411

申请日：2018-06-29

Applicant: Intel Corporation

Inventor： Noriyuki Sato ,  Tanay Gosavi ,  Justin Brockman ,  Sasikanth Manipatruni ,  Kaan Oguz ,  Kevin O'Brien ,  Christopher Wiegand ,  Angeline Smith ,  Tofizur Rahman ,  Ian Young

IPC: H01L43/02 ,  G11C11/16 ,  H01L43/10 ,  H01L43/12

Abstract: A perpendicular spin orbit torque (SOT) memory device includes an electrode having a spin orbit coupling material and a magnetic tunnel junction (MTJ) device on a portion of the electrode. The electrode has a first SOC layer and a second SOC layer on a portion of the first SOC layer, where at least a portion of the first SOC layer at an interface with the second SOC layer includes oxygen.

公开(公告)号：US10943950B2

公开(公告)日：2021-03-09

申请号：US16367126

申请日：2019-03-27

Applicant: Intel Corporation

Inventor： Daniel Ouellette ,  Christopher Wiegand ,  Justin Brockman ,  Tofizur Rahman ,  Oleg Golonzka ,  Angeline Smith ,  Andrew Smith ,  James Pellegren ,  Aaron Littlejohn ,  Michael Robinson ,  Huiying Liu

IPC: H01L27/22 ,  H01L43/02 ,  H01L43/10 ,  H01L43/12 ,  H01F10/32 ,  H01F41/34 ,  G11C11/16

Abstract: A memory device includes a first electrode, a conductive layer including iridium above the first electrode, a magnetic junction on the conductive layer and a second electrode above the magnetic junction. The magnetic junction includes a magnetic structure including a first magnetic layer including cobalt, a non-magnetic layer including platinum or tungsten on the first magnetic layer and a second magnetic layer including cobalt on the non-magnetic layer. The magnetic junction further includes an anti-ferromagnetic layer on the magnet structure, a fixed magnet above the anti-ferromagnetic layer, a free magnet above the fixed magnet and a tunnel barrier between the fixed magnet and the free magnet.

公开(公告)号：US20200312907A1

公开(公告)日：2020-10-01

申请号：US16367126

申请日：2019-03-27

Applicant: Intel Corporation

Inventor： Daniel Ouellette ,  Christopher Wiegand ,  Justin Brockman ,  Tofizur Rahman ,  Oleg Golonzka ,  Angeline Smith ,  Andrew Smith ,  James Pellegren ,  Aaron Littlejohn ,  Michael Robinson ,  Huiying Liu

IPC: H01L27/22 ,  H01L43/02 ,  H01L43/10 ,  H01F10/32 ,  H01L43/12 ,  G11C11/16 ,  H01F41/34

Abstract: A memory device includes a first electrode, a conductive layer including iridium above the first electrode, a magnetic junction on the conductive layer and a second electrode above the magnetic junction. The magnetic junction includes a magnetic structure including a first magnetic layer including cobalt, a non-magnetic layer including platinum or tungsten on the first magnetic layer and a second magnetic layer including cobalt on the non-magnetic layer. The magnetic junction further includes an anti-ferromagnetic layer on the magnet structure, a fixed magnet above the anti-ferromagnetic layer, a free magnet above the fixed magnet and a tunnel barrier between the fixed magnet and the free magnet.

公开(公告)号：US20200006632A1

公开(公告)日：2020-01-02

申请号：US16024427

申请日：2018-06-29

Applicant: Intel Corporation

Inventor： Daniel Ouellette ,  Justin Brockman ,  Tofizur Rahman ,  Angeline Smith ,  Andrew Smith ,  Christopher Wiegand ,  Oleg Golonzka

IPC: H01L43/02 ,  H01L27/22 ,  H01F10/32

Abstract: A memory device includes a bottom electrode, a conductive layer such as an alloy including ruthenium and tungsten above the bottom electrode and a perpendicular magnetic tunnel junction (pMTJ) on the conductive layer. In an embodiment, the pMTJ includes a fixed magnet, a tunnel barrier above the fixed magnet and a free magnet on the tunnel barrier. The memory device further includes a synthetic antiferromagnetic (SAF) structure that is ferromagnetically coupled with the fixed magnet to pin a magnetization of the fixed magnet. The conductive layer has a crystal texture which promotes high quality FCC crystal texture in the SAF structure and improves perpendicular magnetic anisotropy of the fixed magnet.

公开(公告)号：US11770979B2

公开(公告)日：2023-09-26

申请号：US16024427

申请日：2018-06-29

Applicant: Intel Corporation

Inventor： Daniel Ouellette ,  Justin Brockman ,  Tofizur Rahman ,  Angeline Smith ,  Andrew Smith ,  Christopher Wiegand ,  Oleg Golonzka

IPC: H01F10/32 ,  G11C11/16 ,  H10N50/01 ,  H10N50/80 ,  H10B61/00 ,  H10N50/85

CPC classification number: H10N50/80 ,  H01F10/3286 ,  H10B61/22 ,  G11C11/161 ,  H01F10/3272 ,  H10N50/01 ,  H10N50/85

Abstract: A memory device includes a bottom electrode, a conductive layer such as an alloy including ruthenium and tungsten above the bottom electrode and a perpendicular magnetic tunnel junction (pMTJ) on the conductive layer. In an embodiment, the pMTJ includes a fixed magnet, a tunnel barrier above the fixed magnet and a free magnet on the tunnel barrier. The memory device further includes a synthetic antiferromagnetic (SAF) structure that is ferromagnetically coupled with the fixed magnet to pin a magnetization of the fixed magnet. The conductive layer has a crystal texture which promotes high quality FCC crystal texture in the SAF structure and improves perpendicular magnetic anisotropy of the fixed magnet.

公开(公告)号：US20200313084A1

公开(公告)日：2020-10-01

申请号：US16367136

申请日：2019-03-27

Applicant: Intel Corporation

Inventor： Daniel Ouellette ,  Christopher Wiegand ,  Justin Brockman ,  Tofizur Rahman ,  Oleg Golonzka ,  Angeline Smith ,  Andrew Smith ,  James Pellegren ,  Michael Robinson ,  Huiying Liu

IPC: H01L43/12 ,  H01L27/22

Abstract: A memory device includes a first electrode, a conductive layer including iridium above the first electrode and a magnetic junction directly on the conductive layer. The magnetic junction further includes a pinning structure above the conductive layer, a fixed magnet above the pinning structure, a tunnel barrier on the fixed magnet, a free magnet on the tunnel barrier layer and a second electrode above the free magnet. The conductive layer including iridium and the pinning structure including iridium provide switching efficiency.

公开(公告)号：US20200313074A1

公开(公告)日：2020-10-01

申请号：US16367122

申请日：2019-03-27

Applicant: Intel Corporation

Inventor： Angeline Smith ,  Daniel Ouellette ,  Christopher Wiegand ,  Justin Brockman ,  Tofizur Rahman ,  Oleg Golonzka ,  Andrew Smith ,  James Pellegren

IPC: H01L43/02 ,  H01L43/10 ,  H01L43/12 ,  G11C11/16 ,  H01L27/22

Abstract: A memory device includes a first electrode, a second electrode and a magnetic junction between the first and the second electrode. The magnetic junction includes a first magnetic structure that includes a first magnet including an alloy of cobalt and tungsten, and a second magnet above the first magnet. The first and the second magnets are separated by a non-magnetic spacer layer. The magnetic junction further includes a layer including a metal and oxygen on the first magnetic structure. The tunnel barrier layer has an crystal texture. The magnetic junction further includes a third magnet on the tunnel barrier layer. The third magnet has a magnetization which can change in response to torque from a current tunneling through the tunnel barrier layer.

公开(公告)号：US20200006634A1

公开(公告)日：2020-01-02

申请号：US16024522

申请日：2018-06-29

Applicant: Intel Corporation

Inventor： Justin Brockman ,  Conor Puls ,  Stephen Wu ,  Christopher Wiegand ,  Tofizur Rahman ,  Daniel Ouellette ,  Angeline Smith ,  Andrew Smith ,  Pedro Quintero ,  Juan Alzate-Vinasco ,  Oleg Golonzka

IPC: H01L43/02 ,  H01L43/08 ,  H01L43/10 ,  H01L43/12 ,  H01L21/768 ,  G11C11/16 ,  H01L27/22 ,  H01L23/528

Abstract: A memory device method of fabrication that includes a first electrode having a first conductive layer including titanium and nitrogen and a second conductive layer on the first conductive layer that includes tantalum and nitrogen. The memory device further includes a magnetic tunnel junction (MTJ) on the first electrode. In some embodiments, at least a portion of the first conductive layer proximal to an interface with the second conductive layer includes oxygen.