公开(公告)号：US11502188B2

公开(公告)日：2022-11-15

申请号：US16009110

申请日：2018-06-14

Applicant: Intel Corporation

Inventor： Chia-Ching Lin ,  Sasikanth Manipatruni ,  Dmitri Nikonov ,  Ian A. Young ,  Benjamin Buford ,  Tanay Gosavi ,  Kaan Oguz ,  John J. Plombon

IPC: H01L29/66 ,  H03K19/18 ,  H01L43/06 ,  H01F10/32 ,  H01F41/30 ,  H03K19/0944 ,  H01L27/02 ,  B82Y25/00

Abstract: An apparatus is provided to improve spin injection efficiency from a magnet to a spin orbit coupling material. The apparatus comprises: a first magnet; a second magnet adjacent to the first magnet; a first structure comprising a tunneling barrier; a third magnet adjacent to the first structure; a stack of layers, a portion of which is adjacent to the third magnet, wherein the stack of layers comprises spin-orbit material; and a second structure comprising magnetoelectric material, wherein the second structure is adjacent to the first magnet.

公开(公告)号：US20200074268A1

公开(公告)日：2020-03-05

申请号：US16121756

申请日：2018-09-05

Applicant: INTEL CORPORATION

Inventor： Dmitri Nikonov ,  Sasikanth Manipatruni ,  Ian Young

IPC: G06N3/04 ,  H03K3/03 ,  H03L7/099 ,  H05K1/02 ,  H01L23/66 ,  H01L21/8238

Abstract: Techniques are provided for radio frequency interconnections between oscillators and transmission lines for oscillatory neural networks (ONNs). An ONN gate implementing the techniques according to an embodiment includes a transmission line, a first oscillator circuit tuned to a first frequency based on a first tuning voltage associated with a first synapse weight, and a first capacitive coupler to couple the first oscillator circuit to the transmission line to generate an oscillating signal in the transmission line. The ONN gate further includes a second oscillator circuit tuned to a second frequency based on a second tuning voltage associated with a second synapse weight, and a second capacitive coupler to couple the second oscillator circuit to the transmission line to adjust the oscillating signal in the transmission line such that the amplitude of the adjusted oscillating signal is associated with a degree of match between the first frequency and the second frequency.

公开(公告)号：US20190386662A1

公开(公告)日：2019-12-19

申请号：US16009110

申请日：2018-06-14

Applicant: Intel Corporation

Inventor： Chia-Ching Lin ,  Sasikanth Manipatruni ,  Dmitri Nikonov ,  Ian A. Young ,  Benjamin Buford ,  Tanay Gosavi ,  Kaan Oguz ,  John J. Plombon

IPC: H03K19/18 ,  H01L43/06 ,  H03K19/0944 ,  H01F10/32 ,  H01F41/30

Abstract: An apparatus is provided to improve spin injection efficiency from a magnet to a spin orbit coupling material. The apparatus comprises: a first magnet; a second magnet adjacent to the first magnet; a first structure comprising a tunneling barrier; a third magnet adjacent to the first structure; a stack of layers, a portion of which is adjacent to the third magnet, wherein the stack of layers comprises spin-orbit material; and a second structure comprising magnetoelectric material, wherein the second structure is adjacent to the first magnet.

公开(公告)号：US20190386208A1

公开(公告)日：2019-12-19

申请号：US16009035

申请日：2018-06-14

Applicant: Intel Corporation

Inventor： Chia-Ching Lin ,  Sasikanth Manipatruni ,  Tanay Gosavi ,  Dmitri Nikonov ,  Benjamin Buford ,  Kaan Oguz ,  John J. Plombon ,  Ian A. Young

IPC: H01L43/10 ,  H01L27/22 ,  H01L43/02

Abstract: An apparatus is provided which comprises: a stack comprising a magnetoelectric (ME such as BiFeO3, (LaBi)FeO3, LuFeO3, PMN-PT, PZT, AlN, SmBiFeO3, Cr2O3, etc.) material and a transition metal dichalcogenide (TMD such as MoS2, MoSe2, WS2, WSe2, PtS2, PtSe2, WTe2, MoTe2, graphene, etc.); a magnet adjacent to a first portion of the TMD of the stack; a first interconnect adjacent to the magnet; a second interconnect adjacent to the ME material of the stack; and a third interconnect adjacent to a second portion of the TMD of the stack.

公开(公告)号：US20170352802A1

公开(公告)日：2017-12-07

申请号：US15525521

申请日：2014-12-18

Applicant: Intel Corporation

Inventor： Dmitri Nikonov ,  Sasikanth Manipatruni ,  Ian Young

IPC: H01L43/08 ,  G11C11/16 ,  H01L43/10 ,  H01L41/12

CPC classification number: H01L43/08 ,  G11C11/161 ,  G11C11/1675 ,  G11C11/22 ,  G11C21/00 ,  H01L41/12 ,  H01L43/10 ,  H03K19/18 ,  H03K19/23

Abstract: Described is an interconnect which comprises: a first end having a ferromagnetic layer coupled to a first magnetoelectric material layer; and a second end having a second magnetoelectric material layer coupled to the ferromagnetic layer, wherein the ferromagnetic layer extends from the first end to the second end. Described is a majority gate device which comprises: a ferromagnetic layer; and first, second, third, and fourth magnetoelectric material layers coupled to the ferromagnetic layer. Described is an apparatus which comprises: a first end having a ferromagnetic layer coupled to a first magnetoelectric material layer; and a second end having a tunnel junction device coupled to the ferromagnetic layer. Described is an apparatus which comprises: a first terminal coupled to a tunneling junction device; a second terminal coupled to a layer coupling the tunneling junction device and a magnetoelectric device; and a third terminal coupled to the magnetoelectric device.

公开(公告)号：US09620188B2

公开(公告)日：2017-04-11

申请号：US14780489

申请日：2013-06-21

Applicant: INTEL CORPORATION

Inventor： Sasikanth Manipatruni ,  Dmitri Nikonov ,  Ian Young

IPC: G11C11/00 ,  G11C11/16 ,  G11C11/18 ,  H01L43/08 ,  H01L27/22 ,  H01L43/06 ,  H01L43/12

CPC classification number: G11C11/161 ,  G11C11/1655 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/1675 ,  G11C11/18 ,  H01L27/226 ,  H01L27/228 ,  H01L43/06 ,  H01L43/08 ,  H01L43/12

Abstract: An apparatus is described having a select line and an interconnect with Spin Hall Effect (SHE) material. The interconnect is coupled to a write bit line. A transistor is coupled to the select line and the interconnect. The transistor is controllable by a word line. The apparatus also includes an MTJ device having a free magnetic layer coupled to the interconnect.

公开(公告)号：US11696514B2

公开(公告)日：2023-07-04

申请号：US17565106

申请日：2021-12-29

Applicant: Intel Corporation

Inventor： Chia-Ching Lin ,  Sasikanth Manipatruni ,  Tanay Gosavi ,  Dmitri Nikonov ,  Benjamin Buford ,  Kaan Oguz ,  John J. Plombon ,  Ian A. Young

IPC: H10N50/85 ,  H10B61/00 ,  H10N50/80

CPC classification number: H10N50/85 ,  H10B61/22 ,  H10N50/80

Abstract: An apparatus is provided which comprises: a stack comprising a magnetoelectric (ME such as BiFeO3, (LaBi)FeO3, LuFeO3, PMN-PT, PZT, AlN, SmBiFeO3, Cr2O3, etc.) material and a transition metal dichalcogenide (TMD such as MoS2, MoSe2, WS2, WSe2, PtS2, PtSe2, WTe2, MoTe2, graphene, etc.); a magnet adjacent to a first portion of the TMD of the stack; a first interconnect adjacent to the magnet; a second interconnect adjacent to the ME material of the stack; and a third interconnect adjacent to a second portion of the TMD of the stack.

公开(公告)号：US20220352358A1

公开(公告)日：2022-11-03

申请号：US17833662

申请日：2022-06-06

Applicant: Intel Corporation

Inventor： Chia-Ching Lin ,  Sasikanth Manipatruni ,  Tanay Gosavi ,  Sou-Chi Chang ,  Dmitri Nikonov ,  Ian A. Young

IPC: H01L29/66 ,  H01L29/82 ,  G11C11/16 ,  H01F10/32

Abstract: An apparatus is provided which comprises: a first stack comprising a magnetic insulating material (MI such as, EuS, EuO, YIG, TmIG, or GaMnAs) and a transition metal dichalcogenide (TMD such as MoS2, MoSe2, WS2, WSe2, PtS2, PtSe2, WTe2, MoTe2, or graphene; a second stack comprising an MI material and a TMD, wherein the first and second stacks are separated by an insulating material (e.g., oxide); a magnet (e.g., a ferromagnet or a paramagnet) adjacent to the TMDs of the first and second stacks, and also adjacent to the insulating material; and a magnetoelectric material (e.g., (LaBi)FeO3, LuFeO3, PMN-PT, PZT, AlN, or (SmBi)FeO3) adjacent to the magnet.

公开(公告)号：US20220115438A1

公开(公告)日：2022-04-14

申请号：US17070808

申请日：2020-10-14

Applicant: Intel Corporation

Inventor： Hai Li ,  Dmitri Nikonov ,  Chia-Ching Lin ,  Tanay Gosavi ,  Ian Young

IPC: H01L27/22 ,  H01F10/32

Abstract: A differential magnetoelectric spin-orbit (MESO) logic device is provided where two ports are used to connect the spin orbital module of the MESO device and a ferroelectric capacitor. In some examples, an insulating layer is added to decouple current paths.

公开(公告)号：US11245068B2

公开(公告)日：2022-02-08

申请号：US16009035

申请日：2018-06-14

Applicant: Intel Corporation

Inventor： Chia-Ching Lin ,  Sasikanth Manipatruni ,  Tanay Gosavi ,  Dmitri Nikonov ,  Benjamin Buford ,  Kaan Oguz ,  John J. Plombon ,  Ian A. Young

IPC: H01L43/10 ,  H01L43/02 ,  H01L27/22

Abstract: An apparatus is provided which comprises: a stack comprising a magnetoelectric (ME such as BiFeO3, (LaBi)FeO3, LuFeO3, PMN-PT, PZT, AlN, SmBiFeO3, Cr2O3, etc.) material and a transition metal dichalcogenide (TMD such as MoS2, MoSe2, WS2, WSe2, PtS2, PtSe2, WTe2, MoTe2, graphene, etc.); a magnet adjacent to a first portion of the TMD of the stack; a first interconnect adjacent to the magnet; a second interconnect adjacent to the ME material of the stack; and a third interconnect adjacent to a second portion of the TMD of the stack.