公开(公告)号：US20170207196A1

公开(公告)日：2017-07-20

申请号：US15038008

申请日：2015-06-25

Applicant: Intel Corporation

Inventor： KYU-OH LEE ,  ISLAM A. SALAMA ,  RAM S. VISWANATH ,  ROBERT L. SANKMAN ,  BABAK SABI ,  SRI CHAITRA JYOTSNA CHAVALI

IPC: H01L25/065 ,  H01L23/498 ,  H01L23/00

CPC classification number: H01L25/0657 ,  H01L23/13 ,  H01L23/48 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/05 ,  H01L24/11 ,  H01L24/17 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/05147 ,  H01L2224/16225 ,  H01L2224/97 ,  H01L2225/06517 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/15311

Abstract: Disclosed herein are integrated circuit (IC) structures having recessed conductive contacts for package on package (PoP). For example, an IC structure may include: an IC package having a first resist surface; a recess disposed in the first resist surface, wherein a bottom of the recess includes a second resist surface; a first plurality of conductive contacts located at the first resist surface; and a second plurality of conductive contacts located at the second resist surface. Other embodiments may be disclosed and/or claimed

公开(公告)号：US20170170109A1

公开(公告)日：2017-06-15

申请号：US15038001

申请日：2015-06-25

Applicant: Intel Corporation

Inventor： KYU-OH LEE ,  ISLAM A. SALAMA

IPC: H01L23/498 ,  H01L23/66 ,  H01L21/48 ,  H01L23/00

CPC classification number: H01L23/49838 ,  H01L21/4853 ,  H01L21/4857 ,  H01L23/13 ,  H01L23/48 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/50 ,  H01L23/5385 ,  H01L23/66 ,  H01L24/16 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2223/6666 ,  H01L2224/16157 ,  H01L2224/16197 ,  H01L2224/16225 ,  H01L2924/1205 ,  H01L2924/15311

Abstract: Disclosed herein are integrated circuit (IC) structures having interposers with recesses. For example, an IC structure may include: an interposer having a resist surface; a recess disposed in the resist surface, wherein a bottom of the recess is surface-finished; and a plurality of conductive contacts located at the resist surface. Other embodiments may be disclosed and/or claimed.

公开(公告)号：US20180226381A1

公开(公告)日：2018-08-09

申请号：US15863821

申请日：2018-01-05

Applicant: Intel Corporation

Inventor： KYU-OH LEE ,  ISLAM A. SALAMA ,  RAM S. VISWANATH ,  ROBERT L. SANKMAN ,  BABAK SABI ,  SRI CHAITRA JYOTSNA CHAVALI

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/498

Abstract: Disclosed herein are integrated circuit (IC) structures having recessed conductive contacts for package on package (PoP). For example, an IC structure may include: an IC package having a first resist surface; a recess disposed in the first resist surface, wherein a bottom of the recess includes a second resist surface; a first plurality of conductive contacts located at the first resist surface; and a second plurality of conductive contacts located at the second resist surface. Other embodiments may be disclosed and/or claimed.

公开(公告)号：US20150089806A1

公开(公告)日：2015-04-02

申请号：US14566208

申请日：2014-12-10

Applicant: Intel Corporation

Inventor： MIHIR K. ROY ,  ISLAM A. SALAMA ,  YONGGANG LI

IPC: H05K3/42 ,  G06F1/18

CPC classification number: H05K3/422 ,  G06F1/183 ,  H01L23/492 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L2924/0002 ,  Y10T29/49165 ,  H01L2924/00

Abstract: A semiconductor device substrate includes a front section and back section that are laminated cores disposed on a front- and back surfaces of a first core. The first core has a cylindrical plated through hole that has been metal plated and filled with air-core material. The front- and back sections have laser-drilled tapered vias that are filled with conductive material and that are coupled to the plated through hole. The back section includes an integral inductor coil that communicates to the front section. The first core and the laminated-cores form a hybrid-core semiconductor device substrate with an integral inductor coil.

Abstract translation: 半导体器件基板包括前部和后部，其是设置在第一芯的前表面和后表面上的层叠芯。 第一芯具有圆柱形电镀通孔，其已被金属电镀并填充有空芯材料。 前部和后部具有激光钻孔的锥形通孔，其填充有导电材料并且连接到电镀通孔。 后部包括与前部连通的整体电感线圈。 第一芯和层叠芯形成具有集成电感线圈的混合芯半导体器件衬底。