公开(公告)号：US20160307796A1

公开(公告)日：2016-10-20

申请号：US15192643

申请日：2016-06-24

Applicant: INTEL CORPORATION

Inventor： Hui Jae Yoo ,  Jeffery D. Bielefeld ,  Sean W. King ,  Sridhar Balakrishnan

IPC: H01L21/768 ,  H01L21/285 ,  H01L23/532 ,  H01L21/3205

CPC classification number: H01L21/76834 ,  H01L21/2855 ,  H01L21/32053 ,  H01L21/76832 ,  H01L21/76835 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76849 ,  H01L21/76855 ,  H01L21/76864 ,  H01L21/76867 ,  H01L21/76897 ,  H01L23/485 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L2924/0002 ,  Y10S438/927 ,  H01L2924/00

Abstract: Processes of forming an insulated wire into an interlayer dielectric layer (ILD) of a back-end metallization includes thermally treating a metallic barrier precursor under conditions to cause at least one alloying element in the barrier precursor to form a dielectric barrier between the wire and the ILD. The dielectric barrier is therefore a self-forming, self-aligned barrier. Thermal processing is done under conditions to cause the at least one alloying element to migrate from a zone of higher concentration thereof to a zone of lower concentration thereof to further form the dielectric barrier. Various apparatus are made by the process.

公开(公告)号：US09269686B2

公开(公告)日：2016-02-23

申请号：US14132157

申请日：2013-12-18

Applicant: Intel Corporation

Inventor： Qing Ma ,  Jun He ,  Patrick Morrow ,  Paul B. Fischer ,  Sridhar Balakrishnan ,  Satish Radhakrishnan ,  Tatyana T. Adryushchenko ,  Guanghai Xu

IPC: H05K1/03 ,  H01L23/00 ,  B23K1/00 ,  H05K3/40

CPC classification number: H01L24/19 ,  B23K1/0016 ,  H01L21/0334 ,  H01L24/11 ,  H01L2224/245 ,  H01L2924/01322 ,  H01L2924/14 ,  H05K3/4015 ,  H05K2201/1028 ,  H01L2924/00

Abstract: The present subject matter relates to the field of fabricating microelectronic devices. In at least one embodiment, the present subject matter relates to forming an interconnect that has a portion thereof which becomes debonded from the microelectronic device during cooling after attachment to an external device. The debonded portion allows the interconnect to flex and absorb stress.

Abstract translation: 本主题涉及制造微电子器件的领域。 在至少一个实施例中，本主题涉及形成具有其部分的互连，其在附接到外部设备之后在冷却期间从微电子器件脱粘。 脱粘部分允许互连件弯曲并吸收应力。

公开(公告)号：US10249588B2

公开(公告)日：2019-04-02

申请号：US15369815

申请日：2016-12-05

Applicant: Intel Corporation

Inventor： Valery M. Dubin ,  Sridhar Balakrishnan ,  Mark Bohr

IPC: H01L23/00 ,  H01L21/288 ,  H01L21/48

Abstract: Methods, techniques, and structures relating to die packaging. In one exemplary implementation, a die package interconnect structure includes a semiconductor substrate and a first conducting layer in contact with the semiconductor substrate. The first conducting layer may include a base layer metal. The base layer metal may include Cu. The exemplary implementation may also include a diffusion barrier in contact with the first conducting layer and a wetting layer on top of the diffusion barrier. A bump layer may reside on top of the wetting layer, in which the bump layer may include Sn, and Sn may be electroplated. The diffusion barrier may be electroless and may be adapted to prevent Cu and Sn from diffusing through the diffusion barrier. Furthermore, the diffusion barrier may be further adapted to suppress a whisker-type formation in the bump layer.

公开(公告)号：US20160133596A1

公开(公告)日：2016-05-12

申请号：US14997919

申请日：2016-01-18

Applicant: Intel Corporation

Inventor： Qing Ma ,  Jun He ,  Patrick Morrow ,  Paul B. Fischer ,  Sridhar Balakrishnan ,  Satish Radhakrishnan ,  Tatyana Andryushchenko ,  Guanghai Xu

IPC: H01L23/00 ,  H01L21/033

CPC classification number: H01L24/19 ,  B23K1/0016 ,  H01L21/0334 ,  H01L24/11 ,  H01L2224/245 ,  H01L2924/01322 ,  H01L2924/14 ,  H05K3/4015 ,  H05K2201/1028 ,  H01L2924/00

Abstract: The present subject matter relates to the field of fabricating microelectronic devices. In at least one embodiment, the present subject matter relates to forming an interconnect that has a portion thereof which becomes debonded from the microelectronic device during cooling after attachment to an external device. The debonded portion allows the interconnect to flex and absorb stress.

Abstract translation: 本主题涉及制造微电子器件的领域。 在至少一个实施例中，本主题涉及形成具有其部分的互连，其在附接到外部设备之后在冷却期间从微电子器件脱粘。 脱粘部分允许互连件弯曲并吸收应力。

公开(公告)号：US11201129B2

公开(公告)日：2021-12-14

申请号：US16283582

申请日：2019-02-22

Applicant: Intel Corporation

Inventor： Valery M. Dubin ,  Sridhar Balakrishnan ,  Mark Bohr

IPC: H01L23/00 ,  H01L21/288 ,  H01L21/48

Abstract: Methods, techniques, and structures relating to die packaging. In one exemplary implementation, a die package interconnect structure includes a semiconductor substrate and a first conducting layer in contact with the semiconductor substrate. The first conducting layer may include a base layer metal. The base layer metal may include Cu. The exemplary implementation may also include a diffusion barrier in contact with the first conducting layer and a wetting layer on top of the diffusion barrier. A bump layer may reside on top of the wetting layer, in which the bump layer may include Sn, and Sn may be electroplated. The diffusion barrier may be electroless and may be adapted to prevent Cu and Sn from diffusing through the diffusion barrier. Furthermore, the diffusion barrier may be further adapted to suppress a whisker-type formation in the bump layer.

公开(公告)号：US09461010B2

公开(公告)日：2016-10-04

申请号：US14997919

申请日：2016-01-18

Applicant: Intel Corporation

Inventor： Qing Ma ,  Jun He ,  Patrick Morrow ,  Paul B. Fischer ,  Sridhar Balakrishnan ,  Satish Radhakrishnan ,  Tatyana Andryushchenko ,  Guanghai Xu

IPC: H05K1/03 ,  H01L23/00 ,  B23K1/00 ,  H05K3/40 ,  H01L21/033

CPC classification number: H01L24/19 ,  B23K1/0016 ,  H01L21/0334 ,  H01L24/11 ,  H01L2224/245 ,  H01L2924/01322 ,  H01L2924/14 ,  H05K3/4015 ,  H05K2201/1028 ,  H01L2924/00

Abstract: The present subject matter relates to the field of fabricating microelectronic devices. In at least one embodiment, the present subject matter relates to forming an interconnect that has a portion thereof which becomes debonded from the microelectronic device during cooling after attachment to an external device. The debonded portion allows the interconnect to flex and absorb stress.