公开(公告)号：US11093648B2

公开(公告)日：2021-08-17

申请号：US16457904

申请日：2019-06-28

Applicant: Intel Corporation

Inventor： Sudeep Divakaran ,  Ranjit Sivaram Narjala ,  Prashant Dewan

IPC: G06F21/62 ,  G06F9/451 ,  G06F3/0488 ,  G06F3/0484 ,  G06F3/0362 ,  G06F3/0482 ,  G06F21/32

Abstract: Technologies provide hardware-assisted privacy protection of sensor data. One embodiment includes unlocking a user interface coupled to a trusted execution environment of a processor in a device, where the user interface includes a plurality of selectable settings associated with a plurality of access levels for sensor data captured by a sensor. The embodiment also includes receiving a selection signal from the user interface indicating that a user selected a first setting associated with a first access level for the sensor data captured by the sensor, and restricting access to the sensor data based on a first set of one or more entities associated with the first access level. In more specific embodiments, the user interface includes a knob that is rotatably attached to a housing of the device or a privacy panel including a slider bar that is to be displayed on a touch screen display of the device.

公开(公告)号：US11675715B2

公开(公告)日：2023-06-13

申请号：US16366789

申请日：2019-03-27

Applicant: Intel Corporation

Inventor： Suresh Sugumar ,  Vishwanath Somayaji ,  Sudeep Divakaran

IPC: G06F13/16 ,  G06F1/26 ,  G06F13/42

CPC classification number: G06F13/1642 ,  G06F1/266 ,  G06F13/4282 ,  G06F2213/0042

Abstract: Methods and apparatus for implementing a low-pin count architecture with priority message arbitration and delivery. The architecture includes a hardware-based message arbitration unit (MAU) including a plurality of priority queues, each having a respective priority level, implemented on a first component, such as a processor and/or System on a Chip (SoC). The first component is communicatively coupled to a second component via a low-pin count link such as an I2C bus. The MAU receives prioritized messages from clients and enqueues the messages in priority queues based on their priority levels. An arbiter selects messages to transmit over the low-pin count link from the priority queues. The MAU further may abort transmission of a message in favor of transmission of a higher-priority message to guarantee a transmit latency. Under one implementation, the components are a processor and a PMIC configured to communicate with a USB Type-C power source and meet timing requirements defined by a USB Power Delivery Specification.

公开(公告)号：US10955903B2

公开(公告)日：2021-03-23

申请号：US16229447

申请日：2018-12-21

Applicant: INTEL CORPORATION

Inventor： Sudeep Divakaran ,  VNS Murthy Sristi

IPC: G06F1/3234 ,  G06F1/3287 ,  G09G5/37 ,  G06T9/00

Abstract: Disclosed herein are techniques and a display panel that can sequentially display images while the host processor is inactive (e.g., asleep, power gated, or the like). The display panel includes circuitry to receive a set of encoded images, sequentially decode the encoded images provide a bitstream of the decoded images to the display electronics. The host is arranged to encode the images, send the encoded images to a frame buffer at the panel and configure the panel for a low power multi-image presentation mode.

公开(公告)号：US12207203B2

公开(公告)日：2025-01-21

申请号：US17398495

申请日：2021-08-10

Applicant: Intel Corporation

Inventor： Sudeep Divakaran ,  Brent Elliott ,  Kwan Ho Lee ,  Gil Meyuhas

IPC: H04W52/22 ,  H04W52/26 ,  H04W52/28 ,  H04W52/36

Abstract: A wireless device includes one or more antennas coupled to a transmit (TX) chain. The TX chain is configured to generate output RF signals using baseband signals. The TX chain includes a TX power controller configured to classify a packet of the output RF signals into a priority category of a plurality of priority categories based on priority information within the packet. The TX power controller is further to determine a time average specific absorption rate (TAS) energy budget of the wireless device. The TAS energy budget is based on a pre-configured regulatory power limit (e.g., SAR transmit power limit) of the wireless device over a time interval. Transmission power for transmitting the packet is determined based on the priority category and the TAS energy budget. The packet is encoded for transmission via the one or more antennas using the determined transmission power.

公开(公告)号：US11494519B2

公开(公告)日：2022-11-08

申请号：US17379470

申请日：2021-07-19

Applicant: Intel Corporation

Inventor： Sudeep Divakaran ,  Ranjit Sivaram Narjala ,  Prashant Dewan

IPC: G06F21/62 ,  G06F9/451 ,  G06F3/04886 ,  G06F3/04847 ,  G06F3/0362 ,  G06F3/0482 ,  G06F21/32

Abstract: Technologies provide hardware-assisted privacy protection of sensor data. One embodiment includes unlocking a user interface coupled to a trusted execution environment of a processor in a device, where the user interface includes a plurality of selectable settings associated with a plurality of access levels for sensor data captured by a sensor. The embodiment also includes receiving a selection signal from the user interface indicating that a user selected a first setting associated with a first access level for the sensor data captured by the sensor, and restricting access to the sensor data based on a first set of one or more entities associated with the first access level. In more specific embodiments, the user interface includes a knob that is rotatably attached to a housing of the device or a privacy panel including a slider bar that is to be displayed on a touch screen display of the device.

公开(公告)号：US20220083678A1

公开(公告)日：2022-03-17

申请号：US17379470

申请日：2021-07-19

Applicant: Intel Corporation

Inventor： Sudeep Divakaran ,  Ranjit Sivaram Narjala ,  Prashant Dewan

IPC: G06F21/62 ,  G06F9/451 ,  G06F3/0488 ,  G06F3/0484 ,  G06F3/0362 ,  G06F3/0482 ,  G06F21/32

Abstract: Technologies provide hardware-assisted privacy protection of sensor data. One embodiment includes unlocking a user interface coupled to a trusted execution environment of a processor in a device, where the user interface includes a plurality of selectable settings associated with a plurality of access levels for sensor data captured by a sensor. The embodiment also includes receiving a selection signal from the user interface indicating that a user selected a first setting associated with a first access level for the sensor data captured by the sensor, and restricting access to the sensor data based on a first set of one or more entities associated with the first access level. In more specific embodiments, the user interface includes a knob that is rotatably attached to a housing of the device or a privacy panel including a slider bar that is to be displayed on a touch screen display of the device.