中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

13 records (took 0.022 seconds)

    Multicore memory data recorder for kernel module
    2.
    发明授权
    Multicore memory data recorder for kernel module 有权

    公开(公告)号：US10649899B2

    公开(公告)日：2020-05-12

    申请号：US15505879

    申请日：2014-09-25

    Applicant: INTEL CORPORATION

    Inventor： Sai Luo ,  Tin-Fook Ngai ,  Hu Chen ,  Xiaocheng Zhou ,  Chunxiao Lin ,  Kang Zhao

    IPC: G06F12/00 ,  G06F12/0842 ,  G06F11/36 ,  G06F12/0831 ,  G06F12/0875

    Abstract: A processing device includes a processing core, coupled to a memory, to execute a task including a code segment identified as being monitored and a kernel recorder, coupled to the processing core via a core interface. The kernel recorder includes a first filter circuit to responsive to determining that the task being executed enters the code segment, set the kernel recorder to a first mode under which the kernel recorder is to record, in a first record, a plurality of memory addresses accessed by the code segment, and responsive to determining that the execution of the task exits the code segment, set the kernel recorder to a second mode under which the kernel recorder is to detect a write operation to a memory address recorded in the first record and record the memory address in a second record.

    Partial vectorization compilation system
    7.
    发明授权
    Partial vectorization compilation system 有权

    公开(公告)号：US09753727B2

    公开(公告)日：2017-09-05

    申请号：US13995721

    申请日：2012-10-25

    Applicant: Intel Corporation

    Inventor： Tin-Fook Ngai ,  Chunxiao Lin ,  Yingzhe Shen ,  Chao Zhang

    IPC: G06F9/30 ,  G06F9/45

    CPC classification number: G06F9/30036 ,  G06F8/433 ,  G06F8/4441 ,  G06F8/452

    Abstract: Generally, this disclosure provides technologies for generating and executing partially vectorized code that may include backward dependencies within a loop body of the code to be vectorized. The method may include identifying backward dependencies within a loop body of the code; selecting one or more ranges of iterations within the loop body, wherein the selected ranges exclude the identified backward dependencies; and vectorizing the selected ranges. The system may include a vector processor configured to provide predicated vector instruction execution, loop iteration range enabling, and dynamic loop dependence checking.

Patent Agency Ranking