-
公开(公告)号：US10747582B2
公开(公告)日：2020-08-18
申请号：US15822664
申请日：2017-11-27
摘要： A facility is provided that, when installed, removes from an architecture a selected architectural function, such that the function is not able to be turned on/off regardless of other controls within the environment. When the facility is installed, the architectural function is not supported when processing in an architectural mode based on the architecture. It is as if the selected architectural function is no longer available in the architecture, and in fact, the code implementing the facility may have been deleted, bypassed, or otherwise eliminated. One such architectural function is virtual address translation, such as dynamic address translation (DAT), and the architecture is, for instance, ESA/390.
-
公开(公告)号：US10657085B2
公开(公告)日：2020-05-19
申请号：US16519142
申请日：2019-07-23
IPC分类号： G06F13/24
摘要： Interruption facility for adjunct processor queues. In response to a queue transitioning from a no replies pending state to a reply pending state, an interruption is initiated. This interruption signals to a processor that a reply to a request is waiting on the queue. In order for the queue to take advantage of the interruption capability, it is enabled for interruptions.
-
公开(公告)号：US10360032B2
公开(公告)日：2019-07-23
申请号：US16126588
申请日：2018-09-10
发明人： Charles W. Gainey, Jr. , Dan F. Greiner , Lisa C. Heller , Damian L. Osisek , Gustav E. Sittmann, III
IPC分类号： G06F12/00 , G06F13/00 , G06F9/30 , G06F9/455 , G06F12/0891 , G06F12/02 , G06F12/1009 , G06F3/06 , G06F12/08 , G06F12/12
摘要： Optimizations are provided for frame management operations, including a clear operation and/or a set storage key operation, requested by pageable guests. The operations are performed, absent host intervention, on frames not resident in host memory. The operations may be specified in an instruction issued by the pageable guests.
-
公开(公告)号：US09934159B2
公开(公告)日：2018-04-03
申请号：US15159938
申请日：2016-05-20
发明人： Dan F. Greiner , Charles W. Gainey, Jr. , Lisa C. Heller , Damian L. Osisek , Erwin Pfeffer , Timothy J. Slegel , Charles F. Webb
IPC分类号： G06F12/00 , G06F12/1027 , G06F12/1009 , G06F12/14 , G06F12/02 , G06F12/1036 , G06F9/30 , G06F13/00 , G06F13/28
CPC分类号： G06F12/1027 , G06F9/30047 , G06F12/0215 , G06F12/1009 , G06F12/1036 , G06F12/145 , G06F2212/1052 , G06F2212/654 , G06F2212/656 , G06F2212/68
摘要： What is provided is an enhanced dynamic address translation facility. In one embodiment, a virtual address to be translated is first obtained and an initial origin address of a translation table of the hierarchy of translation tables is obtained. Based on the obtained initial origin, a segment table entry is obtained. The segment table entry is configured to contain a format control and access validity fields. If the format control and access validity fields are enabled, the segment table entry further contains an access control field, a fetch protection field, and a segment-frame absolute address. Store operations are permitted only if the access control field matches a program access key provided by any one of a Program Status Word or an operand of a program instruction being emulated. Fetch operations are permitted if the program access key associated with the virtual address is equal to the segment access control field or the fetch protection field is not enabled.
-
公开(公告)号：US09747033B2
公开(公告)日：2017-08-29
申请号：US15157875
申请日：2016-05-18
发明人： Peter D. Driever , Charles W. Gainey, Jr. , Steven G. Glassen , Thomas B. Mathias , Kenneth J. Oakes , Peter G. Sutton , Peter K. Szwed , Elpida Tzortzatos , Harry M Yudenfriend
CPC分类号： G06F3/0605 , G06F3/061 , G06F3/0631 , G06F3/0632 , G06F3/0659 , G06F3/067 , G06F3/0688 , G06F9/3004 , G06F9/30076 , G06F12/0246 , G06F12/0646 , G06F13/14 , G06F2212/214 , G06F2212/7202
摘要： An abstraction for storage class memory is provided that hides the details of the implementation of storage class memory from a program, and provides a standard channel programming interface for performing certain actions, such as controlling movement of data between main storage and storage class memory or managing storage class memory.
-
6.发明授权Method for executing a query instruction for idle time accumulation among cores in a multithreading computer system 有权一种用于在多线程计算机系统中执行用于空闲时间累积的查询指令的方法公开(公告)号：US09594661B2
公开(公告)日：2017-03-14
申请号：US14828795
申请日：2015-08-18
发明人： Jonathan D. Bradbury , Fadi Y. Busaba , Mark S. Farrell , Charles W. Gainey, Jr. , Dan F. Greiner , Lisa Cranton Heller , Jeffrey P. Kubala , Damian L. Osisek , Donald W. Schmidt , Timothy J. Slegel
CPC分类号： G06F11/3423 , G06F1/14 , G06F9/30076 , G06F9/30145 , G06F9/3851 , G06F9/45533 , G06F9/46 , G06F9/4887 , G06F9/5077 , G06F11/302 , G06F11/3024 , G06F11/3442 , G06F2201/865
摘要： Embodiments relate to idle time accumulation in a multithreading computer system. According to one aspect, a computer-implemented method for idle time accumulation in a computer system is provided. The computer system includes a configuration having a plurality of cores and an operating system (OS)-image configurable between single thread (ST) mode and a multithreading (MT) mode in a logical partition. The MT mode supports multiple threads on shared resources per core simultaneously. The method includes executing a query instruction on an initiating core of the plurality of cores. The executing includes obtaining, by the OS-image, a maximum thread identification value indicating a current maximum thread identifier of the cores within the logical partition. The initiating core also obtains a multithreading idle time value for each of the cores indicating an aggregate amount of idle time of all threads enabled on each of the cores in the MT mode.
摘要翻译： 实施例涉及多线程计算机系统中的空闲时间累积。 根据一个方面，提供了一种用于计算机系统中的空闲时间累积的计算机实现的方法。 计算机系统包括具有多个核心的配置和在逻辑分区中在单线程（ST）模式和多线程（MT））模式之间可配置的操作系统（OS）图像。 MT模式同时支持每个核心共享资源上的多个线程。 该方法包括在多个核的启动核上执行查询指令。 执行包括通过OS映像获得指示逻辑分区内的核的当前最大线程标识符的最大线程标识值。 启动核心还获得每个核心的多线程空闲时间值，其指示在MT模式中在每个核心上启用的所有线程的空闲时间的总量。
-
公开(公告)号：US09378128B2
公开(公告)日：2016-06-28
申请号：US14634020
申请日：2015-02-27
发明人： Dan F. Greiner , Charles W. Gainey, Jr. , Lisa C. Heller , Damian L. Osisek , Erwin Pfeffer , Timothy J. Slegel , Charles F. Webb
CPC分类号： G06F12/1027 , G06F9/30047 , G06F12/0215 , G06F12/1009 , G06F12/1036 , G06F12/145 , G06F2212/1052 , G06F2212/654 , G06F2212/656 , G06F2212/68
摘要： What is provided is an enhanced dynamic address translation facility. In one embodiment, a virtual address to be translated is first obtained and an initial origin address of a translation table of the hierarchy of translation tables is obtained. Based on the obtained initial origin, a segment table entry is obtained. The segment table entry is configured to contain a format control and access validity fields. If the format control and access validity fields are enabled, the segment table entry further contains an access control field, a fetch protection field, and a segment-frame absolute address. Store operations are permitted only if the access control field matches a program access key provided by any one of a Program Status Word or an operand of a program instruction being emulated. Fetch operations are permitted if the program access key associated with the virtual address is equal to the segment access control field or the fetch protection field is not enabled.
-
公开(公告)号：US09335995B2
公开(公告)日：2016-05-10
申请号：US14560639
申请日：2014-12-04
发明人： Steven R. Carlough , Reid T. Copeland , Charles W. Gainey, Jr. , Marcel Mitran , Eric M. Schwarz , Timothy J. Slegel
IPC分类号： G06F9/30
CPC分类号： G06F9/30181 , G06F7/483 , G06F9/3001 , G06F9/30025 , G06F9/30036 , G06F9/30098
摘要： Machine instructions, referred to herein as a long Convert from Zoned instruction (CDZT) and extended Convert from Zoned instruction (CXZT), are provided that read EBCDIC or ASCII data from memory, convert it to the appropriate decimal floating point format, and write it to a target floating point register or floating point register pair. Further, machine instructions, referred to herein as a long Convert to Zoned instruction (CZDT) and extended Convert to Zoned instruction (CZXT), are provided that convert a decimal floating point (DFP) operand in a source floating point register or floating point register pair to EBCDIC or ASCII data and store it to a target memory location.
摘要翻译： 机器指令（本文称为长期转换分区指令（CDZT））并从分区指令（CXZT）扩展转换，从内存中读取EBCDIC或ASCII数据，将其转换为适当的十进制浮点格式，并将其写入 到目标浮点寄存器或浮点寄存器对。 此外，还提供将机器指令（本文称为长转换为分区指令（CZDT））和扩展转换为分区指令（CZXT），转换为源浮点寄存器或浮点寄存器中的十进制浮点（DFP）操作数 与EBCDIC或ASCII数据配对，并将其存储到目标存储器位置。
-
公开(公告)号：US09250903B2
公开(公告)日：2016-02-02
申请号：US13792276
申请日：2013-03-11
CPC分类号： G06F9/30145 , G06F9/30021 , G06F9/3005 , G06F9/30076 , G06F9/30101 , G06F9/455 , G06F11/3636 , G06F11/3648
摘要： The invention relates to determining the status of run-time-instrumentation controls. The status is determined by executing a test run-time-instrumentation controls (TRIC) instruction. The TRIC instruction is executed in either a supervisor state or a lesser-privileged state. The TRIC instruction determines whether the run-time-instrumentation controls have changed. The run-time-instrumentation controls are set to an initial value using a privileged load run-time-instrumentation controls (LRIC) instruction. The TRIC instruction is fetched and executed. If the TRIC instruction is enabled, then it is determined if the initial value set by the run-time-instrumentation controls has been changed. If the initial value set by the run-time-instrumentation controls has been changed, then a condition code is set to a first value.
摘要翻译： 本发明涉及确定运行时仪表控制的状态。 通过执行测试运行时仪表控制（TRIC）指令来确定状态。 TRIC指令在监督状态或较低权限状态下执行。 TRIC指令确定运行时仪表控件是否已更改。 使用特权负载运行时仪表控件（LRIC）指令将运行时仪表控件设置为初始值。 获取并执行TRIC指令。 如果启用了TRIC指令，则确定运行时间仪表控制设置的初始值是否已更改。 如果由运行时间检测控件设置的初始值已更改，则将条件代码设置为第一个值。
-
公开(公告)号：US09116635B2
公开(公告)日：2015-08-25
申请号：US13719947
申请日：2012-12-19
发明人： Peter D. Driever , Charles W. Gainey, Jr. , Steven G. Glassen , Thomas B. Mathias , Kenneth J. Oakes , Peter G. Sutton , Peter K. Szwed , Elpida Tzortzatos , Harry M. Yudenfriend
CPC分类号： G06F3/0605 , G06F3/061 , G06F3/0631 , G06F3/0632 , G06F3/0659 , G06F3/067 , G06F3/0688 , G06F9/3004 , G06F9/30076 , G06F12/0246 , G06F12/0646 , G06F13/14 , G06F2212/214 , G06F2212/7202
摘要： An abstraction for storage class memory is provided that hides the details of the implementation of storage class memory from a program, and provides a standard channel programming interface for performing certain actions, such as controlling movement of data between main storage and storage class memory or managing storage class memory.
-
-
-
-
-
-
-
-
-
搜索结果
91 条记录 (耗时 0.041 秒)
