MEMORY STATE INDICATOR CHECK OPERATIONS
    2.
    发明申请
    MEMORY STATE INDICATOR CHECK OPERATIONS 审中-公开
    记忆状态指示灯检查操作

    公开(公告)号:US20170003886A1

    公开(公告)日:2017-01-05

    申请号:US14755732

    申请日:2015-06-30

    IPC分类号: G06F3/06 G06F12/08

    摘要: Aspects include a computer-implemented method includes receiving an instruction at a processor to perform an operation on a memory block having an address and accessing a state indicator by the processor without altering a value of the state indicator. The state indicator is stored in a memory location independent of the memory block, and accessing includes sending a request to an operator to return the value of the state indicator to the processor. The method also includes determining based on the value of the state indicator whether the memory block is in a pre-defined state.

    摘要翻译: 方面包括计算机实现的方法,包括在处理器处接收指令以对具有地址的存储器块执行操作,并且由处理器访问状态指示符,而不改变状态指示符的值。 状态指示符存储在独立于存储器块的存储位置中,并且访问包括向操作者发送请求以将状态指示符的值返回到处理器。 该方法还包括基于状态指示符的值来确定存储器块是否处于预定义状态。

    MEMORY STATE INDICATOR
    4.
    发明申请
    MEMORY STATE INDICATOR 审中-公开
    记忆状态指示器

    公开(公告)号:US20170003893A1

    公开(公告)日:2017-01-05

    申请号:US14854248

    申请日:2015-09-15

    IPC分类号: G06F3/06

    摘要: Aspects include a computer-implemented method that includes receiving an instruction at a processor, the instruction associated with a memory block having an address, and accessing a state indicator by the processor. The state indicator indicates whether the memory block is in a pre-defined state, and the state indicator is accessible by the processor independent of the memory block. The method also includes, based on the state indicator indicating that the memory block is in the pre-defined state, inspecting a subset of data values in the memory block, and identifying the pre-defined state of the memory block based on the subset of data values.

    摘要翻译: 方面包括计算机实现的方法,其包括在处理器处接收指令,与具有地址的存储器块相关联的指令,以及由处理器访问状态指示符。 状态指示器指示存储器块是否处于预定义状态,并且处理器可以独立于存储器块访问状态指示符。 该方法还包括:基于指示存储器块处于预定义状态的状态指示符,检查存储器块中的数据值的子集,以及基于存储器块的子集来识别存储块的预定义状态 数据值。

    Dynamic Address Translation with Translation Table Entry Format Control for Identifying Format of the Translation Table Entry
    5.
    发明申请
    Dynamic Address Translation with Translation Table Entry Format Control for Identifying Format of the Translation Table Entry 有权
    用于识别翻译表格格式的翻译表格格式控制的动态地址转换

    公开(公告)号:US20140181463A1

    公开(公告)日:2014-06-26

    申请号:US14133796

    申请日:2013-12-19

    IPC分类号: G06F12/10

    CPC分类号: G06F12/1009 G06F12/1027

    摘要: An enhanced dynamic address translation facility is provided. In one embodiment, a virtual address to be translated and an initial origin address of a translation table of the hierarchy of translation tables are obtained. An index portion of the virtual address is used to reference an entry in the translation table. If a format control field contained in the translation table entry is enabled, the table entry contains a frame address of a large block of data of at least 1M byte in size. The frame address is then combined with an offset portion of the virtual address to form the translated address of a small 4K byte block of data in main storage or memory.

    摘要翻译: 提供增强的动态地址转换工具。 在一个实施例中,获得要转换的虚拟地址和翻译表的层次结构的转换表的初始起始地址。 虚拟地址的索引部分用于引用转换表中的条目。 如果启用了转换表条目中包含的格式控制字段,则表项包含大小至少为1M字节的大块数据的帧地址。 然后将帧地址与虚拟地址的偏移部分组合以形成主存储器或存储器中的小4K字节数据块的转换地址。

    SHARED MEMORY TRANSLATION FACILITY
    6.
    发明申请
    SHARED MEMORY TRANSLATION FACILITY 有权
    共享内存翻译设施

    公开(公告)号:US20130311726A1

    公开(公告)日:2013-11-21

    申请号:US13950446

    申请日:2013-07-25

    IPC分类号: G06F12/00

    摘要: Aspects include a system, method and computer program product for providing a shared memory translation facility. The method includes receiving a request for access to a memory address from a requestor at a configuration, the receiving at a shared memory translation mechanism. It is determined whether the memory address refers to a shared memory object (SMO), the SMO accessible by a plurality of configurations managed in different zones of memory. Based on determining that the memory address refers to the SMO, it is determined whether the configuration has access to the SMO. Based on determining that the configuration has access to the SMO, the requestor is provided a system absolute address for the SMO and access to the SMO. In this manner direct interchange of data between the configuration and the plurality of configurations is allowed.

    摘要翻译: 方面包括用于提供共享存储器翻译设备的系统,方法和计算机程序产品。 该方法包括在配置下从请求者接收访问存储器地址的请求,在共享存储器转换机制处接收。 确定存储器地址是指通过在不同存储器区域中管理的多个配置可访问的共享存储器对象(SMO)。 基于确定存储器地址是指SMO,确定配置是否可以访问SMO。 基于确定配置可以访问SMO,请求者为SMO提供系统绝对地址并访问SMO。 以这种方式允许配置和多个配置之间的数据直接交换。

    Load Pair Disjoint Facility and Instruction Therefore
    7.
    发明申请
    Load Pair Disjoint Facility and Instruction Therefore 有权
    负载对不相交设施和说明因此

    公开(公告)号:US20130117546A1

    公开(公告)日:2013-05-09

    申请号:US13726746

    申请日:2012-12-26

    IPC分类号: G06F9/30

    摘要: A Load/Store Disjoint instruction, when executed by a CPU, accesses operands from two disjoint memory locations and sets condition code indicators to indicate whether or not the two operands appeared to be accessed atomically by means of block-concurrent interlocked fetch with no intervening stores to the operands from other CPUs. In a Load Pair Disjoint form of the instruction, the accesses are loads and the disjoint data is stored in general registers.

    摘要翻译: 加载/存储不相交指令在由CPU执行时,从两个不相交的存储器位置访问操作数,并设置条件代码指示符,以指示两个操作数是否似乎以原子方式访问,通过块并发互锁获取,无中间存储 到其他CPU的操作数。 在负载对不相交形式的指令中,访问是加载,不相交的数据存储在通用寄存器中。

    OPERAND FETCHING CONTROL AS A FUNCTION OF BRANCH CONFIDENCE
    8.
    发明申请
    OPERAND FETCHING CONTROL AS A FUNCTION OF BRANCH CONFIDENCE 有权
    操作控制作为分支机构的功能

    公开(公告)号:US20130091343A1

    公开(公告)日:2013-04-11

    申请号:US13652544

    申请日:2012-10-16

    IPC分类号: G06F9/38

    摘要: Data operand fetching control includes calculating a summation weight value for each instruction in a pipeline, the summation weight value calculated as a function of branch uncertainty and a pendency in which the instruction resides in the pipeline relative to other instructions in the pipeline. The data operand fetching control also includes mapping the summation weight value of a selected instruction that is attempting to access system memory to a memory access control. Each memory access control specifies a manner of handling data fetching operations. The data operand fetching control further includes performing a memory access operation for the selected instruction based upon the mapping.

    摘要翻译: 数据操作数获取控制包括计算流水线中每个指令的求和权重值,求和作为分支不确定度函数计算的求和权重值以及相对于流水线中的其他指令,指令驻留在流水线中的挂钩。 数据操作数获取控制还包括将尝试访问系统存储器的选定指令的求和权重值映射到存储器访问控制。 每个存储器访问控制指定处理数据获取操作的方式。 数据操作数提取控制还包括基于映射执行所选指令的存储器访问操作。

    Memory state indicator check operations

    公开(公告)号:US10884946B2

    公开(公告)日:2021-01-05

    申请号:US14854240

    申请日:2015-09-15

    摘要: Aspects include a computer-implemented method that includes receiving an instruction at a processor to perform an operation on a memory block having an address and accessing a state indicator by the processor without altering a value of the state indicator. The state indicator is stored in a memory location independent of the memory block, and accessing includes sending a request to an operator to return the value of the state indicator to the processor. The method also includes determining based on the value of the state indicator whether the memory block is in a pre-defined state.

    Memory state indicator check operations

    公开(公告)号:US10884945B2

    公开(公告)日:2021-01-05

    申请号:US14755732

    申请日:2015-06-30

    摘要: Aspects include a computer-implemented method includes receiving an instruction at a processor to perform an operation on a memory block having an address and accessing a state indicator by the processor without altering a value of the state indicator. The state indicator is stored in a memory location independent of the memory block, and accessing includes sending a request to an operator to return the value of the state indicator to the processor. The method also includes determining based on the value of the state indicator whether the memory block is in a pre-defined state.