公开(公告)号：US20250113618A1

公开(公告)日：2025-04-03

申请号：US18887167

申请日：2024-09-17

Applicant: Japan Display Inc.

Inventor： Hajime WATAKABE ,  Masashi TSUBUKU ,  Kentaro MIURA ,  Masahiro WATABE

IPC: H01L27/12 ,  H01L29/786

Abstract: A semiconductor device according to an embodiment of the present invention includes: a first semiconductor layer; a first gate electrode; a first gate insulating layer; a first insulating layer above the first gate electrode; a first electrode overlapping the first semiconductor layer, and electrically connected to the first semiconductor layer; a second semiconductor layer above the first insulating layer and made of a different material from the first semiconductor layer; a second gate electrode; a second gate insulating layer; a second electrode overlapping the second semiconductor layer, and electrically connected to the second semiconductor layer; and a first metal nitride layer between the second semiconductor layer and the second electrode, wherein the second semiconductor layer is polycrystalline, and an etching rate of the second semiconductor layer with respect to an etchant including phosphoric acid as a main component is less than 3 nm/min at 40° C.

公开(公告)号：US20250113543A1

公开(公告)日：2025-04-03

申请号：US18895479

申请日：2024-09-25

Applicant: Japan Display Inc.

Inventor： Hajime WATAKABE ,  Masashi TSUBUKU ,  Kentaro MIURA ,  Akihiro HANADA ,  Masahiro WATABE

IPC: H01L29/786 ,  H01L29/423

Abstract: A semiconductor device according to an embodiment of the present invention includes an oxide semiconductor layer having a polycrystalline structure and including an impurity region containing an impurity element, a gate electrode over the oxide semiconductor layer, an insulating layer between the oxide semiconductor layer and the gate electrode, a first contact hole penetrating the insulating layer and exposing the impurity region, a second contact hole penetrating at least the insulating layer and having a greater depth than the first contact hole, and a connection wiring electrically connecting the impurity region to a layer which is exposed in the second contact hole through the first contact hole and the second contact hole. The connection wiring includes a first conductive layer and a second conductive layer on the first conductive layer. A portion of the first conductive layer that is exposed from the second conductive layer contains the impurity element.

公开(公告)号：US20250015168A1

公开(公告)日：2025-01-09

申请号：US18894340

申请日：2024-09-24

Applicant: Japan Display Inc.

Inventor： Takaya TAMARU ,  Masashi TSUBUKU ,  Hajime WATAKABE ,  Toshinari SASAKI

IPC: H01L29/66 ,  G02F1/1368 ,  H01L21/02 ,  H01L29/786 ,  H10K59/121

Abstract: A method for manufacturing a semiconductor device, the method comprising steps of: forming a first metal oxide layer containing aluminium as a main component above an insulating surface; performing a planarization process on a surface of the first metal oxide layer; forming an oxide semiconductor layer on the insulating surface on which the planarization process is performed; forming a gate insulating layer above the oxide semiconductor layer; and forming a gate electrode facing the oxide semiconductor layer above the gate insulating layer.

公开(公告)号：US20240379829A1

公开(公告)日：2024-11-14

申请号：US18656855

申请日：2024-05-07

Applicant: Japan Display Inc.

Inventor： Hajime WATAKABE ,  Masashi TSUBUKU ,  Toshinari SASAKI ,  Takaya TAMARU ,  Marina MOCHIZUKI ,  Ryo ONODERA ,  Masahiro WATABE

IPC: H01L29/66 ,  G02F1/1368 ,  H01L29/45 ,  H01L29/786 ,  H10K59/122

Abstract: A semiconductor device includes a gate electrode, a gate insulating layer over the gate electrode, an oxide semiconductor layer having a polycrystalline structure over the gate insulating layer, a source electrode and a drain electrode over the oxide semiconductor layer, and an interlayer insulating layer in contact with the oxide semiconductor layer, the interlayer insulating layer covering the source electrode and the drain electrode. The oxide semiconductor layer includes a first region overlapping one of the source electrode and the drain electrode and a second region in contact with the interlayer insulating layer. A difference between a thickness of the first region and a thickness of the second region is less than or equal to 1 nm.

公开(公告)号：US20240369891A1

公开(公告)日：2024-11-07

申请号：US18777958

申请日：2024-07-19

Applicant: Japan Display Inc.

Inventor： Akihiro HANADA ,  Toshihide JINNAI ,  Isao SUZUMURA ,  Hajime WATAKABE ,  Ryo ONODERA

IPC: G02F1/1368 ,  G02F1/1362 ,  H01L29/786 ,  H10K50/86 ,  H10K59/131

Abstract: A display device including: a substrate; a first thin film transistor of polysilicon semiconductor, a second thin film transistor of oxide semiconductor; a first light shading film opposing to the polysilicon semiconductor, and a second light shading film opposing to the oxide semiconductor; a first insulating film, a second insulating film which is constituted from plural insulating films, and a third insulating film superposed in this order; a first through hole penetrating the second insulating film and not penetrating the first insulating film and the third insulating film; a second through hole penetrating the first insulating film and the third insulating film; the first light shading film connects with a first conductive component, a part of the first conductive component exists on the third insulating film, through the second through hole.

公开(公告)号：US20240021668A1

公开(公告)日：2024-01-18

申请号：US18335447

申请日：2023-06-15

Applicant: Japan Display Inc.

Inventor： Hajime WATAKABE ,  Masashi TSUBUKU ,  Toshinari SASAKI ,  Takaya TAMARU

IPC: H01L29/04 ,  H01L21/02

CPC classification number: H01L29/04 ,  H01L21/02595 ,  H01L21/02609 ,  H01L21/02554 ,  H01L21/02129

Abstract: A semiconductor device includes an oxide semiconductor layer having a polycrystalline structure on an insulating surface, a gate electrode over the oxide semiconductor layer, and a gate insulating layer between the oxide semiconductor layer and the gate electrode. The oxide semiconductor layer includes a first region having a first crystal structure overlapping the gate electrode and a second region having a second crystal structure not overlapping the gate electrode. An electrical conductivity of the second region is larger than an electrical conductivity of the first region. The second crystal structure is identical to the first crystal structure.

公开(公告)号：US20230185144A1

公开(公告)日：2023-06-15

申请号：US18164809

申请日：2023-02-06

Applicant: Japan Display Inc.

Inventor： Akihiro HANADA ,  Toshihide JINNAI ,  Isao SUZUMURA ,  Hajime WATAKABE ,  Ryo ONODERA

IPC: G02F1/1368 ,  G02F1/1362 ,  H01L29/786 ,  H10K50/86 ,  H10K59/131

CPC classification number: G02F1/1368 ,  G02F1/136209 ,  G02F1/136277 ,  G02F1/136286 ,  H01L29/78633 ,  H01L29/78672 ,  H10K50/865 ,  H10K59/131

Abstract: A display device including: a substrate; a first thin film transistor of polysilicon semiconductor, a second thin film transistor of oxide semiconductor; a first light shading film opposing to the polysilicon semiconductor, and a second light shading film opposing to the oxide semiconductor; a first insulating film, a second insulating film which is constituted from plural insulating films, and a third insulating film superposed in this order; a first through hole penetrating the second insulating film and not penetrating the first insulating film and the third insulating film; a second through hole penetrating the first insulating film and the third insulating film; the first light shading film connects with a first conductive component, a part of the first conductive component exists on the third insulating film, through the second through hole.

公开(公告)号：US20220367528A1

公开(公告)日：2022-11-17

申请号：US17876063

申请日：2022-07-28

Applicant: Japan Display Inc.

Inventor： Akihiro HANADA ,  Hajime WATAKABE ,  Kazufumi WATABE

IPC: H01L27/12 ,  H02J13/00 ,  G06F1/26 ,  H04L41/069 ,  H04L47/2416 ,  H04L67/12

Abstract: A semiconductor device includes an insulating substrate, a first semiconductor layer formed of silicon and positioned above the insulating substrate, a second semiconductor layer formed of a metal oxide and positioned above the first semiconductor layer, a first insulating film formed of a silicon nitride and positioned between the first semiconductor layer and the second semiconductor layer, and a block layer positioned between the first semiconductor film and the second semiconductor layer, the block layer hydrogen diffusion of which is lower than that of the first insulating film.

公开(公告)号：US20220173247A1

公开(公告)日：2022-06-02

申请号：US17522258

申请日：2021-11-09

Applicant: Japan Display Inc.

Inventor： Akihiro HANADA ,  Hajime WATAKABE ,  Takuo KAITOH ,  Ryo ONODERA

IPC: H01L29/786

Abstract: A semiconductor device includes a thin-film transistor. The thin-film transistor comprises an oxide semiconductor layer, a gate insulating layer, a gate electrode overlapped on the oxide semiconductor layer through the gate insulating layer, a source electrode in contact with the oxide semiconductor layer, a drain electrode in contact with the oxide semiconductor layer and a first metal layer in contact with the oxide semiconductor layer and disposed between the source electrode and the drain electrode at a distance from the source electrode and the drain electrode.

公开(公告)号：US20210391359A1

公开(公告)日：2021-12-16

申请号：US17459423

申请日：2021-08-27

Applicant: Japan Display Inc.

Inventor： Hajime WATAKABE ,  Isao SUZUMURA ,  Akihiro HANADA ,  Yohei YAMAGUCHI

IPC: H01L27/12 ,  H01L29/24 ,  H01L29/66 ,  H01L29/786

Abstract: A display device including a substrate having thin film transistors (TFT) comprising: the TFT including an oxide semiconductor film, a gate electrode and an insulating film formed between the oxide semiconductor film and the gate electrode, wherein a first aluminum oxide film and a second aluminum oxide film, which is formed on the first aluminum oxide film, are formed between the insulating film and the gate electrode, an oxygen concentration in the first aluminum oxide film is bigger than an oxygen concentration in the second aluminum oxide film.