公开(公告)号：US07687203B2

公开(公告)日：2010-03-30

申请号：US11835887

申请日：2007-08-08

申请人： Jaephil Cho ,  Youn-Han Chang ,  Jin-Young Kim ,  Yoo-Jung Kim ,  Hyun-Jung Kim ,  Hae-Suk Hwang

发明人： Jaephil Cho ,  Youn-Han Chang ,  Jin-Young Kim ,  Yoo-Jung Kim ,  Hyun-Jung Kim ,  Hae-Suk Hwang

IPC分类号： H01M4/58

CPC分类号： H01M4/483 ,  H01M4/362 ,  H01M4/525 ,  H01M4/581 ,  H01M2004/028

摘要： The positive active material according to one embodiment of the present invention includes a composite metal oxide of the following Formula 1, and a compound being capable of intercalating and deintercalating lithium having the composite metal oxide coated on the surface thereof. M1-xAlO2   [Chemical Formula 1] Wherein, in the above Formula 1, M is selected from the group consisting of an alkali metal, an alkaline-earth metal, and combinations thereof, and 0.03≦x≦0.95. The composite metal oxide increases impregnation of an electrolyte, improves lithium mobility, and decreases internal resistance of a rechargeable lithium battery, and thereby improves discharge capacity and cycle-life characteristics.

摘要翻译： 根据本发明的一个实施方案的正极活性物质包括下式1的复合金属氧化物和能够在其表面上涂覆复合金属氧化物的锂的嵌入和脱嵌化合物。 M1-xAlO2 [化学式1]其中，在上述式1中，M选自碱金属，碱土金属及其组合，0.03和n1E; x和nlE; 0.95。 复合金属氧化物增加电解质的浸渍，提高锂的迁移率，降低可再充电锂电池的内阻，从而提高放电容量和循环寿命特性。

公开(公告)号：US20080153001A1

公开(公告)日：2008-06-26

申请号：US11835887

申请日：2007-08-08

申请人： Jaephil CHO ,  Youn-Han Chang ,  Jin-Young Kim ,  Yoo-Jung Kim ,  Hyun-Jung Kim ,  Hae-Suk Hwang

发明人： Jaephil CHO ,  Youn-Han Chang ,  Jin-Young Kim ,  Yoo-Jung Kim ,  Hyun-Jung Kim ,  Hae-Suk Hwang

IPC分类号： H01M10/00 ,  H01M10/04

CPC分类号： H01M4/483 ,  H01M4/362 ,  H01M4/525 ,  H01M4/581 ,  H01M2004/028

摘要： The positive active material according to one embodiment of the present invention includes a composite metal oxide of the following Formula 1, and a compound being capable of intercalating and deintercalating lithium having the composite metal oxide coated on the surface thereof. M1-xAlO2 [Chemical Formula 1] Wherein, in the above Formula 1, M is selected from the group consisting of an alkali metal, an alkaline-earth metal, and combinations thereof, and 0.03≦x≦0.95. The composite metal oxide increases impregnation of an electrolyte, improves lithium mobility, and decreases internal resistance of a rechargeable lithium battery, and thereby improves discharge capacity and cycle-life characteristics.

摘要翻译： 根据本发明的一个实施方案的正极活性物质包括下式1的复合金属氧化物和能够在其表面上涂覆复合金属氧化物的锂的嵌入和脱嵌化合物。 <？in-line-formula description =“In-line Formulas”end =“lead”？> M 1-x A 2 O 2化学式1 < -line-formula description =“In-line Formulas”end =“tail”？>其中，在上述式1中，M选自碱金属，碱土金属及其组合，以及 0.03 <= x <= 0.95。 复合金属氧化物增加电解质的浸渍，提高锂的迁移率，降低可再充电锂电池的内阻，从而提高放电容量和循环寿命特性。

公开(公告)号：US20080286656A1

公开(公告)日：2008-11-20

申请号：US11937066

申请日：2007-11-08

申请人： Jaephil CHO ,  Youn-Han Chang ,  Jin-Young Kim

发明人： Jaephil CHO ,  Youn-Han Chang ,  Jin-Young Kim

IPC分类号： H01M4/58 ,  H01M10/00 ,  H01M4/62

CPC分类号： H01M4/485 ,  H01M10/052 ,  H01M2004/021 ,  H01M2004/027 ,  Y02T10/7011

摘要： A negative active material for a lithium secondary battery according to an embodiment of the present invention includes a core material including an inorganic particulate that is capable of forming a compound by a reversible reaction with lithium, and a surface-treatment layer disposed on the surface of the core material. The surface-treatment layer includes a metal having electronic conductivity of 103 S/cm or more. The negative active material can improve high-rate performance of a lithium secondary battery.

摘要翻译： 根据本发明的一个实施方案的用于锂二次电池的负极活性材料包括芯材，其包括能够通过与锂的可逆反应形成化合物的无机颗粒和设置在锂表面的表面处理层 核心材料。 表面处理层包括具有10 3 S / cm以上的电子导电性的金属。 负极活性物质可以提高锂二次电池的高速率性能。

公开(公告)号：US20120064408A1

公开(公告)日：2012-03-15

申请号：US12909934

申请日：2010-10-22

申请人： Hyun-Kon Song ,  Myeong-Hee Lee ,  Jin-Young Kim ,  Soojin Park ,  Jaephil Cho

发明人： Hyun-Kon Song ,  Myeong-Hee Lee ,  Jin-Young Kim ,  Soojin Park ,  Jaephil Cho

IPC分类号： H01M4/485 ,  H01M4/90 ,  H01M4/525 ,  H01M4/583 ,  H01M4/52

CPC分类号： H01M4/625 ,  H01M4/136 ,  H01M4/1397 ,  H01M4/366 ,  H01M4/5825 ,  H01M10/0525

摘要： Provided is a positive active material for a lithium rechargeable battery that includes primary particles including a compound being capable of intercalating and deintercalating lithium, and secondary particles including the primary particles gathered with one another, wherein the secondary particles have a void core structure. A method of preparing the same and a lithium rechargeable battery including the same are also provided.

摘要翻译： 提供了一种锂可再充电电池的正极活性材料，其包括一次粒子，其包括能够嵌入和脱嵌锂的化合物，以及包含彼此聚集的一次粒子的二次粒子，其中二次粒子具有空心核心结构。 还提供了制备该方法和包含该锂二次电池的锂可再充电电池的方法。

公开(公告)号：US09094482B2

公开(公告)日：2015-07-28

申请号：US13484401

申请日：2012-05-31

申请人： Jin-Young Kim ,  Young-Sam Jun

发明人： Jin-Young Kim ,  Young-Sam Jun

IPC分类号： H04W8/26 ,  H04W36/14 ,  H04L29/12

CPC分类号： H04L61/6077 ,  H04L61/2528 ,  H04L61/2553 ,  H04W8/26 ,  H04W36/14

摘要： A data transmission/reception path between a server and a mobile terminal in a heterogeneous network environment is controlled by mapping at least one actual Internet protocol (IP) address available to the mobile terminal in the heterogeneous network environment to at least one virtual IP to generate a path mapping table, and determining a data transmission/reception path between the server and the mobile terminal with reference to the generated path mapping table. This virtualization of terminal actual addresses with respect to a server improves service continuity in an efficient, low cost manner, independent of the need to modify the OS kernel in various devices.

摘要翻译： 通过将异构网络环境中的移动终端可用的至少一个实际因特网协议（IP）地址映射到至少一个虚拟IP来生成异构网络环境中的服务器和移动终端之间的数据发送/接收路径，以产生 路径映射表，并且参考生成的路径映射表来确定服务器与移动终端之间的数据发送/接收路径。 终端实际地址相对于服务器的这种虚拟化可以以有效，低成本的方式提高服务连续性，而与在各种设备中修改OS内核的需要无关。

公开(公告)号：US08901645B2

公开(公告)日：2014-12-02

申请号：US13864347

申请日：2013-04-17

申请人： Sung-Il Cho ,  Nam-Gun Kim ,  Jin-Young Kim ,  Hyun-Chul Yoon ,  Bong-Soo Kim ,  Kwan-Sik Cho

发明人： Sung-Il Cho ,  Nam-Gun Kim ,  Jin-Young Kim ,  Hyun-Chul Yoon ,  Bong-Soo Kim ,  Kwan-Sik Cho

IPC分类号： H01L29/66 ,  H01L29/78 ,  H01L29/423 ,  H01L27/108

CPC分类号： H01L23/528 ,  H01L23/535 ,  H01L27/1052 ,  H01L27/10873 ,  H01L27/10876 ,  H01L27/10885 ,  H01L27/10888 ,  H01L27/10894 ,  H01L27/10897 ,  H01L29/0649 ,  H01L29/42324 ,  H01L29/45 ,  H01L29/78 ,  H01L29/7827 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device having a cell area and a peripheral area includes a semiconductor substrate, a cell insulating isolation region delimiting a cell active region of the semiconductor substrate in the cell area, a word line disposed within the semiconductor substrate in the cell area, a bit line contact plug disposed on the cell active region, a bit line disposed on the bit line contact plug, a peripheral insulating isolation region delimiting a peripheral active region of the semiconductor substrate in the peripheral area, and a peripheral transistor including a peripheral transistor lower electrode and a peripheral transistor upper electrode. The bit line contact plug is formed at the same level in the semiconductor device as the peripheral transistor lower electrode, and the bit line electrode is formed at the same level in the semiconductor device as the peripheral transistor upper electrode.

摘要翻译： 具有单元区域和周边区域的半导体器件包括半导体基板，限定单元区域中的半导体基板的单元有源区域的单元绝缘隔离区域，设置在单元区域中的半导体基板内的字线，位 设置在单元有源区上的线接触插塞，位线接触插头上的位线，限定周边区域中的半导体衬底的周边有源区域的外围绝缘隔离区域以及包括周边晶体管下电极的外围晶体管 和周边晶体管上电极。 位线接触插塞形成在半导体器件中与外围晶体管下电极相同的电平上，并且位线电极在半导体器件中形成为与外围晶体管上电极相同的电平。

公开(公告)号：US08626125B2

公开(公告)日：2014-01-07

申请号：US13351119

申请日：2012-01-16

申请人： Joon-Seub Lee ,  Jin-Young Kim ,  Min-Che Jeong

发明人： Joon-Seub Lee ,  Jin-Young Kim ,  Min-Che Jeong

IPC分类号： H04M1/66

CPC分类号： G06F21/45 ,  G06F21/52 ,  G06F21/554

摘要： A mobile terminal and a method for securing information are provided. The mobile terminal includes an application part to receive information related to an application; a determining unit to receive a command issued by the application and to determine whether the command or the application is authorized to access a system resource of the mobile terminal; and a blocking unit to block an execution of the command in response to a determination that the execution of the command is unauthorized or issued by the unauthorized application. The method includes receiving information related to an application; receiving a request for executing a command issued by the application; determining whether the requested command or the application is authorized to access a system resource of a mobile terminal; and blocking execution of the command in response to a determination that the execution of the command is unauthorized or issued by an unauthorized application.

摘要翻译： 提供了移动终端和用于保护信息的方法。 移动终端包括用于接收与应用有关的信息的应用部分; 确定单元，用于接收由所述应用发出的命令并确定所述命令或所述应用是否被授权访问所述移动终端的系统资源; 以及阻塞单元，用于响应于所述命令的执行被未经授权的应用未经授权或发出的确定而阻止所述命令的执行。 该方法包括接收与应用有关的信息; 接收执行应用程序发出的命令的请求; 确定所请求的命令或应用程序是否被授权访问移动终端的系统资源; 以及响应于所述命令的执行被未授权或未被授权的应用发出的确定而阻止所述命令的执行。

公开(公告)号：US20130228856A1

公开(公告)日：2013-09-05

申请号：US13864347

申请日：2013-04-17

申请人： Sung-Il Cho ,  Nam-Gun Kim ,  Jin-Young Kim ,  Hyun-Chul Yoon ,  Bong-Soo Kim ,  Kwan-Sik Cho

发明人： Sung-Il Cho ,  Nam-Gun Kim ,  Jin-Young Kim ,  Hyun-Chul Yoon ,  Bong-Soo Kim ,  Kwan-Sik Cho

IPC分类号： H01L29/78

CPC分类号： H01L23/528 ,  H01L23/535 ,  H01L27/1052 ,  H01L27/10873 ,  H01L27/10876 ,  H01L27/10885 ,  H01L27/10888 ,  H01L27/10894 ,  H01L27/10897 ,  H01L29/0649 ,  H01L29/42324 ,  H01L29/45 ,  H01L29/78 ,  H01L29/7827 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device having a cell area and a peripheral area includes a semiconductor substrate, a cell insulating isolation region delimiting a cell active region of the semiconductor substrate in the cell area, a word line disposed within the semiconductor substrate in the cell area, a bit line contact plug disposed on the cell active region, a bit line disposed on the bit line contact plug, a peripheral insulating isolation region delimiting a peripheral active region of the semiconductor substrate in the peripheral area, and a peripheral transistor including a peripheral transistor lower electrode and a peripheral transistor upper electrode. The bit line contact plug is formed at the same level in the semiconductor device as the peripheral transistor lower electrode, and the bit line electrode is formed at the same level in the semiconductor device as the peripheral transistor upper electrode.

公开(公告)号：US08199592B2

公开(公告)日：2012-06-12

申请号：US12591196

申请日：2009-11-12

申请人： Jin-Young Kim ,  Chul-Woo Park ,  Ki-Whan Song

发明人： Jin-Young Kim ,  Chul-Woo Park ,  Ki-Whan Song

IPC分类号： G11C7/00

CPC分类号： G11C11/4099 ,  G11C11/4091

摘要： A semiconductor memory device having the mismatch cell makes a capacitance difference between a bit line pair relatively large during a read operation using at least one dummy memory cell as a mismatch cell selected together with a corresponding memory cell. Therefore, data of a semiconductor memory device may be detected more easily.

摘要翻译： 具有不匹配单元的半导体存储器件在使用至少一个虚拟存储器单元作为与对应的存储器单元一起选择的不匹配单元的读取操作期间，位线对之间的电容差相对较大。 因此，可以更容易地检测半导体存储器件的数据。

公开(公告)号：US20110305069A1

公开(公告)日：2011-12-15

申请号：US13155492

申请日：2011-06-08

申请人： Jin-Young Kim ,  Ki-Whan Song

发明人： Jin-Young Kim ,  Ki-Whan Song

IPC分类号： G11C11/00

CPC分类号： G11C5/063 ,  G11C7/18 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/0023 ,  G11C13/0026 ,  G11C13/0028 ,  G11C13/0038

摘要： A nonvolatile memory device includes: a memory array including a plurality of memory banks which are arranged in a first direction; a write global bit line and a read global bit line extending in the first direction to be shared by the memory banks; a write circuit connected to the write global bit line and disposed on a first side of the memory array; and a read circuit connected to the read global bit line and disposed on a second side of the memory array opposite the first side of the memory array, wherein each of the memory banks extends in a second direction different from the first direction and comprises a plurality of nonvolatile memory cells, each of the nonvolatile memory cells having a variable resistive element whose resistance value varies according to data stored therein.

摘要翻译： 非易失性存储器件包括：存储器阵列，包括沿第一方向布置的多个存储体; 写入全局位线和在第一方向上延伸以由存储体共享的读取全局位线; 写入电路，连接到写入全局位线并且设置在存储器阵列的第一侧上; 以及读取电路，连接到读取的全局位线并且设置在与存储器阵列的第一侧相对的存储器阵列的第二侧上，其中每个存储体沿与第一方向不同的第二方向延伸并且包括多个 的非易失性存储单元，每个非易失性存储单元具有可变电阻元件，其电阻值根据存储在其中的数据而变化。