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公开(公告)号：US06479847B2
公开(公告)日：2002-11-12
申请号：US09306509
申请日：1999-05-07
IPC分类号： H01L2975
CPC分类号： H01L49/003 , H01L21/8238
摘要： A method of manufacturing an integrated circuit device includes forming a laminated structure having a first side and a second side, the first side includes a first type Mott channel layer and the second side includes a second type Mott channel layer. A first source region and a first drain region is formed on the first side, a second source region and a second drain region is formed on the second side, a first gate region is formed on the second side, opposite the first source region and the first drain region and a second gate region is formed on the first side, opposite the second source region and the second drain region. The first source, the first drain and the first gate comprise a first type field effect transistor and the second source, the second drain and the second gate comprise a second type field effect transistor.
摘要翻译： 一种集成电路器件的制造方法包括：形成具有第一侧面和第二侧面的层叠结构体，第一面包括第一类型的Mott沟道层，第二面包括第二类型的Mott沟道层。 第一源区和第一漏区形成在第一侧上，第二源区和第二漏区形成在第二侧上，第一栅极区形成在与第一源区相对的第二侧上， 第一漏区和第二栅区形成在与第二源区和第二漏区相对的第一侧上。 第一源极，第一漏极和第一栅极包括第一类型场效应晶体管，第二源极，第二漏极和第二栅极包括第二类型场效应晶体管。
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2.发明授权Process for fabricating a field-effect transistor with a buried Mott material oxide channel 失效用埋置的Mott材料氧化物沟道制造场效晶体管的工艺公开(公告)号：US06555393B2
公开(公告)日：2003-04-29
申请号：US09938392
申请日：2001-08-24
IPC分类号： H01L2100
CPC分类号： H01L49/003
摘要： A structure and method of forming an integrated circuit (e.g., field effect transistor) having a buried Mott-insulated oxide channel includes depositing source and drain electrodes over a substrate forming a Mott transition channel layer over the substrate and electrodes, forming an insulator layer over the Mott transition channel layer, forming source and drain contacts through the insulator layer (such that the source and drain contacts are electrically connected to the Mott transition channel layer) and forming a gate electrode over the insulator layer between the source and drain contacts.
摘要翻译： 形成具有掩埋的Mott绝缘氧化物沟道的集成电路（例如，场效应晶体管）的结构和方法包括在衬底上形成基底和电极上形成Mott过渡沟道层的衬底上沉积源极和漏极，形成绝缘体层 Mott过渡沟道层，通过绝缘体层形成源极和漏极触点（使得源极和漏极触点电连接到Mott过渡沟道层），并在源极和漏极触点之间的绝缘体层上形成栅电极。
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公开(公告)号：US06333543B1
公开(公告)日：2001-12-25
申请号：US09268633
申请日：1999-03-16
IPC分类号： H01L1912
CPC分类号： H01L49/003
摘要： A structure and method of forming an integrated circuit (e.g., field effect transistor) having a buried Mott-insulated oxide channel includes depositing source and drain electrodes over a substrate forming a Mott transition channel layer over the substrate and electrodes, forming an insulator layer over the Mott transition channel layer, forming source and drain contacts through the insulator layer (such that the source and drain contacts are electrically connected to the Mott transition channel layer) and forming a gate electrode over the insulator layer between the source and drain contacts.
摘要翻译： 形成具有掩埋的Mott绝缘氧化物沟道的集成电路（例如，场效应晶体管）的结构和方法包括在衬底上形成基底和电极上形成Mott过渡沟道层的衬底上沉积源极和漏极，形成绝缘体层 Mott过渡沟道层，通过绝缘体层形成源极和漏极触点（使得源极和漏极触点电连接到Mott过渡沟道层），并在源极和漏极触点之间的绝缘体层上形成栅电极。
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公开(公告)号：US06350622B2
公开(公告)日：2002-02-26
申请号：US09768172
申请日：2001-01-24
IPC分类号： H01L2100
CPC分类号： H01L49/003
摘要： A method and structure of forming an integrated circuit chip having a transistor includes forming a conductive oxide layer, forming a Mott transition oxide layer over the conductive oxide layer and forming an insulative oxide layer over the Mott transition oxide layer.
摘要翻译： 形成具有晶体管的集成电路芯片的方法和结构包括形成导电氧化物层，在导电氧化物层上形成Mott过渡氧化物层，并在Mott过渡氧化物层上形成绝缘氧化物层。
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公开(公告)号：US06259114B1
公开(公告)日：2001-07-10
申请号：US09306635
申请日：1999-05-07
IPC分类号： H01L2912
CPC分类号： H01L49/003
摘要： A method and structure of forming an integrated circuit chip having a transistor includes forming a conductive oxide layer, forming a Mott transition oxide layer over the conductive oxide layer and forming an insulative oxide layer over the Mott transition oxide layer.
摘要翻译： 形成具有晶体管的集成电路芯片的方法和结构包括形成导电氧化物层，在导电氧化物层上形成Mott过渡氧化物层，并在Mott过渡氧化物层上形成绝缘氧化物层。
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公开(公告)号：US06426536B1
公开(公告)日：2002-07-30
申请号：US09835509
申请日：2001-04-16
IPC分类号： H01L2976
CPC分类号： H01L49/003
摘要： A method for constructing oxide electrodes for use in an OxFET device is disclosed. The electrodes are formed by first depositing a double layer of conducting perovskite oxides onto an insulating oxide substrate. A resist pattern with the electrode configuration is then defined over the double layer by means of conventional lithography. The top oxide layer is ion milled to a depth preferably beyond the conducting oxide interface, but without reaching the substrate. Chemical etching or RIE is used to remove the part of the lower conductive oxide layer exposed by ion milling without damaging the substrate. Source and drain electrodes are thereby defined, which can be then be used as buried contacts for other perovskites that tend to react with metals. Also disclosed is a field effect transistor structure which includes these source and drain electrodes in a buried channel configuration.
摘要翻译： 公开了一种用于构造用于OxFET器件的氧化物电极的方法。 电极通过首先将双层导电钙钛矿氧化物沉积到绝缘氧化物基底上而形成。 然后通过常规光刻在双层上限定具有电极构型的抗蚀剂图案。 将顶部氧化物层离子研磨至优选超过导电氧化物界面的深度，但不到达衬底。 使用化学蚀刻或RIE来去除通过离子研磨暴露的下部导电氧化物层的一部分而不损坏衬底。 源电极和漏极电极由此被定义，然后可以将其用作倾向于与金属反应的其他钙钛矿的掩埋触点。 还公开了一种场效应晶体管结构，其包括处于掩埋沟道构型的这些源极和漏极。
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7.发明授权公开(公告)号：US06744087B2
公开(公告)日：2004-06-01
申请号：US10256881
申请日：2002-09-27
IPC分类号： H01L2976
CPC分类号： H01L27/11502 , G11C11/22 , H01L21/28291 , H01L27/11507 , H01L27/11585 , H01L27/1159 , H01L29/6684 , H01L29/78391
摘要： A vertical ferroelectric gate field-effect transistor (FeGFET) device comprises a substrate and a first drain/source electrode formed on an upper surface of the substrate. An electrically conductive channel region is formed on an upper surface of the first drain/source electrode and electrically contacting the first drain/source electrode. The FeGFET device further comprises a ferroelectric gate region formed on at least one side wall of the channel region, at least one gate electrode electrically contacting the ferroelectric gate region, and a second drain/source electrode formed on an upper surface of the channel region and electrically contacting the channel region. The ferroelectric gate region is selectively polarizable in response to a potential applied between the gate electrode and at least one of the first and second drain/source electrodes. A non-volatile memory array can be formed comprising a plurality of FeGFET devices.
摘要翻译： 垂直铁电栅极场效应晶体管（FeGFET）器件包括形成在衬底的上表面上的衬底和第一漏极/源极。 在第一漏/源电极的上表面上形成导电沟道区，并与第一漏/源电极电接触。 FeGFET器件还包括形成在通道区域的至少一个侧壁上的铁电栅极区域，与铁电栅极区域电接触的至少一个栅极电极和形成在沟道区域的上表面上的第二漏极/源极电极，以及 电接触通道区域。 铁电栅极区域响应于施加在栅极电极和第一和第二漏极/源极电极中的至少一个之间的电位而选择性地极化。 可以形成包括多个FeGFET装置的非易失性存储器阵列。
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公开(公告)号：US07115916B2
公开(公告)日：2006-10-03
申请号：US10255351
申请日：2002-09-26
申请人： Phaedon Avouris , Guy Moshe Cohen , Richard Martel , James A. Misewich , James Chen-Hsiang Tsang
发明人： Phaedon Avouris , Guy Moshe Cohen , Richard Martel , James A. Misewich , James Chen-Hsiang Tsang
CPC分类号： H01L51/52 , B82Y10/00 , H01L51/0048 , H01L51/0545 , Y10S977/742 , Y10S977/938 , Y10S977/949
摘要： A light emitting device comprises a gate electrode, a channel comprising a molecule for electrically stimulated optical emission, wherein the molecule is disposed within an effective range of the gate electrode, a source coupled to a first end of the channel injecting electrons into the channel, and a drain coupled to a second end of the channel injecting holes into the channel.
摘要翻译： 发光器件包括栅电极，包括用于电刺激的光发射的分子的通道，其中所述分子设置在所述栅电极的有效范围内，源极耦合到所述沟道的第一端，将电子注入所述沟道， 以及漏极，其耦合到所述通道的第二端，将孔注入所述通道。
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9.发明授权Tunable thin film optical devices and fabrication methods for tunable thin film optical devices 有权可调谐薄膜光学器件及可调谐薄膜光学器件的制造方法公开(公告)号：US07002646B2
公开(公告)日：2006-02-21
申请号：US10388538
申请日：2003-03-17
IPC分类号： G02F1/1347 , G02F1/1333 , G02F1/1335 , G02F1/13
CPC分类号： G02F1/0551 , G02F2001/213 , G02F2201/34 , G02F2203/12
摘要： Thin film structures include electro-optic materials and transparent conducting materials which are combined to fabricate vertical optical devices. The electro-optic materials are responsive to an electric field to change an optical characteristic. For example, a modulator can be fabricated by making a dielectric mirror from such materials by alternating the electro-optic material with the transparent conducting material. The mirror reflection band can then be tuned by applying an electric field between the transparent conducting layers.
摘要翻译： 薄膜结构包括电光材料和透明导电材料，其被组合以制造垂直光学装置。 电光材料响应于电场以改变光学特性。 例如，可以通过使电光材料与透明导电材料交替而由这种材料制成电介质反射镜来制造调制器。 然后可以通过在透明导电层之间施加电场来调整镜面反射带。
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