Method of tiling analog circuits
    1.
    发明授权
    Method of tiling analog circuits 有权
    拼接模拟电路的方法

    公开(公告)号:US07305642B2

    公开(公告)日:2007-12-04

    申请号:US11100039

    申请日:2005-04-05

    IPC分类号: G06F17/50 G06F19/00

    CPC分类号: G06F17/5068

    摘要: The present invention provides a method for tiling an integrated circuit having a critically matched device such as a transistor. The method obtains an advantage of automatically improving metallic density over critically matched devices thus yielding improved CMP. The method may include the steps of: identifying critically matched devices in the integrated circuit; placing metal tiles over the critically matched device; performing a density test around each critically matched device; and if a density test is not satisfied around a critically matched device, placing at least one metal strip over a critically matched device.

    摘要翻译: 本发明提供了一种用于平铺具有诸如晶体管等关键匹配器件的集成电路的方法。 该方法获得了自动提高临界匹配器件的金属密度的优点,从而产生改进的CMP。 该方法可以包括以下步骤:识别集成电路中的严格匹配的设备; 将金属砖放在严格匹配的设备上; 对每个严格匹配的设备进行密度测试; 并且如果在严格匹配的装置周围不能满足密度测试,则将至少一个金属带放置在严格匹配的装置上。

    Method of tiling analog circuits that include resistors and capacitors
    2.
    发明授权
    Method of tiling analog circuits that include resistors and capacitors 有权
    包含电阻和电容的模拟电路的平铺方法

    公开(公告)号:US07305643B2

    公开(公告)日:2007-12-04

    申请号:US11128659

    申请日:2005-05-12

    IPC分类号: G06F9/45 G06F17/50

    CPC分类号: G06F17/5072 H01L22/20

    摘要: A method for placing tiles in an integrated circuit has matched devices that includes the steps of (1) calculating a metal spacing for tiles to be placed adjacent to the matched device in the integrated circuit; (2) calculating a lateral spacing for tiles to be placed adjacent to the matched device in the integrated circuit; (3) placing tiles about the matched device based on the metal spacing and the lateral spacing; (4) performing a density test in an area around the matched device; and (5) if a density test is not satisfied in the area around the matched device, dividing the matched device into at least two subdevices and repeating, with respect to each subdevice, the steps of calculating a metal spacing, calculating a lateral spacing, and placing tiles about each subdevice. The method is further adaptable to various kinds of matched devices including poly resistors, diffused resistors, double-poly capacitors, metal-insulator-metal capacitors, and fringe capacitors.

    摘要翻译: 一种用于在集成电路中放置瓦片的方法具有匹配的装置,其包括以下步骤:(1)计算要放置在与集成电路中的匹配装置相邻的瓷砖的金属间隔; (2)计算与所述集成电路中的匹配装置相邻放置的瓦片的横向间隔; (3)基于所述金属间隔和所述横向间隔,在匹配的装置周围放置瓦片; (4)在匹配装置周围的区域中进行密度测试; (5)如果在匹配装置周围的区域中不满足密度测试,则将匹配的装置分成至少两个子装置,并且相对于每个子装置重复计算金属间距,计算横向间隔的步骤, 并在每个子设备上放置瓷砖。 该方法还适用于多种匹配器件,包括聚电阻器,扩散电阻器,双重多晶硅电容器,金属 - 绝缘体 - 金属电容器和条纹电容器。

    Sterile illuminated magnifier and method for surgical use
    3.
    发明授权
    Sterile illuminated magnifier and method for surgical use 失效
    无菌照明放大镜及手术方法

    公开(公告)号:US6086228A

    公开(公告)日:2000-07-11

    申请号:US732154

    申请日:1996-10-16

    摘要: In accord with one aspect of the invention, an apparatus for illuminating and magnifying an object in a sterile field for observation is provided. A holder is mounted at one end of a base assembly. A magnifying lens is mounted to the holder and defines a field of vision. A light is attached to the holder by an attaching means in a predetermined spatial relationship with the lens such that the light directs a beam of light into the field. A method is provided for illuminating and magnifying an object in a sterile field without contaminating the sterile field. The base assembly and the holder are sterilized. The base assembly is positioned in the sterile field. A sterile pack containing the light in a sterilized condition is opened and the light is moved into the sterile field. The light is inserted into the opening of the holder. The light is actuated and provides a light beam. The magnifying lens is removed from a sterile pack and moved into the sterile field. The lens is attached to the holder in a predetermined spatial relationship with the light such that the lens defines a field of vision which the light beam intersects. An object is brought into the field of vision.

    摘要翻译: 根据本发明的一个方面,提供了一种用于在用于观察的无菌场中照射和放大物体的装置。 支架安装在基座组件的一端。 放大镜安装在支架上并限定视野。 通过与透镜预定的空间关系的附接装置将光附接到保持器,使得光将光束引导到场中。 提供了一种用于在无菌区域中照射和放大物体的方法,而不污染无菌区域。 基座组件和支架已经灭菌。 基座组件位于无菌区域。 打开包含灭菌条件下的光的无菌包装袋,将光移入无菌区域。 灯被插入支架的开口中。 光被致动并提供光束。 将放大镜从无菌包装中取出并移入无菌区域。 透镜以与光的预定空间关系附接到支架,使得透镜限定光束相交的视场。 一个物体被带入视野。

    Timing generator circuit including adjustable tapped delay line within
phase lock loop to control timing of signals in the tapped delay line
    4.
    发明授权
    Timing generator circuit including adjustable tapped delay line within phase lock loop to control timing of signals in the tapped delay line 失效
    定时发生器电路,包括在相位锁定环路中可调节的延迟线,以控制延迟线中的信号时序

    公开(公告)号:US5159205A

    公开(公告)日:1992-10-27

    申请号:US603900

    申请日:1990-10-24

    CPC分类号: H03L7/0812 H03K5/15033

    摘要: A circuit for generating a plurality of timing signals includes a plurality of cascade-connected delay cells, each having an input coupled to an output of another, and a plurality of latches. Set inputs of various latches are coupled to outputs of various delay cells to determine times of occurrence of leading edges of various timing pulses. Reset inputs of the various latches are coupled to outputs of various delay cells to determine times of occurrence of trailing edges of various timing pulses. The circuit includes a phase detector having a first input coupled to receive a clock signal and a second input coupled to an output of one of the delay cells to receive a signal indicative of propagation of a logic state through a first group of the delay cells, to produce an adjustment signal indicative of whether the phase of the indicator signal is ahead of or behind the phase of the clock signal. Each of the delay cells increases or decreases propagation time through that delay cell in response to the adjustment signal, so as to cause a time required for the logic state to propagate through all of the delay cells to be equal to a period of the clock signal.

    摘要翻译: 用于产生多个定时信号的电路包括多个级联连接的延迟单元,每个延迟单元具有耦合到另一个的输出的输入和多个锁存器。 各种锁存器的设置输入耦合到各种延迟单元的输出,以确定各种定时脉冲的前沿的出现次数。 各种锁存器的复位输入耦合到各种延迟单元的输出,以确定各种定时脉冲的后沿的出现次数。 该电路包括相位检测器,其具有耦合以接收时钟信号的第一输入和耦合到延迟单元之一的输出的第二输入,以接收指示逻辑状态通过第一组延迟单元传播的信号, 以产生指示指示符信号的相位是否在时钟信号的相位之前或之后的调整信号。 每个延迟单元响应于调整信号增加或减少通过该延迟单元的传播时间,从而导致逻辑状态通过所有延迟单元传播所需的时间等于时钟信号的周期 。

    Process and apparatus for producing ultrafine explosive particles
    5.
    发明授权
    Process and apparatus for producing ultrafine explosive particles 失效
    用于生产超细爆炸颗粒的方法和装置

    公开(公告)号:US5156779A

    公开(公告)日:1992-10-20

    申请号:US345360

    申请日:1989-04-27

    IPC分类号: B01F3/08 B01F5/04 C06B21/00

    摘要: A method and an improved eductor apparatus for producing ultrafine explosive particles is disclosed. The explosive particles, which when incorporated into a binder system, have the ability to propagate in thin sheets, and have very low impact sensitivity and very high propagation sensitivity. A stream of a solution of the explosive dissolved in a solvent is thoroughly mixed with a stream of an inert nonsolvent by obtaining nonlaminar flow of the streams by applying pressure against the flow of the nonsolvent stream, to thereby diverge the stream as it contacts the explosive solution, and violently agitating the combined stream to rapidly precipitate the explosive particles from the solution in the form of generally spheroidal, ultrafine particles. The two streams are injected coaxially through continuous, concentric orifices of a nozzle into a mixing chamber. Preferably, the nonsolvent stream is injected centrally of the explosive solution stream. The explosive solution stream is injected downstream of and surrounds the nonsolvent solution stream for a substantial distance prior to being ejected into the mixing chamber.

    摘要翻译: 公开了一种用于生产超细爆炸性颗粒的方法和改进的喷射装置。 当结合到粘合剂体系中的爆炸性颗粒具有以薄片传播的能力,并且具有非常低的冲击灵敏度和非常高的传播灵敏度。 将溶解在溶剂中的溶液的流与惰性非溶剂流充分混合,通过对非溶剂流的流动施加压力,通过获得液流的非层流,从而在流接触炸药时分流 溶液,并剧烈搅拌合并的流,以迅速沉淀出来的溶液中的爆炸性颗粒呈通常为球形的超细颗粒形式。 两个流体通过喷嘴的连续的同心孔同轴地注入到混合室中。 优选地,非溶剂流在爆炸溶液流的中心注入。 在喷射到混合室之前,将爆炸溶液流注入下游并将非溶剂溶液流包围相当长的距离。

    High speed analog-to-digital converter
    6.
    发明授权
    High speed analog-to-digital converter 失效
    高速模数转换器

    公开(公告)号:US5049882A

    公开(公告)日:1991-09-17

    申请号:US630539

    申请日:1990-12-20

    IPC分类号: H03M1/14 H03M1/16 H03M1/36

    摘要: High speed conversion of an analog input signal to a digital output signal is performed by applying the analog input to an input of a unity gain amplifier. During a first pass, an output signal produced by the amplifier is applied to inputs of each of a plurality of comparators. A first group of successively larger reference voltages are applied to reference inputs of the comparators, respectively. A plurality of the comparators switch in response thereto to produce output signals indicative of a range within which the output of the amplifier lies. The outputs of the comparators are encoded to effectuate conversion thereof to an analog representation of the amplifier output. The analog representation is compared to the analog input signal and the difference therebetween is applied to the input of the amplifier. During another pass another group of reference voltages, each substantially lower than corresponding values thereof during the previous pass, are applied to the reference inputs of the comparators. Binary representations of the outputs of the comparators during each of the passes are combined into a binary word accurately representing the analog input signal.

    摘要翻译: 通过将模拟输入施加到单位增益放大器的输入端,将模拟输入信号高速转换为数字输出信号。 在第一遍期间,由放大器产生的输出信号被施加到多个比较器中的每一个的输入端。 连续较大参考电压的第一组分别被施加到比较器的参考输入端。 多个比较器响应于此而切换以产生指示放大器的输出所在的范围的输出信号。 比较器的输出被编码以实现其转换为放大器输出的模拟表示。 将模拟表示与模拟输入信号进行比较,并将它们之间的差异应用于放大器的输入。 在另一次通过期间,在比较器的参考输入端施加另一组参考电压,每组参考电压基本上低于上次通过期间的对应值。 在每个通过期间比较器的输出的二进制表示被组合成精确地表示模拟输入信号的二进制字。

    Material forming machine controller

    公开(公告)号:US4481589A

    公开(公告)日:1984-11-06

    申请号:US337901

    申请日:1982-01-08

    IPC分类号: G05B19/418 G07C3/14 G06F15/46

    摘要: A control method and apparatus for a metal-forming machine such as a cold heading machine are described. The described method and apparatus monitor machine operation during production and permit relatively large deviations from a prescribed norm over a short term without shutting down the machine, while ensuring longer term compliance to relatively small tolerances from the norm. The described controller first determines an average of a measured parameter such as the hit energy applied to a group of workpieces resulting in acceptable metal-forming during a training mode and then stores this average as a target value. The controller then establishes a set of tolerance windows to be used to control forming operations in a production mode.In production, the controller repeatedly measures the machine parameter and then compares selected averages of the measured parameter with the target value and the respective tolerance window, and indicates out-of-tolerance condition whenever one of the selected average falls outside the respective window. The tolerance windows are selected such that short term averages or single values of the measured parameter must deviate from the target values by larger amounts than long term averages before the controller signals an out-of-tolerance condition. For example, the described controller operates to interrupt machine operation when a single measured value of hit energy deviates by more than 16% from the learned target value, when a group of 4 measured values of hit energy deviates by more than 8%, when a group of 16 measured values of hit energy deviates by more than 4%, or when a group of 64 measured values of hit energy deviates by more than 1%.The disclosed controller also signals when the measured parameter is nearing an out-of-tolerance condition, and it acts to change the target value gradually during a warmup period of machine operation in order to reduce the number of unnecessary interruptions of machine operation.

    Teaching device
    8.
    发明授权
    Teaching device 失效
    教学设备

    公开(公告)号:US4355984A

    公开(公告)日:1982-10-26

    申请号:US133850

    申请日:1980-03-25

    IPC分类号: G09B7/06 G09B7/02

    CPC分类号: G09B7/06

    摘要: A teaching device includes a reading station provided with six on-off switches for automatically sensing a text key encoded as a pattern of punched holes in a text book. The teaching device automatically generates an answer key from the text key by means of a pseudo-random number generator which is run using the text key as a seed. The text book includes a number of multiple choice questions in which the correct answer corresponds to the answer designated in the answer key.

    摘要翻译: 教学装置包括读取站,其具有六个开关开关,用于自动感测编码为教科书中的冲孔的图案的文本键。 教学装置通过使用文本键作为种子运行的伪随机数生成器,从文本键自动生成应答键。 该教科书包括一些多项选择题,其中正确答案对应于应答键中指定的答案。

    System and apparatus for reducing the effects of circuit mismatch in analog-to-digital converters

    公开(公告)号:US07075473B2

    公开(公告)日:2006-07-11

    申请号:US10135789

    申请日:2002-04-30

    IPC分类号: H03M1/36

    CPC分类号: H03M1/0663 H03M1/141

    摘要: A system and apparatus for reducing the effects of circuit mismatch in analog-to-digital converters is disclosed. In one form, an analog-to-digital converter (ADC) includes a switching network operable to couple an analog input received by a sample and hold module to a folding amplifier operable to process the analog input. The ADC further includes an averaging resistive network coupled to the folding amplifier and operable to provide an output representative of a portion of the analog input received by the folding amplifier to produce a digital representation of the analog input.

    System and apparatus for reducing offset voltages in folding amplifiers
    10.
    发明授权
    System and apparatus for reducing offset voltages in folding amplifiers 失效
    降低折叠放大器偏移电压的系统和设备

    公开(公告)号:US06825716B2

    公开(公告)日:2004-11-30

    申请号:US10135645

    申请日:2002-04-30

    IPC分类号: H03F102

    摘要: A system and apparatus for reducing offset voltages in folding amplifiers is disclosed. In one form, a folding amplifier for use in an analog-to-digital converter is provided. The folding amplifier includes a first current source operable to be coupled to a first differential pair and a second differential pair. The folding amplifier further includes a switching network coupled between the first current source and the first and second differential pairs and operable to enable coupling the first current source to at least one of the first differential pair and the second differential pair.

    摘要翻译: 公开了一种用于降低折叠放大器中的偏移电压的系统和装置。 在一种形式中,提供了用于模数转换器的折叠放大器。 折叠放大器包括可操作以耦合到第一差分对和第二差分对的第一电流源。 折叠放大器还包括耦合在第一电流源和第一和第二差分对之间的开关网络,并且可操作以使第一电流源耦合到第一差分对和第二差分对中的至少一个。