公开(公告)号：US20080073650A1

公开(公告)日：2008-03-27

申请号：US11949483

申请日：2007-12-03

申请人： Ji-Yong PARK ,  Hye-Hyang PARK

发明人： Ji-Yong PARK ,  Hye-Hyang PARK

IPC分类号： H01L29/04

CPC分类号： H01L21/0268 ,  B23K26/066 ,  C30B13/24 ,  C30B29/06 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/02691 ,  H01L21/2026

摘要： The present invention relates to a fabrication method for polycrystalline silicon thin film in which amorphous silicon is crystallized by laser using a mask having a mixed structure of laser transmission pattern group and laser non-transmission pattern group, wherein the mask comprises two or more of dot pattern groups in which the non-transmission pattern group is perpendicular to a scan directional axis, and the dot pattern groups are formed in a certain shape and comprise first non-transmission patterns that are not respectively arranged in a row in an axis direction perpendicular to the scan directional axis, and second non-transmission patterns that are formed in the same arrangement as the first non-transmission patterns, but are positioned in such a manner that the second non-transmission patterns are parallel to the first non-transmission patterns and vertical axis of the scan directional axis.

摘要翻译： 本发明涉及一种多晶硅薄膜的制造方法，其中使用具有激光透射图案组和激光非透射图案组的混合结构的掩模通过激光使非晶硅结晶，其中该掩模包括两个或多个点 其中非透射图案组垂直于扫描方向轴的图案组，并且点图案组形成为一定形状，并且包括不垂直于轴线方向的轴线方向上不分别布置成行的第一非透射图案 扫描方向轴和第二非透射图案，其以与第一非透射图案相同的布置形成，但是以使得第二非透射图案平行于第一非透射图案的方式定位，以及 扫描方向轴的垂直轴。

公开(公告)号：US20080067514A1

公开(公告)日：2008-03-20

申请号：US11942460

申请日：2007-11-19

申请人： Ji-Yong PARK ,  Ul-Ho LEE ,  Jae-Bon KOO ,  Ki-Yong LEE ,  Hye-Hyang PARK

发明人： Ji-Yong PARK ,  Ul-Ho LEE ,  Jae-Bon KOO ,  Ki-Yong LEE ,  Hye-Hyang PARK

IPC分类号： H01L29/04

CPC分类号： H01L29/78696 ,  G02F1/13454 ,  H01L27/1285 ,  H01L27/1296 ,  H01L29/04 ,  H01L29/66757 ,  H01L29/78675

摘要： The present invention relates to a flat panel display device comprising a polycrystalline silicon thin film transistor and provides a flat panel display device having improved characteristics by having a different number of grain boundaries included in polycrystalline silicon thin film formed in active channel regions of a driving circuit portion and active channel regions of pixel portion. This may be achieved by having a different number of grain boundaries included in the polycrystalline silicon thin film formed in active channel regions of a switching thin film transistor and a driving thin film transistor formed in the pixel portion, and by having a different number of grain boundaries included in polycrystalline silicon thin film formed in active channel regions of a thin film transistor for driving the pixel portion for each red, green and blue of the pixel portion. Further, this may be achieved by having a different number of grain boundaries included in polycrystalline silicon formed in active channel regions of an NMOS thin film transistor and a PMOS thin film transistor for forming CMOS transistor used in flat panel display device, thereby constructing a thin film transistor to obtain the improved characteristics for each transistor.

摘要翻译： 本发明涉及一种包括多晶硅薄膜晶体管的平板显示装置，通过在驱动电路的有源沟道区域中形成的多晶硅薄膜中包含不同数量的晶界，提供具有改进特性的平板显示装置 像素部分和有源沟道区域。 这可以通过在形成在像素部分中的开关薄膜晶体管和驱动薄膜晶体管的有源沟道区域中形成的多晶硅薄膜中包含不同数量的晶界，并且通过具有不同数量的晶粒来实现 包括在形成在用于驱动像素部分的每个红，绿和蓝的像素部分的薄膜晶体管的有源沟道区域中的多晶硅薄膜中的边界。 此外，这可以通过在NMOS薄膜晶体管的有源沟道区域中形成的多晶硅中包含不同数量的晶界和用于形成用于平板显示器件的CMOS晶体管的PMOS薄膜晶体管来实现，从而构造薄的 以获得每个晶体管的改进特性。

公开(公告)号：US20080191969A1

公开(公告)日：2008-08-14

申请号：US12104749

申请日：2008-04-17

申请人： Jae-Bon Koo ,  Ji-Yong PARK ,  Sang-Il PARK ,  Ki-Yong LEE ,  Ul-Ho LEE

发明人： Jae-Bon Koo ,  Ji-Yong PARK ,  Sang-Il PARK ,  Ki-Yong LEE ,  Ul-Ho LEE

IPC分类号： G09G3/00

CPC分类号： G09G3/3275 ,  H01L27/1214 ,  H01L29/78621 ,  H01L29/78624 ,  H01L29/78645 ,  H01L29/78672 ,  H01L29/78696

摘要： A high-speed flat panel display has thin film transistors in a pixel array portion in which a plurality of pixels are arranged and a driving circuit portion for driving the pixels of the pixel array portion, which have different resistance values than each other or have different geometric structures than each other. The flat panel display comprises a pixel array portion where a plurality of pixels are arranged, and a driving circuit portion for driving the pixels of the pixel array portion. The thin film transistors in the pixel array portion and the driving circuit portion have different resistance values in their gate regions or drain regions than each other, or have different geometric structures than each other. One thin film transistor has a zigzag shape in its gate region or drain region or has an offset region.

摘要翻译： 高速平板显示器在其中排列有多个像素的像素阵列部分中具有薄膜晶体管，以及用于驱动像素阵列部分的像素的驱动电路部分，其具有彼此不同的电阻值或具有不同的像素阵列部分 几何结构比彼此。 平板显示器包括其中布置有多个像素的像素阵列部分和用于驱动像素阵列部分的像素的驱动电路部分。 像素阵列部分和驱动电路部分中的薄膜晶体管在其栅极区域或漏极区域中具有彼此不同的电阻值，或者具有彼此不同的几何结构。 一个薄膜晶体管在其栅极区域或漏极区域中具有锯齿形状或具有偏移区域。

公开(公告)号：US20080111254A1

公开(公告)日：2008-05-15

申请号：US11940131

申请日：2007-11-14

申请人： Ji-Yong PARK ,  Si-Hoon LEE ,  Sang-Heui LEE

发明人： Ji-Yong PARK ,  Si-Hoon LEE ,  Sang-Heui LEE

IPC分类号： H01L23/48 ,  H05K1/03 ,  H05K3/36

CPC分类号： H01L21/486 ,  H01L23/49811 ,  H01L23/49838 ,  H01L24/48 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/15311 ,  H05K1/0287 ,  H05K1/0298 ,  H05K3/4084 ,  H05K2201/09681 ,  H05K2203/0108 ,  Y10T29/49126 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A pattern film in accordance with one aspect of the present invention includes a first film and a second film. A first pattern array is built in the first film. The second film is attached to the first film. Further, a second pattern array is built in the second film. The second pattern array is partially overlapped with the first pattern array. The first and the second pattern arrays may be electrically connected to each other by a pressurizing process. Thus, a time and a cost for manufacturing the pattern film may be reduced. As a result, a printed circuit board and a semiconductor package having the pattern film may also be manufactured at a low expense.

摘要翻译： 根据本发明的一个方面的图案膜包括第一膜和第二膜。 第一个图案阵列是建立在第一个电影。 第二部电影连接到第一部电影。 此外，在第二膜中构建第二图案阵列。 第二图案阵列与第一图案阵列部分重叠。 第一和第二图案阵列可以通过加压工艺彼此电连接。 因此，可以减少用于制造图案膜的时间和成本。 结果，也可以以低成本制造印刷电路板和具有图案膜的半导体封装。

公开(公告)号：US20130056559A1

公开(公告)日：2013-03-07

申请号：US13599192

申请日：2012-08-30

申请人： Jae Ho KIM ,  Ki Hong KIM ,  Eun Gi MIN ,  Dong Suk LEE ,  Ji-Yong PARK ,  Yong Jun JEE

发明人： Jae Ho KIM ,  Ki Hong KIM ,  Eun Gi MIN ,  Dong Suk LEE ,  Ji-Yong PARK ,  Yong Jun JEE

IPC分类号： B05B7/04

CPC分类号： B60H3/0021 ,  B60H2003/0064

摘要： Provided is an apparatus for generating perfume for vehicles, and more particularly, an apparatus for generating perfume for vehicles capable of simplifying a configuration and increasing sealing ability to stably control perfume, by easily controlling a flow of air passing through a first perfume generating part and a second perfume generating part using a single rotating shaft.

摘要翻译： 本发明提供一种车辆用香水生成装置，更具体而言，是容易地控制通过第一香料生成部的空气流动，能够简化配置，提高密封能力，稳定地控制香水的车辆用香水装置， 使用单个旋转轴的第二香水产生部件。

公开(公告)号：US20080100228A1

公开(公告)日：2008-05-01

申请号：US11924403

申请日：2007-10-25

申请人： Ji-Yong PARK

发明人： Ji-Yong PARK

IPC分类号： G09G3/10 ,  H01L21/336 ,  H01L29/04

CPC分类号： H01L27/3272 ,  H01L27/1214 ,  H01L29/78633

摘要： A display device that requires less manufacturing time is presented. The display device includes a light blocking member formed on a substrate, a semiconductor layer formed on the light blocking member, and a gate insulating layer formed on the semiconductor layer. Gate conductors, a first interlayer insulating layer, data conductors, a second interlayer insulating layer, and a pixel electrode are formed. A third interlayer insulating layer is deposited with an opening that extends to the pixel electrode. An organic light emitting member is formed in the opening, and a common electrode is formed. The light blocking member contains nickel and silicon oxide. The presence of nickel-and-silicon-oxide light blocking member below the semiconductor improves the crystallizing speed for the semiconductor layer, reducing the overall manufacturing time. Further, the light blocking member is disposed under the pixel electrodes to prevent light leakage, improving the contrast ratio and image quality.

摘要翻译： 提出了一种需要较少制造时间的显示设备。 显示装置包括形成在基板上的遮光部件，形成在遮光部件上的半导体层，以及形成在半导体层上的栅极绝缘层。 形成栅极导体，第一层间绝缘层，数据导体，第二层间绝缘层和像素电极。 第三层间绝缘层沉积有延伸到像素电极的开口。 在开口部形成有机发光部件，形成公共电极。 遮光构件包含镍和氧化硅。 在半导体下方存在镍 - 硅氧化物阻光元件改善了半导体层的结晶速度，从而缩短了整个制造时间。 此外，遮光构件设置在像素电极下方以防止漏光，提高对比度和图像质量。

公开(公告)号：US20110147757A1

公开(公告)日：2011-06-23

申请号：US12968456

申请日：2010-12-15

申请人： Ki-Hoon KIM ,  Jin-Suk PARK ,  Ji-Yong PARK ,  Kyung-Min PARK ,  Kyung-Hyun CHOI ,  Gyung-Soon PARK ,  Dae-Won LEE

发明人： Ki-Hoon KIM ,  Jin-Suk PARK ,  Ji-Yong PARK ,  Kyung-Min PARK ,  Kyung-Hyun CHOI ,  Gyung-Soon PARK ,  Dae-Won LEE

IPC分类号： H01L29/786 ,  H01L33/00 ,  H01L33/08 ,  H01L29/04

CPC分类号： H01L29/78633 ,  H01L27/1255

摘要： An array substrate of a display device, the array substrate: a substrate having a first region and a second region spaced apart from the first region; a blocking layer located on the substrate; a first electrode located on the blocking layer in the second region; an insulating film located on the blocking layer to cover the first electrode; a second electrode located on the insulating film to overlap the first electrode; and a third electrode overlapping the first electrode between the substrate and the blocking layer. Accordingly, it is possible to reduce an area that is occupied by a storage capacitor in a pixel region and to achieve high luminance by increasing the aperture ratio, by providing a structure and method of increasing a storage capacitance of the same area.

摘要翻译： 一种显示装置的阵列基板，所述阵列基板：具有与所述第一区域间隔开的第一区域和第二区域的基板; 位于所述基板上的阻挡层; 位于第二区域中的阻挡层上的第一电极; 绝缘膜，位于所述阻挡层上以覆盖所述第一电极; 位于所述绝缘膜上以与所述第一电极重叠的第二电极; 以及在所述基板和所述阻挡层之间与所述第一电极重叠的第三电极。 因此，通过提供增加同一区域的存储电容的结构和方法，可以减少像素区域中的存储电容器所占据的面积并且通过增加开口率来实现高亮度。

公开(公告)号：US20130005092A1

公开(公告)日：2013-01-03

申请号：US13616618

申请日：2012-09-14

申请人： Sang-Gui JO ,  Ji-Yong PARK ,  Kwangjin BAE ,  Soyoung LIM

发明人： Sang-Gui JO ,  Ji-Yong PARK ,  Kwangjin BAE ,  Soyoung LIM

IPC分类号： H01L21/60

CPC分类号： H01L23/49838 ,  H01L23/49816 ,  H01L24/16 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/16 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48227 ,  H01L2224/49173 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package includes a base substrate, a semiconductor chip mounted on the base substrate and including bonding pads, first and second connection terminals disposed adjacent to the semiconductor chip on the base substrate and electrically connected to the bonding pads, a first ball land disposed on the base substrate and electrically connected to the first connection terminal, a second ball land spaced apart from the connection terminals, the first ball land disposed between the second ball land and at least one of the first and second connection terminals, a first insulating layer covering the first ball land but exposing at least a part of the second ball land, and a first conductive wire extending onto the first insulating layer and connecting the second connection terminal to the second ball land.

摘要翻译： 一种半导体封装，包括基底基板，安装在基底基板上的半导体芯片，并且包括接合焊盘，与基板上的半导体芯片相邻设置并电连接到焊盘的第一和第二连接端子， 所述基底基板电连接到所述第一连接端子，与所述连接端子间隔开的第二球形台面，设置在所述第二球形台面与所述第一和第二连接端子中的至少一个之间的所述第一球形区域，第一绝缘层覆盖层 第一球接地，但暴露第二球台的至少一部分，以及延伸到第一绝缘层上并将第二连接端子连接到第二球台的第一导线。