公开(公告)号：US08993434B2

公开(公告)日：2015-03-31

申请号：US13226612

申请日：2011-09-07

申请人： Jick M. Yu ,  Rong Tao ,  Xinyu Fu

发明人： Jick M. Yu ,  Rong Tao ,  Xinyu Fu

IPC分类号： H01L21/4763 ,  H01L21/285 ,  H01L21/768

CPC分类号： H01L21/2855 ,  H01L21/76843 ,  H01L21/76865 ,  H01L21/76868 ,  H01L21/76873 ,  H01L21/76879 ,  H01L2221/1089

摘要： Methods for forming layers on a substrate having one or more features formed therein are provided herein. In some embodiments, a method for forming layers on a substrate having one or more features formed therein may include depositing a seed layer within the one or more features; and etching the seed layer to remove at least a portion of the seed layer proximate an opening of the feature such that the seed layer comprises a first thickness disposed on a lower portion of a sidewall of the feature proximate a bottom of the feature and a second thickness disposed on an upper portion of the sidewall proximate the opening of the feature and wherein the first thickness is greater than the second thickness.

摘要翻译： 本文提供了在其上形成有一个或多个特征的基底上形成层的方法。 在一些实施例中，用于在其上形成有一个或多个特征的衬底上形成层的方法可包括在一个或多个特征内沉积晶种层; 并且蚀刻种子层以去除邻近特征的开口的种子层的至少一部分，使得种子层包括设置在靠近特征的底部的特征的侧壁的下部的第一厚度，以及第二 厚度设置在靠近特征开口的侧壁的上部，并且其中第一厚度大于第二厚度。

公开(公告)号：US20120121799A1

公开(公告)日：2012-05-17

申请号：US12945445

申请日：2010-11-12

申请人： Xinyu Fu ,  Jick M. Yu

发明人： Xinyu Fu ,  Jick M. Yu

IPC分类号： H05K3/22

CPC分类号： H01L23/53233 ,  H01L21/76831 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76855 ,  H01L21/76867 ,  H01L21/76877 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： Methods for forming interconnect or interconnections on a substrate for use in a microelectric device are disclosed. In one or more embodiments, the method includes depositing an alloy layer comprising Cu and an alloying element, for, example, Mn, in a dielectric layer and segregating or diffusing the alloying element from the bulk Cu portion of the alloy layer. In one or more embodiments, the method includes annealing the alloy layer in an atomic hydrogen atmosphere. After annealing, the alloy layer exhibits a resistivity that is substantially equivalent to the resistivity of a pure Cu layer.

摘要翻译： 公开了在用于微电子器件的衬底上形成互连或互连的方法。 在一个或多个实施例中，该方法包括在电介质层中沉积包含Cu和合金元素（例如Mn）的合金层，并将合金元素与合金层的本体Cu部分分离或扩散。 在一个或多个实施例中，该方法包括在原子氢气氛中退火合金层。 退火后，合金层的电阻率基本上等于纯Cu层的电阻率。

公开(公告)号：US20100099251A1

公开(公告)日：2010-04-22

申请号：US12256235

申请日：2008-10-22

申请人： XINYU FU ,  Jick M. Yu

发明人： XINYU FU ,  Jick M. Yu

IPC分类号： H01L21/768

CPC分类号： H01L21/76826 ,  H01L21/76814 ,  H01L21/76831 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： In one embodiment, a method for fabricating a damascene structure is provided which includes exposing a dielectric surface on a substrate to a nitrogen plasma to form a nitrided dielectric layer, wherein the dielectric surface contains a plurality of openings therein, depositing a barrier layer on the nitrided dielectric surface, and depositing a seed layer over the barrier layer. In some examples, the nitrogen plasma is formed from nitrogen gas or a mixture of nitrogen gas and hydrogen gas. The nitrogen plasma may be formed in a barrier deposition chamber or by a reactive preclean chamber. In another embodiment, a bulk layer may be deposited to fill the openings after depositing the seed layer. In one example, the bulk layer may contain copper, tungsten, or alloys thereof, and be deposited by an electrochemical plating process.

摘要翻译： 在一个实施例中，提供了一种用于制造镶嵌结构的方法，其包括将衬底上的电介质表面暴露于氮等离子体以形成氮化介电层，其中电介质表面包含多个开口，在其上沉积阻挡层 氮化电介质表面，并且在阻挡层上沉积种子层。 在一些实例中，氮等离子体由氮气或氮气和氢气的混合物形成。 氮等离子体可以形成在阻挡沉积室中或通过反应性预清洗室形成。 在另一个实施例中，沉积种子层之后可沉积体层以填充开口。 在一个实例中，本体层可以包含铜，钨或其合金，并且通过电化学电镀工艺沉积。

公开(公告)号：US08349724B2

公开(公告)日：2013-01-08

申请号：US12635528

申请日：2009-12-10

申请人： Xinyu Fu ,  Jick M. Yu

发明人： Xinyu Fu ,  Jick M. Yu

IPC分类号： H01L21/4763

CPC分类号： H01L21/76838 ,  H01L21/76844 ,  H01L21/76855 ,  H01L21/76873 ,  H01L21/76877 ,  H01L21/76883

摘要： Methods for improving electromigration of copper interconnection structures are provided. In one embodiment, a method of annealing a microelectronic device including forming microelectronic features on a substrate, forming a contact structure over the microelectronic features, and forming a copper interconnection structure over the contact structure. A passivation layer is deposited over the copper interconnection structure and the substrate is subjected to a first anneal at a temperature of about 350° C. to 400° C. for a time duration between about 30 minutes to about 1 hour. The substrate is subjected to a second anneal at a temperature of about 150° C. to 300° C. for a time duration between about 24 to about 400 hours.

摘要翻译： 提供了改善铜互连结构电迁移的方法。 在一个实施例中，一种退火微电子器件的方法，包括在衬底上形成微电子特征，在微电子特征上形成接触结构，以及在接触结构上形成铜互连结构。 在铜互连结构上沉积钝化层，并且将衬底在约350℃至400℃的温度下进行约30分钟至约1小时的持续时间的第一次退火。 将衬底在约150℃至300℃的温度下进行约24至约400小时的持续时间的第二次退火。

公开(公告)号：US08852674B2

公开(公告)日：2014-10-07

申请号：US12945445

申请日：2010-11-12

申请人： Xinyu Fu ,  Jick M. Yu

发明人： Xinyu Fu ,  Jick M. Yu

IPC分类号： C23C18/00 ,  H01L23/532 ,  H01L21/768

CPC分类号： H01L23/53233 ,  H01L21/76831 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76855 ,  H01L21/76867 ,  H01L21/76877 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： Methods for forming interconnect or interconnections on a substrate for use in a microelectric device are disclosed. In one or more embodiments, the method includes depositing an alloy layer comprising Cu and an alloying element, for, example, Mn, in a dielectric layer and segregating or diffusing the alloying element from the bulk Cu portion of the alloy layer. In one or more embodiments, the method includes annealing the alloy layer in an atomic hydrogen atmosphere. After annealing, the alloy layer exhibits a resistivity that is substantially equivalent to the resistivity of a pure Cu layer.

摘要翻译： 公开了在用于微电子器件的衬底上形成互连或互连的方法。 在一个或多个实施例中，该方法包括在电介质层中沉积包含Cu和合金元素（例如Mn）的合金层，并将合金元素与合金层的本体Cu部分分离或扩散。 在一个或多个实施例中，该方法包括在原子氢气氛中退火合金层。 退火后，合金层的电阻率基本上等于纯Cu层的电阻率。

公开(公告)号：US08580354B2

公开(公告)日：2013-11-12

申请号：US13209760

申请日：2011-08-15

申请人： Xinyu Fu ,  Jick M. Yu

发明人： Xinyu Fu ,  Jick M. Yu

IPC分类号： C23C14/02 ,  C23C14/16 ,  C23C14/58 ,  B05D3/06 ,  H05H1/24 ,  H05H1/46 ,  C23C14/18

CPC分类号： C23C16/0245 ,  H01J37/32357

摘要： A plasma processing chamber particularly useful for pre-treating low-k dielectric films and refractory metal films subject to oxidation prior to deposition of other layers. A remote plasma source (RPS) excites a processing gas into a plasma and delivers it through a supply tube to a manifold in back of a showerhead faceplate. The chamber is configured for oxidizing and reducing plasmas in the same or different processes when oxygen and hydrogen are selectively supplied to the RPS. The supply tube and showerhead may be formed of dielectric oxides which may be passivated by a water vapor plasma from the remote plasma source. In one novel process, a protective hydroxide coating is formed on refractory metals by alternating neutral plasmas of hydrogen and oxygen.

摘要翻译： 一种等离子体处理室，特别适用于在沉积其它层之前预处理低k电介质膜和难以处理的金属薄膜。 远程等离子体源（RPS）将处理气体激发到等离子体中并将其通过供应管输送到喷头面板背面的歧管。 当氧气和氢气选择性地供应给RPS时，该室被配置用于在相同或不同的过程中氧化和还原等离子体。 供应管和喷头可以由介电氧化物形成，其可以由远程等离子体源的水蒸汽等离子体钝化。 在一个新颖的方法中，通过交替的氢和氧的中性等离子体在难熔金属上形成保护性氢氧化物涂层。

公开(公告)号：US20110300720A1

公开(公告)日：2011-12-08

申请号：US13209760

申请日：2011-08-15

申请人： Xinyu Fu ,  Jick M. Yu

发明人： Xinyu Fu ,  Jick M. Yu

IPC分类号： H01L21/31

CPC分类号： C23C16/0245 ,  H01J37/32357

摘要： A plasma processing chamber particularly useful for pre-treating low-k dielectric films and refractory metal films subject to oxidation prior to deposition of other layers. A remote plasma source (RPS) excites a processing gas into a plasma and delivers it through a supply tube to a manifold in back of a showerhead faceplate. The chamber is configured for oxidizing and reducing plasmas in the same or different processes when oxygen and hydrogen are selectively supplied to the RPS. The supply tube and showerhead may be formed of dielectric oxides which may be passivated by a water vapor plasma from the remote plasma source. In one novel process, a protective hydroxide coating is formed on refractory metals by alternating neutral plasmas of hydrogen and oxygen.

摘要翻译： 一种等离子体处理室，特别适用于在沉积其它层之前预处理低k电介质膜和难以处理的金属薄膜。 远程等离子体源（RPS）将处理气体激发到等离子体中并将其通过供应管输送到喷头面板背面的歧管。 当氧气和氢气选择性地供应给RPS时，该室被配置用于在相同或不同的过程中氧化和还原等离子体。 供应管和喷头可以由介电氧化物形成，其可以由远程等离子体源的水蒸汽等离子体钝化。 在一个新颖的方法中，通过交替的氢和氧的中性等离子体在难熔金属上形成保护性氢氧化物涂层。

公开(公告)号：US08021514B2

公开(公告)日：2011-09-20

申请号：US11776131

申请日：2007-07-11

申请人： Xinyu Fu ,  Jick M. Yu

发明人： Xinyu Fu ,  Jick M. Yu

IPC分类号： C23F1/00

CPC分类号： C23C16/0245 ,  H01J37/32357

摘要： A plasma processing chamber particularly useful for pre-treating low-k dielectric films and refractory metal films subject to oxidation prior to deposition of other layers. A remote plasma source (RPS) excites a processing gas into a plasma and delivers it through a supply tube to a manifold in back of a showerhead faceplate. The chamber is configured for oxidizing and reducing plasmas in the same or different processes when oxygen and hydrogen are selectively supplied to the RPS. The supply tube and showerhead may be formed of dielectric oxides which may be passivated by a water vapor plasma from the remote plasma source. In one novel process, a protective hydroxide coating is formed on refractory metals by alternating neutral plasmas of hydrogen and oxygen.

摘要翻译： 一种等离子体处理室，特别适用于在沉积其它层之前预处理低k电介质膜和难以处理的金属薄膜。 远程等离子体源（RPS）将处理气体激发到等离子体中并将其通过供应管输送到喷头面板背面的歧管。 当氧气和氢气选择性地供应给RPS时，该室被配置用于在相同或不同的过程中氧化和还原等离子体。 供应管和喷头可以由介电氧化物形成，其可以由远程等离子体源的水蒸汽等离子体钝化。 在一个新颖的方法中，通过交替的氢和氧的中性等离子体在难熔金属上形成保护性氢氧化物涂层。

公开(公告)号：US20100167526A1

公开(公告)日：2010-07-01

申请号：US12635528

申请日：2009-12-10

申请人： Xinyu Fu ,  Jick M. Yu

发明人： Xinyu Fu ,  Jick M. Yu

IPC分类号： H01L21/768

CPC分类号： H01L21/76838 ,  H01L21/76844 ,  H01L21/76855 ,  H01L21/76873 ,  H01L21/76877 ,  H01L21/76883

摘要： Methods for improving electromigration of copper interconnection structures are provided. In one embodiment, a method of annealing a microelectronic device includings forming microelectronic features on a substrate, forming a contact structure over the microelectronic features, and forming a copper interconnection structure over the contact structure. A passivation layer is deposited over the copper interconnection structure and the substrate is subjected to a first anneal at a temperature of about 350° C. to 400° C. for a time duration between about 30 minutes to about 1 hour. The substrate is subjected to a second anneal at a temperature of about 150° C. to 300° C. for a time duration between about 24 to about 400 hours.

摘要翻译： 提供了改善铜互连结构电迁移的方法。 在一个实施例中，一种退火微电子器件的方法，包括在衬底上形成微电子特征，在微电子特征上形成接触结构，以及在接触结构上形成铜互连结构。 在铜互连结构上沉积钝化层，并且将衬底在约350℃至400℃的温度下进行约30分钟至约1小时的持续时间的第一次退火。 将衬底在约150℃至300℃的温度下进行约24至约400小时的持续时间的第二次退火。

公开(公告)号：US20100096273A1

公开(公告)日：2010-04-22

申请号：US12256418

申请日：2008-10-22

申请人： Qian Luo ,  Arvind Sundarrajan ,  Hua Chung ,  Xianmin Tang ,  Jick M. Yu ,  Murali K. Narasimhan

发明人： Qian Luo ,  Arvind Sundarrajan ,  Hua Chung ,  Xianmin Tang ,  Jick M. Yu ,  Murali K. Narasimhan

IPC分类号： H01L21/288

CPC分类号： H01L21/76873 ,  C25D5/02 ,  C25D21/12 ,  H01L21/76843 ,  H01L21/76856 ,  H01L21/76862 ,  H01L21/76864 ,  H01L21/76877

摘要： A method and apparatus for selectively controlling deposition rate of conductive material during an electroplating process. Dopants are predominantly incorporated into a conductive seed layer on field regions of a substrate prior to filling openings in the field regions by electroplating. A substrate is positioned in one or more processing chambers, and barrier and conductive seed layers formed. A dopant precursor is provided to the chamber and ionized, with or without voltage bias. The dopant predominantly incorporates into the conductive seed layer on the field regions. Electrical conductivity of the conductive seed layer on the field regions is reduced relative to that of the conductive seed layer in the openings, resulting in low initial deposition rate of metal on the field regions during electroplating, and little or no void formation in the metal deposited in the openings.

摘要翻译： 一种用于在电镀过程中选择性地控制导电材料的沉积速率的方法和装置。 在通过电镀在场区域中填充开口之前，掺杂剂主要被结合到衬底的场区域上的导电种子层中。 衬底被定位在一个或多个处理室中，形成阻挡层和导电种子层。 在室内提供掺杂剂前体，并且在电压偏置或没有电压偏置的情况下电离。 掺杂剂主要并入到场区域上的导电种子层中。 导电种子层在场区域的电导率相对于开口中的导电种子层的导电率降低，导致电镀期间金属在场区域上的初始沉积速率较低，并且金属沉积中几乎没有或没有空隙形成 在开口。