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    Viterbi bit detection method and device
    2.
    发明授权
    Viterbi bit detection method and device 失效
    维特比比特检测方法及装置

    公开(公告)号：US07111225B2

    公开(公告)日：2006-09-19

    申请号：US10528939

    申请日：2003-08-13

    申请人： Willem Marie Julia Marcel Coene ,  Albert Hendrik Jan Immink ,  Johannes Wilhelmus Maria Bergmans

    发明人： Willem Marie Julia Marcel Coene ,  Albert Hendrik Jan Immink ,  Johannes Wilhelmus Maria Bergmans

    IPC分类号： G03M13/03

    CPC分类号： G11B20/1217 ,  G11B20/10009 ,  G11B20/10296 ,  G11B20/22 ,  G11B2020/1249 ,  G11B2020/1288 ,  G11B2220/2541

    摘要： A Viterbi bit detection method for detecting the bit values of bits of a channel data stream stored on a record carrier along an N-dimensional channel tube, N being at least two, of at least two bit rows one-dimensionally evolving along a first direction and being aligned with each other along at least a second of N−1 other directions, the first direction together with the N−1 other directions constituting an N-dimensional lattice of bit positions, includes application of a row-based one-dimensional Viterbi bit detection method independent for each of the bit rows of said channel tube. To achieve a reliable bit detection, a number of independent one-dimensional row-based Viterbi bit detectors, also known as sequence detectors, is used, one for each bit row in the channel tube: the interference between successive neighboring bit rows is taken into account via the computation of the branch metrics (for the considered bit row), in which local bit decisions on the primary neighboring bits in the neighboring rows are used. As local bit detectors going beyond the performance of a threshold detector, the use of a HD-2 or HD-3-like hard-decision bit detector is proposed.

    摘要翻译： 一种维特比比特检测方法，用于检测沿N维通道管存储在记录载体上的信道数据流的比特值，N是沿着第一方向一维演化的至少两个比特行的至少两个 并且沿着N-1个其他方向中的至少第二个方向彼此对准，第一方向与构成比特位置的N维格子的N-1个其他方向一起包括应用基于行的一维维特比 位检测方法独立于所述通道管的每个位行。 为了实现可靠的比特检测，使用了许多独立的一维行维特比比特检测器（也称为序列检测器），一个用于信道管中的每一比特行：连续相邻比特行之间的干扰被采用 通过计算分支度量（对于考虑的比特行），其中使用相邻行中的主相邻比特的本地比特决定。 随着本地位检测器超出门限检测器的性能，提出了使用HD-2或HD-3类硬判决位检测器。

    Data-Dependent Noise Predictor in Data-Aided Timing Recovery
    3.
    发明申请
    Data-Dependent Noise Predictor in Data-Aided Timing Recovery 审中-公开
    数据辅助定时恢复中的数据依赖噪声预测器

    公开(公告)号：US20080219392A1

    公开(公告)日：2008-09-11

    申请号：US11995013

    申请日：2006-07-06

    申请人： Jamal Riani ,  Steven J-M.L. Van Beneden ,  Johannes Wilhelmus Maria Bergmans ,  Albert Hendrik Jan Immink

    发明人： Jamal Riani ,  Steven J-M.L. Van Beneden ,  Johannes Wilhelmus Maria Bergmans ,  Albert Hendrik Jan Immink

    IPC分类号： H04L7/00 ,  H04L25/00

    CPC分类号： H04L7/0062 ,  G11B20/10009 ,  G11B20/10037 ,  G11B20/1403 ,  H04L7/04

    摘要： A communication system includes a communication channel (110) for time-synchronous transfer of data symbols a1, . . . , aN to a receiver (130). A sampling unit (132) is used for time-sequential sampling the channel under control of a sampling clock signal that is synchronous with transmittal of the data symbols. Each sample includes a representation of a data symbol and noise. A data-aided timing error detector (133) receives a representation of the samples. The detector includes a data-dependent noise predictor (310) for generating a predicted noise sequence ñ1, . . . , ñN where each predicted noise value nk for the k-th sample of the sequence depends on a cluster of a plurality of sampled data symbols and a noise whitening unit (320) for whitening of noise in the sample sequence by removing the predicted noise value ñk. The detector is arranged to provide a signal for correcting the sampling clock signal in dependence on the whitened sample sequence.

    摘要翻译： 一种通信系统包括用于数据符号a 1的时间同步传送的通信信道（110）。 。 。 ，向接收机（130）发送一个“N”。 采样单元（132）用于在与数据符号的发送同步的采样时钟信号的控制下对信道进行时间序列采样。 每个样本包括数据符号和噪声的表示。 数据辅助定时误差检测器（133）接收样本的表示。 检测器包括用于产生预测噪声序列的数据相关噪声预测器（310）。 。 。 ，其中序列的第k个样本的每个预测噪声值n k k取决于多个采样数据符号的簇和噪声白化单元（ 320），用于通过去除预测的噪声值ñN k来采样序列中的噪声增白。 检测器被布置成根据白化样本序列提供用于校正采样时钟信号的信号。

    Device for reconstructing a runlength constrained sequence
    5.
    发明授权
    Device for reconstructing a runlength constrained sequence 失效
    用于重建游程长约束序列的设备

    公开(公告)号：US06980606B2

    公开(公告)日：2005-12-27

    申请号：US09969002

    申请日：2001-10-02

    申请人： Rob Otte ,  Willem Marie Julia Marcel Coene ,  Johannes Wilhelmus Maria Bergmans

    发明人： Rob Otte ,  Willem Marie Julia Marcel Coene ,  Johannes Wilhelmus Maria Bergmans

    IPC分类号： H03M7/14 ,  H03M13/00 ,  H03M13/41 ,  H04L1/00 ,  H03D1/00

    CPC分类号： H04L1/0054

    摘要： A branch metric calculation unit calculates a set of branch metric values for subsequent samples of the sampled input signal. Each of the set of branch metric values is an indication for the likelihood that an amplitude value of a sample corresponds to a particular state, a state being defined as a sequence of n-ary digits. A delay unit, which forms part of a delay chain of delay units, includes a first delay unit of the delay chain which is coupled to the branch metric calculation unit. A path metric calculation chain of path metric calculation units includes one or more path metric calculation units having first inputs coupled to a delay unit and second inputs coupled to a preceding path metric calculation unit. The path metric calculation unit calculates the path metric values from the branch metric values, a path metric value being on indication for the likelihood that a sequence of samples corresponds to a sequence of states.

    摘要翻译： 支路量度计算单元计算采样输入信号的后续采样的一组支路量度值。 一组分支量度值中的每一个是对样本的幅度值对应于特定状态的可能性的指示，状态被定义为n位数的序列。 形成延迟单元的延迟链的一部分的延迟单元包括延迟链的第一延迟单元，其连接到分支量度计算单元。 路径度量计算单元的路径度量计算链包括具有耦合到延迟单元的第一输入和耦合到先前路径量度计算单元的第二输入的一个或多个路径度量计算单元。 路径度量计算单元从分支度量值计算路径度量值，路径度量值正在指示样本序列对应于状态序列的可能性。

    Detector, reproduction system, receiver and method
    6.
    发明授权
    Detector, reproduction system, receiver and method 失效
    检测器，再现系统，接收器和方法

    公开(公告)号：US06731699B2

    公开(公告)日：2004-05-04

    申请号：US09860308

    申请日：2001-05-18

    申请人： Charalampos Pozidis ,  Willem Marie Julia Marcel Coene ,  Johannes Wilhelmus Maria Bergmans

    发明人： Charalampos Pozidis ,  Willem Marie Julia Marcel Coene ,  Johannes Wilhelmus Maria Bergmans

    IPC分类号： H04L2706

    CPC分类号： H03M13/39 ,  G11B20/10009 ,  G11B20/1426 ,  G11B2020/1453

    摘要： A detector (30) is described for detecting a digital signal (Bio) out of an input information signal (Ai) which represents a runlength limited sequence, the runlength having a minimal value m. The detector (30) generates (60, 62) a preliminary binary signal (Bi) out of the input information signal (Ai). A composed sequence of subsequent bits is identified (86) within the preliminary binary signal (Bi) which subsequently includes at least a first neighboring bit of a run of length greater or equal than m+1, one or more further runs of length m and at least a second neighboring bit of a run of length greater or equal than intl. A set of sequences are generated (84, 86). These sequences can be obtained from said composed sequence by changing polarities of binary values within the composed sequence without violating the runlength constraint. The set includes the composed sequence obtained from the preliminary binary signal. A path metric (D) is calculated (94, 96) for two or more sequences of the set, said path metric (D) being the sum of the branch metrics (d) for the path through the trellis corresponding to the sequence of binary values. The sequence from the set which has the highest likelihood of corresponding to the input sequence represented by the input information signal (Ai) is identified (86, 98, 100) on the basis of the path metric.

    摘要翻译： 描述了一种检测器（30），用于检测表示游程受限序列的输入信息信号（Ai）中的数字信号（Bio），该游程长度具有最小值m。 检测器（30）从输入信息信号（Ai）中产生（60,62）初步二进制信号（Bi）。 在初始二进制信号（Bi）内识别（86）的后续比特的组合序列，其随后包括长度大于或等于m + 1的游程的至少第一相邻比特，长度为m的一个或多个另外的游程， 长度大于或等于intl的游程的至少第二相邻位。 生成一组序列（84,86）。 可以通过改变组合序列内的二进制值的极性而不违反游程长度约束从所述组合序列获得这些序列。 该集合包括从初步二进制信号获得的合成序列。 对于集合的两个或多个序列计算路径度量（D）（94,96），所述路径度量（D）是通过与二进制序列对应的网格的路径的分支度量（d）之和， 价值观。 基于路径度量来识别具有与由输入信息信号（Ai）表示的输入序列相对应的最高似然度的集合的序列（86,98,100）。

    Detection apparatus
    7.
    发明授权
    Detection apparatus 失效
    检测装置

    公开(公告)号：US06678862B1

    公开(公告)日：2004-01-13

    申请号：US09806585

    申请日：2001-03-30

    申请人： Johannes Wilhelmus Maria Bergmans ,  Willem Marie Julia Marcel Coene ,  Rob Otte ,  Simon Derek Bramwell

    发明人： Johannes Wilhelmus Maria Bergmans ,  Willem Marie Julia Marcel Coene ,  Rob Otte ,  Simon Derek Bramwell

    IPC分类号： H03M1303

    CPC分类号： H03M13/6343 ,  G11B20/00 ,  H03M13/015 ,  H03M13/3961 ,  H03M13/41 ,  H03M13/4107 ,  H03M13/4169

    摘要： A partial response maximum likelihood (PRML) bit detection apparatus is disclosed for deriving a bit sequence (xk) from an input information signal. The apparatus comprises input means for receiving the input information signal. The apparatus further comprises sampling means for sampling the input information signal at sampling instants so as to obtain samples (zk) of the information signal at said sampling instants. The apparatus also comprises calculating means (50, 70) for (a) calculating (50) at a sampling instant ti for one or more of a plurality of states sj (Sa, Sb, Sc) at said sampling instant, an optimum path metric value PM(sj,ti) and for determining for said one or more states a best predecessor state at the directly preceding sampling instant ti−1, a state at said sampling instant identifying a sequence of n subsequent bits. The apparatus further comprises calculating means for (b) establishing (70) the best path from the state at the said sampling instant ti having the lowest optimum path metric value, back in time towards the sampling instant ti−N via best predecessor states, established earlier for earlier sampling instants, to establish an optimum state at said sampling instant ti−N. The apparatus further comprises the calculating means for (c) outputting at least one bit (xk−MB−1) of said n bits of the sequence of bits corresponding to said established optimum state at said sampling instant ti−N. The steps (a) to (c) are repeated for a subsequent sampling instant ti+1. The apparatus is characterized in that mutually complementary sequences of n subsequent bits are allocated to the same state.

    摘要翻译： 公开了用于从输入信息信号导出比特序列（xk）的部分响应最大似然（PRML）比特检测装置。 该装置包括用于接收输入信息信号的输入装置。 该装置还包括用于在采样时刻对输入信息信号进行采样的采样装置，以便在所述采样时刻获得信息信号的采样（zk）。 所述装置还包括计算装置（50,70），用于（a）在所述采样时刻的多个状态sj（Sa，Sb，Sc）中的一个或多个的采样时刻ti计算（50）最佳路径度量 值PM（sj，ti），并且用于为所述一个或多个状态确定在直接在前的采样时刻ti-1处的最佳前置状态，所述采样时刻处的状态识别n个后续位的序列。 该装置还包括计算装置，用于（b）建立（70）从具有最低最优路径度量值的所述采样时刻ti的状态建立（70）最佳路径，经过最佳前置状态向时间向采样时刻ti-N建立 较早的采样时刻，以在所述采样时刻ti-N建立最佳状态。 该装置还包括计算装置，用于（c）在所述采样时刻ti-N处输出与所述建立的最佳状态相对应的比特序列的所述n比特的至少一个比特（xk-MB-1）。 对于随后的采样时刻ti + 1重复步骤（a）至（c）。 该装置的特征在于将n个后续比特的互补序列分配给相同的状态。

    Modulation Code System and Methods of Encoding and Decoding a Signal
    9.
    发明申请
    Modulation Code System and Methods of Encoding and Decoding a Signal 审中-公开
    调制码系统和信号编码和解码方法

    公开(公告)号：US20080266149A1

    公开(公告)日：2008-10-30

    申请号：US10599612

    申请日：2005-04-01

    申请人： Hendrik Dirk Lodewijk Hollmann ,  Johannes Wilhelmus Maria Bergmans

    发明人： Hendrik Dirk Lodewijk Hollmann ,  Johannes Wilhelmus Maria Bergmans

    IPC分类号： H03M13/00

    CPC分类号： G11B20/10009 ,  G11B20/10046 ,  G11B20/10194 ,  G11B20/1426 ,  H03M5/145

    摘要： The invention relates to a modulation code system and a corresponding modulation method. Said modulation system comprises an encoder 100 for transforming an original signal s into an encoded signal c satisfying predefined second constraints. Said modulation code system further comprises a decoder 200 for decoding the encoded signal c after restoration back into the original signal s. It is the object of the invention to improve such a known modulation code system and method in the way that the amount of required hardware is reduced. This object is solved according to the invention by designing the encoder 100 such that it comprises a series connection of a modulation code encoder 110 and of a transformer encoder 120 serving for filtering an intermediate signal t output by said modulation code encoder 110 and satisfying predefined first constraints in order to generate said encoder output signal c. The object is further solved by the decoder 200 comprising a series connection of a transformer decoder 220 and of a modulation code decoder 210.

    摘要翻译： 本发明涉及一种调制码系统和相应的调制方法。 所述调制系统包括用于将原始信号s变换为满足预定义的第二约束的编码信号c的编码器100。 所述调制码系统还包括解码器200，用于在恢复到原始信号s之后对编码信号c进行解码。 本发明的目的是以所需硬件量减少的方式来改进这种已知的调制码系统和方法。 根据本发明，通过设计编码器100来解决该目的，使得其包括调制码编码器110和变压器编码器120的串联连接，用于对由所述调制码编码器110输出的中间信号t进行滤波，并满足预定义的第一 约束以产生所述编码器输出信号c。 解码器200进一步解决了该目的，该解码器200包括变压器解码器220和调制码解码器210的串联连接。