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1.发明授权Method, apparatus, and system for optimizing frequency and performance in a multi-die microprocessor 有权用于优化多模微处理器中的频率和性能的方法，装置和系统公开(公告)号：US08032772B2
公开(公告)日：2011-10-04
申请号：US11940958
申请日：2007-11-15
申请人： Jose P Allarey , Varghese George , Sanjeev Jahagirdar , Oren Lamdan , Ofer J Nathan , Tomer Ziv
发明人： Jose P Allarey , Varghese George , Sanjeev Jahagirdar , Oren Lamdan , Ofer J Nathan , Tomer Ziv
CPC分类号： G06F15/82 , G06F1/08 , G06F1/206 , G06F1/3203 , G06F1/324 , G06F9/06 , G06F9/30145 , G06F15/76 , Y02D10/126 , Y02D10/16
摘要： With the progress toward multi-core processors, each core is can not readily ascertain the status of the other dies with respect to an idle or active status. A proposal for utilizing an interface to transmit core status among multiple cores in a multi-die microprocessor is discussed. Consequently, this facilitates thermal management by allowing an optimal setting for setting performance and frequency based on utilizing each core status.
摘要翻译： 随着对多核处理器的进展，每个核心都不能容易地确定另一个模具相对于空闲或活动状态的状态。 讨论了在多芯片微处理器中利用接口在多个核心之间传输核心状态的提议。 因此，这通过允许基于利用每个核心状态来设置性能和频率的最佳设置来促进热管理。
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2.发明申请Method, Apparatus, and System for optimizing Frequency and Performance in a Multi-Die Microprocessor 有权用于优化多模微处理器中的频率和性能的方法，装置和系统公开(公告)号：US20090132844A1
公开(公告)日：2009-05-21
申请号：US11940958
申请日：2007-11-15
申请人： Jose P Allarey , Varghese George , Sanjeev Jahagirdar , Oren Lamdan , Ofer J. Nathan , Tomer Ziv
发明人： Jose P Allarey , Varghese George , Sanjeev Jahagirdar , Oren Lamdan , Ofer J. Nathan , Tomer Ziv
IPC分类号： G06F1/26
CPC分类号： G06F15/82 , G06F1/08 , G06F1/206 , G06F1/3203 , G06F1/324 , G06F9/06 , G06F9/30145 , G06F15/76 , Y02D10/126 , Y02D10/16
摘要： With the progress toward multi-core processors, each core is can not readily ascertain the status of the other dies with respect to an idle or active status. A proposal for utilizing an interface to transmit core status among multiple cores in a multi-die microprocessor is discussed. Consequently, this facilitates thermal management by allowing an optimal setting for setting performance and frequency based on utilizing each core status.
摘要翻译： 随着对多核处理器的进展，每个核心都不能容易地确定另一个模具相对于空闲或活动状态的状态。 讨论了在多芯片微处理器中利用接口在多个核心之间传输核心状态的提议。 因此，这通过允许基于利用每个核心状态来设置性能和频率的最佳设置来促进热管理。
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3.发明申请Method, Apparatus, And System For Optimizing Frequency And Performance In A Multidie Microprocessor 有权用于优化多点微处理器中的频率和性能的方法，装置和系统公开(公告)号：US20130103928A1
公开(公告)日：2013-04-25
申请号：US13711260
申请日：2012-12-11
申请人： Jose P. Allarey , Varghese George , Sanjeev Jahagirdar , Oren Lamdan , Nathan Ofer , Tomer Ziv
发明人： Jose P. Allarey , Varghese George , Sanjeev Jahagirdar , Oren Lamdan , Nathan Ofer , Tomer Ziv
CPC分类号： G06F15/82 , G06F1/08 , G06F1/206 , G06F1/3203 , G06F1/324 , G06F9/06 , G06F9/30145 , G06F15/76 , Y02D10/126 , Y02D10/16
摘要： With the progress toward multi-core processors, each core is can not readily ascertain the status of the other dies with respect to an idle or active status. A proposal for utilizing an interface to transmit core status among multiple cores in a multi-die microprocessor is discussed. Consequently, this facilitates thermal management by allowing an optimal setting for setting performance and frequency based on utilizing each core status.
摘要翻译： 随着对多核处理器的进展，每个核心都不能容易地确定另一个模具相对于空闲或活动状态的状态。 讨论了在多芯片微处理器中利用接口在多个核心之间传输核心状态的提议。 因此，这通过允许基于利用每个核心状态来设置性能和频率的最佳设置来促进热管理。
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4.发明授权公开(公告)号：US08560871B2
公开(公告)日：2013-10-15
申请号：US13711260
申请日：2012-12-11
申请人： Jose P. Allarey , Varghese George , Sanjeev Jahagirdar , Oren Lamdan , Nathan Ofer , Tomer Ziv
发明人： Jose P. Allarey , Varghese George , Sanjeev Jahagirdar , Oren Lamdan , Nathan Ofer , Tomer Ziv
CPC分类号： G06F15/82 , G06F1/08 , G06F1/206 , G06F1/3203 , G06F1/324 , G06F9/06 , G06F9/30145 , G06F15/76 , Y02D10/126 , Y02D10/16
摘要： With the progress toward multi-core processors, each core is can not readily ascertain the status of the other dies with respect to an idle or active status. A proposal for utilizing an interface to transmit core status among multiple cores in a multi-die microprocessor is discussed. Consequently, this facilitates thermal management by allowing an optimal setting for setting performance and frequency based on utilizing each core status.
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5.发明授权Method, apparatus, and system for optimizing frequency and performance in a multidie microprocessor 失效用于优化多点微处理器中的频率和性能的方法，装置和系统公开(公告)号：US08356197B2
公开(公告)日：2013-01-15
申请号：US13156267
申请日：2011-06-08
申请人： Jose P Allarey , Varghese George , Sanjeev Jahagirdar , Oren Lamdan , Nathan J Ofer , Tomer Ziv
发明人： Jose P Allarey , Varghese George , Sanjeev Jahagirdar , Oren Lamdan , Nathan J Ofer , Tomer Ziv
CPC分类号： G06F15/82 , G06F1/08 , G06F1/206 , G06F1/3203 , G06F1/324 , G06F9/06 , G06F9/30145 , G06F15/76 , Y02D10/126 , Y02D10/16
摘要： With the progress toward multi-core processors, each core is can not readily ascertain the status of the other dies with respect to an idle or active status. A proposal for utilizing an interface to transmit core status among multiple cores in a multi-die microprocessor is discussed. Consequently, this facilitates thermal management by allowing an optimal setting for setting performance and frequency based on utilizing each core status.
摘要翻译： 随着对多核处理器的进展，每个核心都不能容易地确定另一个模具相对于空闲或活动状态的状态。 讨论了在多芯片微处理器中利用接口在多个核心之间传输核心状态的提议。 因此，这通过允许基于利用每个核心状态来设置性能和频率的最佳设置来促进热管理。
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6.发明申请METHOD, APPARATUS, AND SYSTEM FOR OPTIMIZING FREQUENCY AND PERFORMANCE IN A MULTIDIE MICROPROCESSOR 失效用于优化微处理器的频率和性能的方法，装置和系统公开(公告)号：US20110238973A1
公开(公告)日：2011-09-29
申请号：US13156267
申请日：2011-06-08
申请人： Jose P. Allarey , Varghese George , Sanjeev Jahagirdar , Oren Lamdan , Nathan J. Ofer , Tomer Ziv
发明人： Jose P. Allarey , Varghese George , Sanjeev Jahagirdar , Oren Lamdan , Nathan J. Ofer , Tomer Ziv
IPC分类号： G06F9/00
CPC分类号： G06F15/82 , G06F1/08 , G06F1/206 , G06F1/3203 , G06F1/324 , G06F9/06 , G06F9/30145 , G06F15/76 , Y02D10/126 , Y02D10/16
摘要： With the progress toward multi-core processors, each core is can not readily ascertain the status of the other dies with respect to an idle or active status. A proposal for utilizing an interface to transmit core status among multiple cores in a multi-die microprocessor is discussed. Consequently, this facilitates thermal management by allowing an optimal setting for setting performance and frequency based on utilizing each core status.
摘要翻译： 随着对多核处理器的进展，每个核心都不能容易地确定另一个模具相对于空闲或活动状态的状态。 讨论了在多芯片微处理器中利用接口在多个核心之间传输核心状态的提议。 因此，这通过允许基于利用每个核心状态来设置性能和频率的最佳设置来促进热管理。
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7.发明申请公开(公告)号：US20140032950A1
公开(公告)日：2014-01-30
申请号：US14041688
申请日：2013-09-30
申请人： Jose P. Allarey , Varghese George , Sanjeev S. Jahagirdar , Oren Lamdan , Ofer Nathan , Tomer Ziv
发明人： Jose P. Allarey , Varghese George , Sanjeev S. Jahagirdar , Oren Lamdan , Ofer Nathan , Tomer Ziv
IPC分类号： G06F1/20
CPC分类号： G06F15/82 , G06F1/08 , G06F1/206 , G06F1/3203 , G06F1/324 , G06F9/06 , G06F9/30145 , G06F15/76 , Y02D10/126 , Y02D10/16
摘要： With the progress toward multi-core processors, each core is can not readily ascertain the status of the other dies with respect to an idle or active status. A proposal for utilizing an interface to transmit core status among multiple cores in a multi-die microprocessor is discussed. Consequently, this facilitates thermal management by allowing an optimal setting for setting performance and frequency based on utilizing each core status.
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8.发明申请METHOD, APPARATUS, AND SYSTEM FOR OPTIMIZING FREQUENCY AND PERFORMANCE IN A MULTIDIE MICROPROCESSOR 审中-公开用于优化微处理器的频率和性能的方法，装置和系统公开(公告)号：US20140108849A1
公开(公告)日：2014-04-17
申请号：US14140875
申请日：2013-12-26
IPC分类号： G06F1/08
CPC分类号： G06F15/82 , G06F1/08 , G06F1/206 , G06F1/3203 , G06F1/324 , G06F9/06 , G06F9/30145 , G06F15/76 , Y02D10/126 , Y02D10/16
摘要： With the progress toward multi-core processors, each core is can not readily ascertain the status of the other dies with respect to an idle or active status. A proposal for utilizing an interface to transmit core status among multiple cores in a multi-die microprocessor is discussed. Consequently, this facilitates thermal management by allowing an optimal setting for setting performance and frequency based on utilizing each core status.
摘要翻译： 随着对多核处理器的进展，每个核心都不能容易地确定另一个模具相对于空闲或活动状态的状态。 讨论了在多芯片微处理器中利用接口在多个核心之间传输核心状态的提议。 因此，这通过允许基于利用每个核心状态来设置性能和频率的最佳设置来促进热管理。
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9.发明申请Method, apparatus, and system for increasing single core performance in a multi-core microprocessor 有权用于增加多核微处理器中单核性能的方法，装置和系统公开(公告)号：US20080005592A1
公开(公告)日：2008-01-03
申请号：US11477751
申请日：2006-06-28
申请人： Jose Allarey , Varghese George , Sanjeev Jahagirdar , Oren Lamdan
发明人： Jose Allarey , Varghese George , Sanjeev Jahagirdar , Oren Lamdan
IPC分类号： G06F1/00
CPC分类号： G06F1/206
摘要： A method, system, and apparatus to enable at least one active core in a multi-core processor to operate at a higher operating point while at least one other core in the multi-core processor is in an idle state. When the idle core exits the idle state, the operating point may be reduced after a hysteresis timer has expired.
摘要翻译： 一种使多核处理器中的至少一个活动核心能够在较高工作点运行并且多核处理器中的至少一个其他核心处于空闲状态的方法，系统和装置。 当空闲磁芯退出空闲状态时，在滞后计时器到期后，工作点可能会减少。
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10.发明授权Method, apparatus, and system for increasing single core performance in a multi-core microprocessor 有权用于增加多核微处理器中单核性能的方法，装置和系统公开(公告)号：US07650518B2
公开(公告)日：2010-01-19
申请号：US11477751
申请日：2006-06-28
申请人： Jose Allarey , Varghese George , Sanjeev Jahagirdar , Oren Lamdan
发明人： Jose Allarey , Varghese George , Sanjeev Jahagirdar , Oren Lamdan
CPC分类号： G06F1/206
摘要： A method, system, and apparatus to enable at least one active core in a multi-core processor to operate at a higher operating point while at least one other core in the multi-core processor is in an idle state. When the idle core exits the idle state, the operating point may be reduced after a hysteresis timer has expired.
摘要翻译： 一种使多核处理器中的至少一个活动核心能够在较高工作点运行并且多核处理器中的至少一个其他核心处于空闲状态的方法，系统和装置。 当空闲磁芯退出空闲状态时，在滞后计时器到期后，工作点可能会减少。
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