-
1.发明授权公开(公告)号：US08299537B2
公开(公告)日：2012-10-30
申请号：US12369099
申请日：2009-02-11
申请人： Joseph R. Greco , Kevin Munger , Richard A. Phelps , Jennifer C. Robbins , William Savaria , James A. Slinkman , Randy L. Wolf
发明人： Joseph R. Greco , Kevin Munger , Richard A. Phelps , Jennifer C. Robbins , William Savaria , James A. Slinkman , Randy L. Wolf
IPC分类号： H01L21/70
CPC分类号： H01L21/7624 , H01L21/26506 , H01L21/84 , H01L27/1203
摘要： A semiconductor-on-insulator substrate and a related semiconductor structure, as well as a method for fabricating the semiconductor-on-insulator substrate and the related semiconductor structure, provide for a multiple order radio frequency harmonic suppressing region located and formed within a base semiconductor substrate at a location beneath an interface of a buried dielectric layer with the base semiconductor substrate within the semiconductor-on-insulator substrate. The multiple order radio frequency harmonic suppressing region may comprise an ion implanted atom, such as but not limited to a noble gas atom, to provide a suppressed multiple order radio frequency harmonic when powering a radio frequency device, such as but not limited to a radio frequency complementary metal oxide semiconductor device (or alternatively a passive device), located and formed within and upon a surface semiconductor layer within the semiconductor structure.
摘要翻译： 绝缘体上半导体衬底和相关半导体结构以及绝缘体上半导体衬底和相关半导体结构的制造方法提供了一种位于并形成在基底半导体内的多阶射频谐波抑制区域 在绝缘体上半导体衬底内的掩埋介质层与基底半导体衬底的界面下方的位置处的衬底。 多级射频谐波抑制区域可以包括离子注入原子，例如但不限于稀有气体原子，以在对射频设备供电时提供抑制的多阶射频谐波，例如但不限于无线电 位于和形成在半导体结构内的表面半导体层内和之上的高频互补金属氧化物半导体器件（或替代地，无源器件）。
-
2.发明授权公开(公告)号：US08492294B2
公开(公告)日：2013-07-23
申请号：US13608314
申请日：2012-09-10
申请人： Joseph R. Greco , Kevin Munger , Richard A. Phelps , Jennifer C. Robbins , William Savaria , James A. Slinkman , Randy L. Wolf
发明人： Joseph R. Greco , Kevin Munger , Richard A. Phelps , Jennifer C. Robbins , William Savaria , James A. Slinkman , Randy L. Wolf
IPC分类号： H01L21/00
CPC分类号： H01L21/7624 , H01L21/26506 , H01L21/84 , H01L27/1203
摘要： A semiconductor-on-insulator substrate and a related semiconductor structure, as well as a method for fabricating the semiconductor-on-insulator substrate and the related semiconductor structure, provide for a multiple order radio frequency harmonic suppressing region located and formed within a base semiconductor substrate at a location beneath an interface of a buried dielectric layer with the base semiconductor substrate within the semiconductor-on-insulator substrate. The multiple order radio frequency harmonic suppressing region may comprise an ion implanted atom, such as but not limited to a noble gas atom, to provide a suppressed multiple order radio frequency harmonic when powering a radio frequency device, such as but not limited to a radio frequency complementary metal oxide semiconductor device (or alternatively a passive device), located and formed within and upon a surface semiconductor layer within the semiconductor structure.
摘要翻译： 绝缘体上半导体衬底和相关半导体结构以及绝缘体上半导体衬底和相关半导体结构的制造方法提供了一种位于并形成在基底半导体内的多阶射频谐波抑制区域 在绝缘体上半导体衬底内的掩埋介质层与基底半导体衬底的界面下方的位置处的衬底。 多级射频谐波抑制区域可以包括离子注入原子，例如但不限于稀有气体原子，以在对射频设备供电时提供抑制的多阶射频谐波，例如但不限于无线电 位于和形成在半导体结构内的表面半导体层内和之上的高频互补金属氧化物半导体器件（或替代地，无源器件）。
-
3.发明申请SEMICONDUCTOR-ON-INSULATOR SUBSTRATE AND STRUCTURE INCLUDING MULTIPLE ORDER RADIO FREQUENCY HARMONIC SUPRESSING REGION 有权半导体绝缘体基板和包括多个无线电频率谐波抑制区域的结构公开(公告)号：US20130005157A1
公开(公告)日：2013-01-03
申请号：US13608314
申请日：2012-09-10
申请人： Joseph R. Greco , Kevin Munger , Richard A. Phelps , Jennifer C. Robbins , William Savaria , James A. Slinkman , Randy L. Wolf
发明人： Joseph R. Greco , Kevin Munger , Richard A. Phelps , Jennifer C. Robbins , William Savaria , James A. Slinkman , Randy L. Wolf
IPC分类号： H01L21/265
CPC分类号： H01L21/7624 , H01L21/26506 , H01L21/84 , H01L27/1203
摘要： A semiconductor-on-insulator substrate and a related semiconductor structure, as well as a method for fabricating the semiconductor-on-insulator substrate and the related semiconductor structure, provide for a multiple order radio frequency harmonic suppressing region located and formed within a base semiconductor substrate at a location beneath an interface of a buried dielectric layer with the base semiconductor substrate within the semiconductor-on-insulator substrate. The multiple order radio frequency harmonic suppressing region may comprise an ion implanted atom, such as but not limited to a noble gas atom, to provide a suppressed multiple order radio frequency harmonic when powering a radio frequency device, such as but not limited to a radio frequency complementary metal oxide semiconductor device (or alternatively a passive device), located and formed within and upon a surface semiconductor layer within the semiconductor structure.
摘要翻译： 绝缘体上半导体衬底和相关半导体结构以及绝缘体上半导体衬底和相关半导体结构的制造方法提供了一种位于并形成在基底半导体内的多阶射频谐波抑制区域 在绝缘体上半导体衬底内的掩埋介质层与基底半导体衬底的界面下方的位置处的衬底。 多级射频谐波抑制区域可以包括离子注入原子，例如但不限于稀有气体原子，以在对射频设备供电时提供抑制的多阶射频谐波，例如但不限于无线电 位于和形成在半导体结构内的表面半导体层内和之上的高频互补金属氧化物半导体器件（或替代地，无源器件）。
-
4.发明申请SEMICONDUCTOR-ON-INSULATOR SUBSTRATE AND STRUCTURE INCLUDING MULTIPLE ORDER RADIO FERQUENCY HARMONIC SUPRESSING REGION 有权半导体绝缘体衬底和包括多个无线电频率谐波抑制区域的结构公开(公告)号：US20100200927A1
公开(公告)日：2010-08-12
申请号：US12369099
申请日：2009-02-11
申请人： Joseph R. Greco , Kevin Munger , Richard A. Phelps , Jennifer C. Robbins , William Savaria , James A. Slinkman , Randy L. Wolf
发明人： Joseph R. Greco , Kevin Munger , Richard A. Phelps , Jennifer C. Robbins , William Savaria , James A. Slinkman , Randy L. Wolf
IPC分类号： H01L27/02 , H01L21/762 , H01L29/51
CPC分类号： H01L21/7624 , H01L21/26506 , H01L21/84 , H01L27/1203
摘要： A semiconductor-on-insulator substrate and a related semiconductor structure, as well as a method for fabricating the semiconductor-on-insulator substrate and the related semiconductor structure, provide for a multiple order radio frequency harmonic suppressing region located and formed within a base semiconductor substrate at a location beneath an interface of a buried dielectric layer with the base semiconductor substrate within the semiconductor-on-insulator substrate. The multiple order radio frequency harmonic suppressing region may comprise an ion implanted atom, such as but not limited to a noble gas atom, to provide a suppressed multiple order radio frequency harmonic when powering a radio frequency device, such as but not limited to a radio frequency complementary metal oxide semiconductor device (or alternatively a passive device), located and formed within and upon a surface semiconductor layer within the semiconductor structure.
摘要翻译： 绝缘体上半导体衬底和相关半导体结构以及绝缘体上半导体衬底和相关半导体结构的制造方法提供了一种位于并形成在基底半导体内的多阶射频谐波抑制区域 在绝缘体上半导体衬底内的掩埋介质层与基底半导体衬底的界面下方的位置处的衬底。 多级射频谐波抑制区域可以包括离子注入原子，例如但不限于稀有气体原子，以在对射频设备供电时提供抑制的多阶射频谐波，例如但不限于无线电 位于和形成在半导体结构内的表面半导体层内和之上的高频互补金属氧化物半导体器件（或替代地，无源器件）。
-
公开(公告)号：US07732303B2
公开(公告)日：2010-06-08
申请号：US12023224
申请日：2008-01-31
IPC分类号： H01L21/322
CPC分类号： H01L21/26513 , H01L21/02032
摘要： A method of recycling monitor wafers. The method includes: (a) providing a semiconductor wafer which includes a dopant layer extending from a top surface of the wafer into the wafer a distance less than a thickness of the wafer, the dopant layer containing dopant species; after (a), (b) attaching an adhesive tape to a bottom surface of the wafer; after (b), (c) removing the dopant layer; and after (c), (d) removing the adhesive tape.
摘要翻译： 监测晶圆回收方法。 该方法包括：（a）提供半导体晶片，其包括掺杂剂层，该掺杂剂层从晶片的顶表面延伸到晶片的距离小于晶片的厚度，所述掺杂剂层含有掺杂剂物质; （a）之后，（b）将粘合带附着在晶片的底面上; （b）之后，（c）去除掺杂剂层; （c）之后，（d）去除胶带。
-
公开(公告)号：US20080171439A1
公开(公告)日：2008-07-17
申请号：US11623354
申请日：2007-01-16
IPC分类号： H01L21/302
CPC分类号： H01L21/02032 , H01L21/02013
摘要： A wafer processing method. The method includes providing a semiconductor wafer. The semiconductor wafer includes (i) a semiconductor layer and (ii) a dopant layer on top of the semiconductor layer. The dopant layer comprises dopants. The method further includes removing the dopant layer from the semiconductor wafer. No chemical etching is performed on the dopant layer before said removing the dopant layer is performed.
摘要翻译： 晶圆加工方法。 该方法包括提供半导体晶片。 半导体晶片包括（i）半导体层和（ii）半导体层顶部上的掺杂剂层。 掺杂层包括掺杂剂。 该方法还包括从半导体晶片去除掺杂剂层。 在执行所述去除掺杂剂层之前，不对掺杂剂层进行化学蚀刻。
-
公开(公告)号：US20090197400A1
公开(公告)日：2009-08-06
申请号：US12023224
申请日：2008-01-31
IPC分类号： H01L21/22
CPC分类号： H01L21/26513 , H01L21/02032
摘要： A method of recycling monitor wafers. The method includes: (a) providing a semiconductor wafer which includes a dopant layer extending from a top surface of the wafer into the wafer a distance less than a thickness of the wafer, the dopant layer containing dopant species; after (a), (b) attaching an adhesive tape to a bottom surface of the wafer; after (b), (c) removing the dopant layer; and after (c), (d) removing the adhesive tape.
摘要翻译： 监测晶圆回收方法。 该方法包括：（a）提供半导体晶片，其包括掺杂剂层，该掺杂剂层从晶片的顶表面延伸到晶片的距离小于晶片的厚度，所述掺杂剂层含有掺杂剂物质; （a）之后，（b）将粘合带附着在晶片的底面上; （b）之后，（c）去除掺杂剂层; （c）之后，（d）去除胶带。
-
公开(公告)号：US07008852B2
公开(公告)日：2006-03-07
申请号：US11001140
申请日：2004-12-02
申请人： Arne W. Ballantine , Douglas D. Coolbaugh , Jeffrey Gilbert , Joseph R. Greco , Glenn R. Miller
发明人： Arne W. Ballantine , Douglas D. Coolbaugh , Jeffrey Gilbert , Joseph R. Greco , Glenn R. Miller
IPC分类号： H01L21/331
CPC分类号： H01L29/66272 , H01L21/3144 , H01L21/3185 , H01L29/0804 , H01L29/0895
摘要： A process for forming at least one interface region between two regions of semiconductor material. At least one region of dielectric material comprising nitrogen is formed in the vicinity of at least a portion of a boundary between the two regions of semiconductor material, thereby controlling electrical resistance at the interface.
摘要翻译： 一种在半导体材料的两个区域之间形成至少一个界面区域的方法。 在半导体材料的两个区域的至少一部分边界附近形成包含氮的介电材料的至少一个区域，从而控制界面处的电阻。
-
公开(公告)号：US07700488B2
公开(公告)日：2010-04-20
申请号：US11623354
申请日：2007-01-16
IPC分类号： H01L21/302 , H01L21/461
CPC分类号： H01L21/02032 , H01L21/02013
摘要： A wafer processing method. The method includes providing a semiconductor wafer. The semiconductor wafer includes (i) a semiconductor layer and (ii) a dopant layer on top of the semiconductor layer. The dopant layer comprises dopants. The method further includes removing the dopant layer from the semiconductor wafer. No chemical etching is performed on the dopant layer before said removing the dopant layer is performed.
摘要翻译： 晶圆加工方法。 该方法包括提供半导体晶片。 半导体晶片包括（i）半导体层和（ii）半导体层顶部上的掺杂剂层。 掺杂层包括掺杂剂。 该方法还包括从半导体晶片去除掺杂剂层。 在执行所述去除掺杂剂层之前，不对掺杂剂层进行化学蚀刻。
-
10.发明授权Method of controlling grain size in a polysilicon layer and in semiconductor devices having polysilicon structures 有权控制多晶硅层中的晶粒尺寸的方法和具有多晶硅结构的半导体器件公开(公告)号：US07247924B2
公开(公告)日：2007-07-24
申请号：US10695336
申请日：2003-10-28
IPC分类号： H01L27/082 , H01L27/102 , H01L29/70 , H01L31/11 , H01L21/331 , H01L21/8222
CPC分类号： H01L29/6656 , H01L21/02381 , H01L21/02488 , H01L21/02532 , H01L21/02595 , H01L21/0262 , H01L21/26506 , H01L21/26513 , H01L21/2652 , H01L29/0804 , H01L29/1083 , H01L29/4916 , H01L29/4925 , H01L29/66242 , H01L29/7375 , H01L29/7378 , Y10S257/914
摘要： A method of modulating grain size in a polysilicon layer and devices fabricated with the method. The method comprises forming the layer of polysilicon on a substrate; and performing an ion implantation of a polysilicon grain size modulating species into the polysilicon layer such that an average resultant grain size of the implanted polysilicon layer after performing a pre-determined anneal is higher or lower than an average resultant grain size than would be obtained after performing the same pre-determined anneal on the polysilicon layer without a polysilicon grain size modulating species ion implant.
摘要翻译： 调制多晶硅层的晶粒尺寸的方法和用该方法制造的器件。 该方法包括在衬底上形成多晶硅层; 并且进行多晶硅粒度调制物质的离子注入到所述多晶硅层中，使得在进行预定退火之后所述注入的多晶硅层的平均所得晶粒尺寸高于或低于平均得到的晶粒尺寸， 在多晶硅层上执行相同的预定退火，而不需要多晶粒度调节物质离子注入。
-
-
-
-
-
-
-
-
-
搜索结果
14 条记录 (耗时 0.032 秒)
