公开(公告)号：US20110287122A1

公开(公告)日：2011-11-24

申请号：US13116465

申请日：2011-05-26

Applicant: Wan-Doo KIM ,  Jun Hee LEE ,  Su-A PARK

Inventor： Wan-Doo KIM ,  Jun Hee LEE ,  Su-A PARK

IPC: B29C47/06

CPC classification number: C12N5/0062 ,  C12N2533/40

Abstract: An apparatus for fabricating a 3D scaffold includes: a plotter generating a microfiber structure; an electrospinning unit installed to be adjacent to the plotter along a first direction and spinning nanofiber in an internal space or on a surface of the microfiber structure to form a nanofiber web; a collection table reciprocating a lower portion of the plotter and that of the electrospinning unit along the first direction to allow the microfiber structure to be stacked thereon by the plotter and allow the nanofiber web to be formed thereon by the electrospinning unit; and a first guide rail allowing the collection table to be mounted thereon and guiding the collection table mounted thereon to reciprocate along the first direction.

Abstract translation: 一种用于制造3D支架的装置包括：产生微纤维结构的绘图仪; 一个静电纺丝单元，其沿着第一方向安装成与所述绘图机相邻并且在所述微纤维结构的内部空间或表面上纺丝纳米纤维以形成纳米纤维网; 沿着第一方向使绘图机的下部和静电纺丝单元的下部往复运动的收集台，以使微型纤维结构体通过绘图仪堆叠在其上，并通过静电纺丝单元在其上形成纳米纤维网; 以及允许收集台安装在其上并引导安装在其上的收集台沿着第一方向往复运动的第一导轨。

公开(公告)号：US20110215346A1

公开(公告)日：2011-09-08

申请号：US13111406

申请日：2011-05-19

Applicant: Yeo Jin YOON ,  Jong Kyu KIM ,  Jun Hee LEE

Inventor： Yeo Jin YOON ,  Jong Kyu KIM ,  Jun Hee LEE

IPC: H01L33/62

CPC classification number: H01L27/15 ,  H01L27/156 ,  H01L33/385 ,  H01L33/387 ,  H01L33/62 ,  H01L2924/0002 ,  H01L2924/00

Abstract: AC LED according to the present invention comprises a substrate, and at least one serial array having a plurality of light emitting cells connected in series on the substrate. Each of the light emitting cells comprises a lower semiconductor layer consisting of a first conductive compound semiconductor layer formed on top of the substrate, an upper semiconductor layer consisting of a second conductive compound semiconductor layer formed on top of the lower semiconductor layer, an active layer interposed between the lower and upper semiconductor layers, a lower electrode formed on the lower semiconductor layer exposed at a first corner of the substrate, an upper electrode layer formed on the upper semiconductor layer, and an upper electrode pad formed on the upper electrode layer exposed at a second corner of the substrate. The upper electrode pad and the lower electrode are respectively disposed at the corners diagonally opposite to each other, and the respective light emitting cells are arranged so that the upper electrode pad and the lower electrode of one of the light emitting cells are symmetric with respect to those of adjacent another of the light emitting cells.

Abstract translation: 根据本发明的AC LED包括衬底和至少一个串联阵列，其具有在衬底上串联连接的多个发光单元。 每个发光单元包括由形成在基板顶部上的第一导电化合物半导体层构成的下半导体层，由形成于下半导体层顶部的第二导电化合物半导体层构成的上半导体层，活性层 介于下半导体层和上半导体层之间的下电极，形成在衬底的第一角上露出的下半导体层上的下电极，形成在上半导体层上的上电极层和形成在上电极层上的上电极焊盘 在基片的第二个角落。 上电极焊盘和下电极分别设置在彼此对角相对的角上，并且各发光单元被布置成使得一个发光单元的上电极焊盘和下电极相对于 相邻另一个发光单元的那些。

公开(公告)号：US20090311816A1

公开(公告)日：2009-12-17

申请号：US12546155

申请日：2009-08-24

Applicant: Jae Ho LEE ,  Yeo Jin YOON ,  Eu Jin HWANG ,  Jong Kyu KIM ,  Jun Hee LEE

Inventor： Jae Ho LEE ,  Yeo Jin YOON ,  Eu Jin HWANG ,  Jong Kyu KIM ,  Jun Hee LEE

IPC: H01L21/70 ,  H01L33/00 ,  H01L25/03

CPC classification number: H01L25/0753 ,  H01L33/007 ,  H01L33/20 ,  H01L2224/48137 ,  H01L2224/49107 ,  H01L2224/73265

Abstract: Disclosed is an AC light emitting device having photonic crystal structures and a method of fabricating the same. The light emitting device includes a plurality of light emitting cells and metallic wirings electrically connecting the light emitting cells with one another. Further, each of the light emitting cells includes a first conductive type semiconductor layer, a second conductive type semiconductor layer disposed on one region of the first conductive type semiconductor layer, and an active layer interposed between the first and second conductive type semiconductor layers. In addition, a photonic crystal structure is formed in the second conductive type semiconductor layer. The photonic crystal structure prevents light emitted from the active layer from laterally propagating by means of a periodic array, such that light extraction efficiency of the light emitting device can be improved. Furthermore, the metallic wirings electrically connect a plurality of light emitting cells with one another such that an AC light emitting device can be provided.

Abstract translation: 公开了具有光子晶体结构的AC发光器件及其制造方法。 发光器件包括多个发光单元和将发光单元彼此电连接的金属布线。 此外，每个发光单元包括第一导电类型半导体层，设置在第一导电类型半导体层的一个区域上的第二导电类型半导体层以及置于第一和第二导电类型半导体层之间的有源层。 此外，在第二导电型半导体层中形成光子晶体结构。 光子晶体结构防止从有源层发射的光通过周期性阵列横向传播，使得可以提高发光器件的光提取效率。 此外，金属配线将多个发光单元彼此电连接，从而可以提供交流发光装置。

公开(公告)号：US20170059869A1

公开(公告)日：2017-03-02

申请号：US15351940

申请日：2016-11-15

Applicant: Jun Hee LEE

Inventor： Jun Hee LEE

IPC: G02B27/01 ,  G02B27/22 ,  G02C11/00 ,  G02B27/26

CPC classification number: G02B27/0172 ,  G02B27/2264 ,  G02B27/26 ,  G02B2027/0134 ,  G02B2027/0178 ,  G02C11/10

Abstract: Disclosed is an optical system for a head mount display, including at least a display unit that is provided on an inner surface of a leg area of an eyeglass frame to provide virtual screen light, an optical path adjusting unit that is provided on a nose support area of the eyeglass frame to convert a direction of the virtual screen light delivered from the display unit by refracting or reflecting the virtual screen light, and an optical coupling unit that is provided in an interior of an eyeglass lens or at a location that is adjacent to the eyeglass lens to combine a virtual screen and a reality screen that is introduced from the outside and deliver the combined screen to the eyes of a wearer.

Abstract translation: 公开了一种用于头戴式显示器的光学系统，包括至少一个显示单元，该显示单元设置在眼镜架的腿部区域的内表面上以提供虚拟屏幕光;光路调节单元，设置在鼻部支撑 通过折射或反射虚拟屏幕光来转换从显示单元传送的虚拟屏幕光的方向的眼镜框架的区域，以及设置在眼镜镜片的内部或相邻位置处的光耦合单元 到眼镜镜片组合虚拟屏幕和从外部引入的现实屏幕，并将组合的屏幕传递给佩戴者的眼睛。

公开(公告)号：US20100072494A1

公开(公告)日：2010-03-25

申请号：US12626556

申请日：2009-11-25

Applicant: Jun Hee LEE ,  Jong Kyu KIM ,  Yeo Jin YOON

Inventor： Jun Hee LEE ,  Jong Kyu KIM ,  Yeo Jin YOON

IPC: H01L33/00

CPC classification number: H01L27/15 ,  H01L27/156 ,  H01L33/62 ,  H01L2224/48137 ,  H01L2224/73265 ,  H01L2924/12041

Abstract: There is provided a light emitting diode operating under AC power comprising a substrate; a buffer layer formed on the substrate; and a plurality of light emitting cells formed on the buffer layer to have different sizes and to be electrically isolated from one another, the plurality of light emitting cells being connected in series through metal wires.According to the present invention, light emitting cells formed in an LED have different sizes, and thus have different turn-on voltages when light is emitted under AC power, so that times when the respective light emitting cells start emitting light are different to thereby effectively reduce a flicker phenomenon.

公开(公告)号：US20110195538A1

公开(公告)日：2011-08-11

申请号：US13089544

申请日：2011-04-19

Applicant: Jun Hee LEE ,  Jong Kyu KIM ,  Yeo Jin YOON

Inventor： Jun Hee LEE ,  Jong Kyu KIM ,  Yeo Jin YOON

IPC: H01L33/06

CPC classification number: H01L33/0095 ,  H01L33/20

Abstract: The present invention provides a method of fabricating a light emitting diode chip having an active layer between an N type semiconductor layer and a P type semiconductor layer. The method comprises the steps of preparing a substrate; laminating the semiconductor layers on the substrate, the semiconductor layers having the active layer between the N type semiconductor layer and the P type semiconductor layer; and forming grooves on the semiconductor layers laminated on the substrate until the substrate is exposed, whereby inclined sidewalls are formed by the grooves in the semiconductor layers divided into a plurality of chips. According to embodiments of the present invention, a sidewall of a semiconductor layer formed on a substrate of a light emitting diode chip is inclined with respect to the substrate, whereby its directional angle is widened as compared with a light emitting diode chip without such inclination. As the directional angle of the light emitting diode chip is wider, when a white light emitting device is fabricated using the light emitting diode chip and a phosphor, light uniformity can be adjusted even though the phosphor is not concentrated at the center of the device. Thus, the overall light emitting efficiency can be enhanced by reducing a light blocking phenomenon caused by the increased amount of the phosphor distributed at the center portion.

Abstract translation: 本发明提供一种制造在N型半导体层和P型半导体层之间具有有源层的发光二极管芯片的方法。 该方法包括以下步骤：制备基底; 在所述基板上层叠所述半导体层，所述半导体层具有在所述N型半导体层和所述P型半导体层之间的有源层; 以及在层叠在基板上的半导体层上形成凹槽，直到基板被暴露，由此通过划分成多个芯片的半导体层中的凹槽形成倾斜的侧壁。 根据本发明的实施例，形成在发光二极管芯片的基板上的半导体层的侧壁相对于基板倾斜，由此与没有倾斜的发光二极管芯片相比，其方向角度变宽。 随着发光二极管芯片的方位角变宽，当使用发光二极管芯片和荧光体制造白色发光器件时，即使荧光体不集中在器件的中心，也可以调整光均匀性。 因此，通过减少由分散在中心部分的荧光体的量增加引起的遮光现象，可以提高整体发光效率。