System and method of reference cell testing
    1.
    发明授权
    System and method of reference cell testing 有权
    参考细胞测试的系统和方法

    公开(公告)号:US08406072B2

    公开(公告)日:2013-03-26

    申请号:US12861259

    申请日:2010-08-23

    IPC分类号: G11C29/00

    摘要: Systems and methods of testing a reference cell in a memory array are disclosed. In a particular embodiment, a method of testing a reference cell in a memory array includes coupling a first reference cell of a first reference cell pair of the memory array to a first input of a first sense amplifier of the memory array. The method also includes providing a reference signal to a second input of the first sense amplifier. The reference signal is associated with a second reference cell pair of the memory array.

    摘要翻译: 公开了测试存储器阵列中的参考单元的系统和方法。 在特定实施例中,测试存储器阵列中的参考单元的方法包括将存储器阵列的第一参考单元对的第一参考单元与存储器阵列的第一读出放大器的第一输入相耦合。 该方法还包括向第一读出放大器的第二输入提供参考信号。 参考信号与存储器阵列的第二参考单元对相关联。

    System and Method to Select a Reference Cell
    3.
    发明申请
    System and Method to Select a Reference Cell 失效
    选择参考单元的系统和方法

    公开(公告)号:US20110194333A1

    公开(公告)日:2011-08-11

    申请号:US12702486

    申请日:2010-02-09

    摘要: A system and method to select a reference cell is disclosed. In a particular embodiment, a method is disclosed that includes receiving an address corresponding to a bit cell within a first bank of a memory. The method also includes accessing a second reference cell of a second bank of the memory in response to a first reference cell in the first bank being indicated as bypassed.

    摘要翻译: 公开了一种选择参考单元的系统和方法。 在特定实施例中,公开了一种方法,其包括接收对应于存储器的第一组内的位单元的地址。 该方法还包括响应于第一组中的第一参考单元被指示为旁路而访问存储器的第二组的第二参考单元。

    System and method to select a reference cell
    4.
    发明授权
    System and method to select a reference cell 失效
    选择参考单元的系统和方法

    公开(公告)号:US08724414B2

    公开(公告)日:2014-05-13

    申请号:US12702486

    申请日:2010-02-09

    摘要: A system and method to select a reference cell is disclosed. In a particular embodiment, a method is disclosed that includes receiving an address corresponding to a bit cell within a first bank of a memory. The method also includes accessing a second reference cell of a second bank of the memory in response to a first reference cell in the first bank being indicated as bypassed.

    摘要翻译: 公开了一种选择参考单元的系统和方法。 在特定实施例中,公开了一种方法,其包括接收对应于存储器的第一组内的位单元的地址。 该方法还包括响应于第一组中的第一参考单元被指示为旁路而访问存储器的第二组的第二参考单元。

    System and Method of Reference Cell Testing
    6.
    发明申请
    System and Method of Reference Cell Testing 有权
    参考细胞测试的系统和方法

    公开(公告)号:US20120044755A1

    公开(公告)日:2012-02-23

    申请号:US12861259

    申请日:2010-08-23

    IPC分类号: G11C11/14 G11C29/00

    摘要: In a particular embodiment, a method of testing a reference cell in a memory array includes coupling a first reference cell of a first reference cell pair of the memory array to a first input of a first sense amplifier of the memory array. The method also includes providing a reference signal to a second input of the first sense amplifier. The reference signal is associated with a second reference cell pair of the memory array.

    摘要翻译: 在特定实施例中,测试存储器阵列中的参考单元的方法包括将存储器阵列的第一参考单元对的第一参考单元与存储器阵列的第一读出放大器的第一输入相耦合。 该方法还包括向第一读出放大器的第二输入提供参考信号。 参考信号与存储器阵列的第二参考单元对相关联。

    System and method for shared sensing MRAM
    8.
    发明授权
    System and method for shared sensing MRAM 有权
    共享感测MRAM的系统和方法

    公开(公告)号:US08587994B2

    公开(公告)日:2013-11-19

    申请号:US13177992

    申请日:2011-07-07

    IPC分类号: G11C11/00 G11C7/02

    CPC分类号: G11C11/1693 G11C11/1673

    摘要: Resistance memory cells of MRAM arrays are designated as reference cells and programmed to binary 0 and binary 1 states, reference cells from one MRAM array at binary 0 and at binary 1 are concurrently accessed to obtain a reference voltage to read resistance memory cells of another MRAM array, reference cells from the other MRAM array at binary 0 and binary 1 are concurrently accessed to obtain a reference voltage to read resistance memory cells of the one MRAM array.

    摘要翻译: 将MRAM阵列的电阻存储单元指定为参考单元,并编程为二进制0和二进制1状态,同时访问来自二进制0和二进制1的一个MRAM阵列的参考单元以获得参考电压以读取另一MRAM的电阻存储单元 数组,二进制0和二进制1的另一个MRAM阵列的参考单元被同时访问,以获得读取一个MRAM阵列的电阻存储单元的参考电压。

    Magnetic random access memory (MRAM) read with reduced disturb failure
    9.
    发明授权
    Magnetic random access memory (MRAM) read with reduced disturb failure 有权
    磁性随机存取存储器(MRAM)以减少的干扰故障读取

    公开(公告)号:US08570797B2

    公开(公告)日:2013-10-29

    申请号:US13035006

    申请日:2011-02-25

    IPC分类号: G11C11/14

    CPC分类号: G11C11/1673 G11C11/1693

    摘要: Magnetic tunnel junctions (MTJs) in magnetic random access memory (MRAM) are subject to read disturb events when the current passing through the MTJ causes a spontaneous switching of the MTJ due to spin transfer torque (STT) from a parallel state to an anti-parallel state or from an anti-parallel state to a parallel state. Because the state of the MTJ corresponds to stored data, a read disturb event may cause data loss in MRAM devices. Read disturb events may be reduced by controlling the direction of current flow through the MTJ. For example, the current direction through a reference MTJ may be selected based on the state of the reference MTJ. In another example, the current direction through a data or reference MTJ may be alternated such that the MTJ is only subject to read disturb events during approximately half the read operations on the MTJ.

    摘要翻译: 磁流体随机存取存储器(MRAM)中的磁隧道结(MTJ)在经过MTJ的电流导致由于自旋转移转矩(STT)从平行状态到抗反射的MTJ自发切换时,受到读取干扰事件, 平行状态或从反平行状态到并行状态。 因为MTJ的状态对应于存储的数据,读取干扰事件可能导致MRAM设备中的数据丢失。 通过控制通过MTJ的电流的方向可以减少读取干扰事件。 例如,可以基于参考MTJ的状态来选择通过参考MTJ的当前方向。 在另一示例中,可以交替通过数据或参考MTJ的当前方向,使得MTJ仅在MTJ上的大约一半的读取操作期间经受读取干扰事件。

    Row-decoder circuit and method with dual power systems
    10.
    发明授权
    Row-decoder circuit and method with dual power systems 有权
    具有双电源系统的行解码器电路和方法

    公开(公告)号:US08526266B2

    公开(公告)日:2013-09-03

    申请号:US13032979

    申请日:2011-02-23

    IPC分类号: G11C8/00

    摘要: A Spin-Transfer-Torque Magnetic Random Access Memory includes a dual-voltage row decoder with charge sharing for read operations. The dual-voltage row decoder with charge sharing for read operations reduces read-disturbance failure rates and provides a robust macro design with improved yields. Voltage from one of the power supplies can be applied during a write operation.

    摘要翻译: 旋转转矩磁性随机存取存储器包括具有用于读取操作的电荷共享的双电压行解码器。 具有用于读取操作的电荷共享的双电压行解码器可降低读取干扰故障率,并提供强大的宏设计,提高产量。 在写入操作期间可以应用来自其中一个电源的电压。