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    CMOS output buffer with negative feedback dynamic-drive control and dual P,N active-termination transmission gates
    2.
    发明授权
    CMOS output buffer with negative feedback dynamic-drive control and dual P,N active-termination transmission gates 有权
    具有负反馈动态驱动控制和双P，N有源终端传输门的CMOS输出缓冲器

    公开(公告)号：US06184730B2

    公开(公告)日：2001-02-06

    申请号：US09432368

    申请日：1999-11-03

    申请人： David Kwong ,  Baohua Chen

    发明人： David Kwong ,  Baohua Chen

    IPC分类号： H03B100

    CPC分类号： H03K17/167 ,  H03K19/00361

    摘要： An output buffer for a line driver uses transmission gates for active termination. A large p-channel driver is pulsed on during a low-to-high output transition, but this driver is turned off once the output voltage reaches a threshold. A feedback circuit includes a sensing inverter that has its input connected to the output node. The sensing inverter causes the gate of the p-channel driver to be driven high once the output swings past the threshold. A similar n-channel driver transistor is pulsed on during a low-going output transition but is disabled by a feedback circuit that senses the output voltage falling below a threshold. A pullup transmission gate is also connected between the output and the power supply, while a pulldown transmission gate is connected between the output and ground. Each transmission gate contains a p-channel and a n-channel transistor in parallel. The sizes of the p-channel and n-channel transistors in the transmission gate is sufficiently small to provide a resistance of 25 to 30 ohms. Both transistors in the pullup transmission gate are turned on when the output is driven high, while both transistors of the pulldown transmission gate are turned on when the output is driven low. Having both n and p transistors of the transmission gate on provides a more linear resistance across the voltage swing of the output. Since termination of about 25-30 ohms is provided by the transmission gate, an external series resistor is not needed for dampening. When driving large capacitive loads, several nanoseconds of R-C delay can be saved.

    摘要翻译： 用于线路驱动器的输出缓冲器使用传输门来进行有源终止。 在低至高输出转换期间，大的p沟道驱动器被脉冲输入，但是一旦输出电压达到阈值，该驱动器就被关断。 反馈电路包括感测反相器，其输入端连接到输出节点。 一旦输出摆动超过阈值，感测反相器就会使p沟道驱动器的栅极驱动为高电平。 类似的n沟道驱动晶体管在低电平输出转变期间被脉冲输入，但是由感测输出电压低于阈值的反馈电路禁用。 上拉传输门也连接在输出和电源之间，而下拉传输门连接在输出和地之间。 每个传输门包括并行的p沟道和n沟道晶体管。 传输门中p沟道和n沟道晶体管的尺寸足够小以提供25至30欧姆的电阻。 当输出被驱动为高电平时，上拉传输门中的两个晶体管导通，而当输出被驱动为低电平时，下拉传输门的两个晶体管导通。 使传输门极的n和p晶体管都在输出的电压摆幅上提供更线性的电阻。 由于传输门提供约25-30欧姆的终止，因此不需要外部串联电阻进行阻尼。 当驱动大容性负载时，可以节省几纳秒的R-C延迟。

    Quiet output buffers with neighbor sensing of wide bus and control signals
    3.
    发明授权
    Quiet output buffers with neighbor sensing of wide bus and control signals 失效
    安静的输出缓冲器，具有宽的总线和控制信号的相邻感测

    公开(公告)号：US06329835B1

    公开(公告)日：2001-12-11

    申请号：US09511015

    申请日：2000-02-23

    申请人： Baohua Chen

    发明人： Baohua Chen

    IPC分类号： H03K19003

    CPC分类号： H03K19/00346

    摘要： An output buffer has a large pull-down driver transistor that draws a large current. The large driver transistor is pulsed off when a neighboring pin is switching, reducing noise and ground bounce. Pulse signals and a local enable are NOR'ed together to drive the gate of the large driver. The pulse signals are routed to many output buffers in a chip. Each data input is sent to a detector slice. The detector slice normally generates a pulse when the data input changes. These pulses from individual detector slices are combined into the pulse signals. The detector slice also receives a control signal from a control input to the chip. The control input enables a latch or flip-flop in the data path from the data input to the output buffer. When the latch is enabled, changes in the data input do not immediately affect the output buffer, but must wait for a clock edge. The control input that enables the latch also controls a mux in each detector slice. The mux disables the bit slice from generating a pulse when the data input changes.

    摘要翻译： 输出缓冲器具有大的下拉驱动晶体管，其吸引大电流。 当相邻引脚正在切换时，大的驱动晶体管被脉冲关闭，从而减少噪声和接地反弹。 脉冲信号和本地使能被NOR相连以驱动大型驱动器的门。 脉冲信号被路由到芯片中的许多输出缓冲器。 每个数据输入被发送到检测器切片。 当数据输入变化时，检测器片通常产生脉冲。 来自各个检测器片的这些脉冲被组合成脉冲信号。 检测器片还从控制输入接收到芯片的控制信号。 控制输入​​使能从数据输入到输出缓冲器的数据通路中的锁存器或触发器。 当锁存器使能时，数据输入的变化不会立即影响输出缓冲器，而必须等待时钟沿。 启用锁存器的控制输入也可以控制每个检测器片中的多路复用器。 当数据输入改变时，复用器禁止位片产生脉冲。

    Method for preventing TMR MRR drop of a slider
    5.
    发明授权
    Method for preventing TMR MRR drop of a slider 有权
    用于防止滑块的TMR MRR下降的方法

    公开(公告)号：US07552524B2

    公开(公告)日：2009-06-30

    申请号：US11434518

    申请日：2006-05-16

    申请人： Hongtao Ma ,  Hongxin Fang ,  Baohua Chen

    发明人： Hongtao Ma ,  Hongxin Fang ,  Baohua Chen

    IPC分类号： G11B5/127 ,  H04R31/00

    CPC分类号： G11B5/3173 ,  B82Y10/00 ,  B82Y25/00 ,  G11B5/3163 ,  G11B5/3169 ,  G11B5/3906 ,  G11B5/3909 ,  Y10T29/49021 ,  Y10T29/49032 ,  Y10T29/49041 ,  Y10T29/49043 ,  Y10T29/49046 ,  Y10T29/49048 ,  Y10T29/49052

    摘要： A method for preventing TMR (tunnel magneto-resistance) MRR (magneto-resistance resistance) drop of a slider, comprises steps of: positioning a row bar constructed by a plurality of slider structural bodies on a tray, each slider body having a pole tip with a TMR element; loading the tray into a processing chamber and evacuating the processing chamber to a preset pressure; introducing a processing gas containing oxygen gas into the processing chamber; and exposing the slider structural bodies to an etching means in the atmosphere of the processing gas to oxidize a surface of the TMR element to form an oxidation layer thereon. The invention also discloses a method for forming micro-texture on a surface of slider in same process, and a method for forming such a slider.

    摘要翻译： 用于防止滑块的TMR（隧道磁阻）MRR（耐磁阻电阻）下降的方法包括以下步骤：将由多个滑块结构体构成的行棒定位在托盘上，每个滑块体具有极尖 与TMR元素; 将托盘装载到处理室中并将处理室抽空至预设压力; 将含有氧气的处理气体引入所述处理室; 并且将所述滑块结构体暴露于所述处理气体的气氛中的蚀刻装置，以氧化所述TMR元件的表面以在其上形成氧化层。 本发明还公开了一种用于在相同工艺中在滑块的表面上形成微纹理的方法，以及用于形成这种滑块的方法。

    Dynamic PCI-bus pre-fetch with separate counters for commands of commands of different data-transfer lengths
    6.
    发明授权
    Dynamic PCI-bus pre-fetch with separate counters for commands of commands of different data-transfer lengths 有权
    动态PCI总线预取，具有不同数据传输长度命令命令的独立计数器

    公开(公告)号：US07107384B1

    公开(公告)日：2006-09-12

    申请号：US10708412

    申请日：2004-03-01

    申请人： Baohua Chen ,  Kimchung Arthur Wong ,  Zhinan Zhou

    发明人： Baohua Chen ,  Kimchung Arthur Wong ,  Zhinan Zhou

    IPC分类号： G06F13/14 ,  G06F13/36 ,  G06K9/34 ,  G06F3/00

    CPC分类号： G06F13/4027 ,  G06F12/0862 ,  G06F2212/6022 ,  G06F2213/0024

    摘要： A Peripheral Component Interconnect (PCI) bridge between two buses prefetches read data into a cache. The number of cache lines to prefetch is predicted by a prefetch counter. One prefetch counter is kept for each type of memory-read command: basic memory-read (MR), memory-read-line (MRL) that reads a cache line, and memory-read-multiple (MRM) that reads multiple cache lines. For each type of read command, counters are kept of the number of completed commands, bus-disconnects (indicating under-fetch), and master-discard of data (indicating over-fetch). After a predetermined number of execution of each type of command, the command's prefetch counter is incremented if under-fetching occurred, or decremented if over-fetching occurred, as indicated by the disconnect and discard counters for that type of read command. The command's other counters are reset. Prefetching is optimized for each type of read command. MRM can prefetch more data than MRL or MR.

    摘要翻译： 两个总线之间的外围组件互连（PCI）桥接预读取数据到高速缓存中。 要预取的高速缓存行数由预取计数器预测。 对于每种类型的存储器读取命令，保留一个预取计数器：读取高速缓存行的基本存储器读取（MR），存储器读取行（MRL）以及读取多个高速缓存行的存储器读取多个（MRM） 。 对于每种类型的读取命令，计数器都保留已完成命令的数量，总线断开（指示欠载）和数据丢弃（表示超出）。 在每种类型的命令执行预定数量的执行之后，如果发生欠牵引，则命令的预取计数器递增，如果发生超速提取则递减，如该类型的读取命令的断开和丢弃计数器所示。 命令的其他计数器复位。 针对每种类型的读取命令优化预取。 MRM可以预取比MRL或MR更多的数据。

    Method for preventing TMR MRR drop of slider and micro-texture forming method in same process
    8.
    发明申请
    Method for preventing TMR MRR drop of slider and micro-texture forming method in same process 有权
    在同一过程中防止滑块和微纹理形成方法的TMR MRR下降的方法

    公开(公告)号：US20080000075A1

    公开(公告)日：2008-01-03

    申请号：US11434518

    申请日：2006-05-16

    申请人： Hongtao Ma ,  Hongxin Fang ,  Baohua Chen

    发明人： Hongtao Ma ,  Hongxin Fang ,  Baohua Chen

    IPC分类号： G11B5/127

    CPC分类号： G11B5/3173 ,  B82Y10/00 ,  B82Y25/00 ,  G11B5/3163 ,  G11B5/3169 ,  G11B5/3906 ,  G11B5/3909 ,  Y10T29/49021 ,  Y10T29/49032 ,  Y10T29/49041 ,  Y10T29/49043 ,  Y10T29/49046 ,  Y10T29/49048 ,  Y10T29/49052

    摘要： A method for preventing TMR (tunnel magneto-resistance) MRR (magneto-resistance resistance) drop of a slider, comprises steps of: positioning a row bar constructed by a plurality of slider structural bodies on a tray, each slider body having a pole tip with a TMR element; loading the tray into a processing chamber and evacuating the processing chamber to a preset pressure; introducing a processing gas containing oxygen gas into the processing chamber; and exposing the slider structural bodies to an etching means in the atmosphere of the processing gas to oxidize a surface of the TMR element to form an oxidation layer thereon. The invention also discloses a method for forming micro-texture on a surface of slider in same process, and a method for forming such a slider.

    摘要翻译： 用于防止滑块的TMR（隧道磁阻）MRR（耐磁阻电阻）下降的方法包括以下步骤：将由多个滑块结构体构成的行棒定位在托盘上，每个滑块体具有极尖 与TMR元素; 将托盘装载到处理室中并将处理室抽空至预设压力; 将含有氧气的处理气体引入所述处理室; 并且将所述滑块结构体暴露于所述处理气体的气氛中的蚀刻装置，以氧化所述TMR元件的表面以在其上形成氧化层。 本发明还公开了一种用于在相同工艺中在滑块的表面上形成微纹理的方法，以及用于形成这种滑块的方法。

    CMOS output buffer with feedback control on sources of pre-driver stage
    9.
    发明授权
    CMOS output buffer with feedback control on sources of pre-driver stage 失效
    CMOS输出缓冲器，具有预驱动级源的反馈控制

    公开(公告)号：US06255867B1

    公开(公告)日：2001-07-03

    申请号：US09511014

    申请日：2000-02-23

    申请人： Baohua Chen

    发明人： Baohua Chen

    IPC分类号： H03K300

    CPC分类号： H03K19/00361

    摘要： Ground and power-supply bounce are reduced for a CMOS output buffer. An n-channel driver transistor and a p-channel driver transistor are attached to the output pad. The gate of the n-channel driver transistor is driven by a pre-driver inverter. The pre-driver is a CMOS inverter except that the p-channel source is connected to power through a p-channel and an n-channel source-control transistor in parallel. The n-channel source-control transistor has its gate connected to power so that it remains on. The p-channel source-control transistor has its gate driven by feedback. The feedback is buffered from the output pad, or inverted from the gate of the driver transistor. When the output buffer switches, only the n-channel source-control transistor is initially on, so the current charging the driver gate is limited. The driver turns on slowly at first. Later, the feedback turns on the p-channel source-control transistor, increasing (doubling) the current to charge the driver gate. Thus the driver turns on more rapidly than at first, reducing di/dt and noise. Split driver transistors, and source control on the n-channel transistor are alternatives.

    摘要翻译： 对于CMOS输出缓冲器，接地和电源反弹减少。 n沟道驱动晶体管和p沟道驱动晶体管连接到输出焊盘。 n沟道驱动晶体管的栅极由预驱动器反相器驱动。 预驱动器是CMOS反相器，除了p沟道源通过p沟道和N沟道源极 - 控制晶体管并联连接到电源。 n沟道源极控制晶体管的栅极连接电源，使其保持导通。 p沟道源极控制晶体管的栅极由反馈驱动。 反馈从输出焊盘缓冲，或从驱动晶体管的栅极反相。 当输出缓冲器切换时，只有n沟道源极 - 控制晶体管初始导通，所以对驱动器栅极充电的电流是有限的。 司机首先慢慢开车。 之后，反馈将导​​通p沟道源极控制晶体管，增加（倍增）电流以对驱动器栅极充电。 因此，驱动器比起初更快地开启，减少di / dt和噪声。 分流驱动晶体管和n沟道晶体管上的源极控制是替代方案。

    CMOS over voltage-tolerant output buffer without transmission gate
    10.
    发明授权
    CMOS over voltage-tolerant output buffer without transmission gate 有权
    CMOS过压保护输出缓冲器，无传输门

    公开(公告)号：US06208178B1

    公开(公告)日：2001-03-27

    申请号：US09511011

    申请日：2000-02-23

    申请人： Baohua Chen

    发明人： Baohua Chen

    IPC分类号： H03K508

    CPC分类号： H03K19/00315

    摘要： An isolating output buffer is operated by a low-voltage Vcc power supply, yet can be put in a high-impedance state. The output buffer does not draw significant current when its output is driven by an external driver to a voltage above Vcc. The over-voltage on the output pad is coupled to the n-well under p-channel transistors through a fixed-gate p-channel transistor. The over-voltage from the n-well is then coupled to a source node through another p-channel transistor. The source node is the source of a p-channel transistor that drives the gate of a p-channel driver transistor driving the output pad. The source node is normally driven to Vcc by another p-channel transistor. The p-channel transistor can be split into two driver transistors that are separately driven by two isolating inverters or gates. The isolating gates have p-channel transistors connected to the source node. Using split drivers can reduce noise and di/dt when the two driver transistor are enabled at slightly different times. The output buffer is implemented entirely in CMOS without using bipolar transistors. The isolating output buffer is faster because it does not use a transmission gate in the speed path.

    摘要翻译： 隔离输出缓冲器由低电压Vcc电源供电，但可以处于高阻态。 当输出缓冲器的输出由外部驱动器驱动到高于Vcc的电压时，输出缓冲器不会产生显着的电流。 输出焊盘上的过电压通过固定栅极p沟道晶体管耦合到p沟道晶体管的n阱。 然后，来自n阱的过电压通过另一个p沟道晶体管耦合到源节点。 源节点是驱动驱动输出焊盘的p沟道驱动晶体管的栅极的p沟道晶体管的源极。 源节点通常由另一个p沟道晶体管驱动到Vcc。 p沟道晶体管可以分为两个由两个隔离反相器或栅极驱动的驱动晶体管。 隔离栅极具有连接到源节点的p沟道晶体管。 当两个驱动晶体管在稍微不同的时间使能时，使用分频驱动器可以降低噪声和di / dt。 输出缓冲器完全在CMOS中实现，而不使用双极晶体管。 隔离输出缓冲器更快，因为在速度路径中不使用传输门。