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    NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE
    3.
    发明申请
    NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE 有权
    非易失性半导体存储器件

    公开(公告)号：US20140138597A1

    公开(公告)日：2014-05-22

    申请号：US13845935

    申请日：2013-03-18

    Applicant: KABUSHIKI KAISHA TOSHIBA

    Inventor： Yasuhiro NOJIRI ,  Hiroyuki FUKUMIZU ,  Shigeki KOBAYASHI ,  Masaki YAMATO

    IPC: H01L45/00

    CPC classification number: H01L45/16 ,  H01L27/2454 ,  H01L27/249 ,  H01L45/04 ,  H01L45/1226 ,  H01L45/146 ,  H01L45/149

    Abstract: First conductive layers extend in a first direction horizontal to a substrate as a longitudinal direction, and are stacked in a direction perpendicular to a substrate. An interlayer insulating layer is provided between the first conductive layers. The variable resistance layers functioning as a variable resistance element are formed continuously on the side surfaces of the first conductive layers and the interlayer insulating layer. A columnar conductive layer is provided on the side surfaces of the first conductive layers and the interlayer insulating layer via the variable resistance layers. First side surfaces of the first conductive layers are recessed from a second side surface of the interlayer insulating layer in the direction away from the columnar conductive layers.

    Abstract translation: 第一导电层沿着与基板垂直的第一方向作为纵向方向延伸，并且在垂直于基板的方向上堆叠。 在第一导电层之间设置层间绝缘层。 用作可变电阻元件的可变电阻层在第一导电层和层间绝缘层的侧表面上连续地形成。 通过可变电阻层，在第一导电层和层间绝缘层的侧表面上设置柱状导电层。 第一导电层的第一侧表面从层间绝缘层的第二侧表面沿远离柱状导电层的方向凹陷。

    NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FORMING SAME
    4.
    发明申请
    NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FORMING SAME 有权
    非易失性半导体存储器件及其形成方法

    公开(公告)号：US20140063911A1

    公开(公告)日：2014-03-06

    申请号：US13845668

    申请日：2013-03-18

    Applicant: KABUSHIKI KAISHA TOSHIBA

    Inventor： Yasuhiro NOJIRI ,  Shigeki Kobayashi ,  Masaki Yamato ,  Hiroyuki Fukumizu

    IPC: G11C13/00

    CPC classification number: G11C13/0002 ,  G11C13/0007 ,  G11C13/0069

    Abstract: A nonvolatile semiconductor memory device according to an embodiment comprises: a memory cell array including a plurality of memory layers; and a control unit configured to control a voltage applied to the memory cell array. Each of the memory layers comprises a first line and a second line, and further includes a memory cell disposed between the first line and the second line and including a variable resistance element. The control unit is configured to, when executing a forming operation on the memory cell array, execute the forming operation sequentially on the plurality of memory layers. The forming operation is executed sequentially on the memory layers in ascending order of a magnitude of a non-selected current flowing in a non-selected memory cell during the forming operation.

    Abstract translation: 根据实施例的非易失性半导体存储器件包括：包括多个存储层的存储单元阵列; 以及控制单元，被配置为控制施加到存储单元阵列的电压。 每个存储层包括第一行和第二行，并且还包括位于第一行和第二行之间并包括可变电阻元件的存储单元。 控制单元被配置为当在存储单元阵列上执行形成操作时，在多个存储层上顺序地执行形成操作。 成形操作在成形操作期间以在未选择的存储单元中流动的未选择电流的大小的升序顺序地在存储器层上执行。

    METHOD FOR MANUFACTURING NONVOLATILE MEMORY DEVICE
    5.
    发明申请
    METHOD FOR MANUFACTURING NONVOLATILE MEMORY DEVICE 审中-公开
    制造非易失性存储器件的方法

    公开(公告)号：US20130237008A1

    公开(公告)日：2013-09-12

    申请号：US13870424

    申请日：2013-04-25

    Applicant: KABUSHIKI KAISHA TOSHIBA

    Inventor： Yasuhiro NOJIRI ,  Hiroyuki FUKUMIZU ,  Shinichi NAKAO ,  Kei WATANABE ,  Kazuhiko YAMAMOTO ,  Ichiro MIZUSHIMA ,  Yoshio OZAWA

    IPC: H01L51/05

    CPC classification number: H01L51/0591 ,  B82Y10/00 ,  B82Y40/00 ,  G11C13/0002 ,  G11C13/025 ,  G11C2213/71 ,  H01L27/2409 ,  H01L27/2481 ,  H01L45/04 ,  H01L45/149 ,  H01L45/1608

    Abstract: According to one embodiment, a method is disclosed for manufacturing a nonvolatile memory device. The nonvolatile memory device includes a memory cell connected to a first interconnect and a second interconnect. The method can include forming a first electrode film on the first interconnect. The method can include forming a layer including a plurality of carbon nanotubes dispersed inside an insulator on the first electrode film. At least one carbon nanotube of the plurality of carbon nanotubes is exposed from a surface of the insulator. The method can include forming a second electrode film on the layer. In addition, the method can include forming a second interconnect on the second electrode film.

    Abstract translation: 根据一个实施例，公开了一种用于制造非易失性存储器件的方法。 非易失性存储器件包括连接到第一互连和第二互连的存储单元。 该方法可以包括在第一互连上形成第一电极膜。 该方法可以包括在第一电极膜上形成分散在绝缘体内的多个碳纳米管的层。 多个碳纳米管中的至少一个碳纳米管从绝缘体的表面露出。 该方法可以包括在该层上形成第二电极膜。 另外，该方法可以包括在第二电极膜上形成第二互连。

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