公开(公告)号：US20240421122A1

公开(公告)日：2024-12-19

申请号：US18743211

申请日：2024-06-14

Applicant: Kioxia Corporation

Inventor： Masayuki MIURA ,  Kazuma HASEGAWA ,  Yuichi SANO

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L23/528 ,  H10B80/00

Abstract: A semiconductor device according to an embodiment includes a substrate, a plurality of first semiconductor chips, a plurality of first resins, and a second semiconductor chip. The substrate has a first surface. The plurality of first semiconductor chips are stacked while being displaced in a direction substantially parallel to the first surface. The plurality of first resins are provided on respective lower surfaces of the plurality of first semiconductor chips. The second semiconductor chip is provided on the first surface. At least one of the plurality of first resins is in contact with an upper surface of the second semiconductor chip.

公开(公告)号：US20240079370A1

公开(公告)日：2024-03-07

申请号：US18065084

申请日：2022-12-13

Applicant: Kioxia Corporation

Inventor： Kazuma HASEGAWA

IPC: H01L23/00 ,  H01L25/00 ,  H01L25/065

CPC classification number: H01L24/49 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/50 ,  H01L25/16 ,  H01L2224/32145

Abstract: A semiconductor device according to an embodiment includes a substrate, a first semiconductor chip, a second semiconductor chip, a first wire and a second wire. The substrate includes a first surface. The first semiconductor chip is provided on the first surface. The second semiconductor chip is provided at a position on the first surface that is apart from a position of the first semiconductor chip in a first direction. The first wire is electrically connected to the first semiconductor chip, and is provided to extend to the side of the second semiconductor chip. The second wire is electrically connected to the second semiconductor chip, and is provided to extend to the side of the first semiconductor chip. The first wire and the second wire cross as viewed in a third direction substantially perpendicular to both of the first direction and a second direction substantially perpendicular to the first surface.

公开(公告)号：US20240428875A1

公开(公告)日：2024-12-26

申请号：US18749161

申请日：2024-06-20

Applicant: Kioxia Corporation

Inventor： Tomoya SANUKI ,  Hitomi TANAKA ,  Hajime SANO ,  Tatsuro HITOMI ,  Yasuhito YOSHIMIZU ,  Kazuma HASEGAWA

IPC: G11C29/38 ,  G06F13/16

Abstract: A system includes a rack, a heat treatment device configured to perform a heat treatment, one or more conveyance devices, and a host. The host is configured to determine a target memory chip to be subjected to the heat treatment by the heat treatment device among memory chips in a plurality of drives mounted on the rack, and disable communication with a target drive on which the target memory chip is mounted. The host is configured to control the conveyance devices to dismount the target drive from the rack, detach a component including the target memory chip from the target drive, convey the detached component to the heat treatment device, reattach the component including the target memory chip that has undergone the heat treatment to a drive, and mount the drive with the component including the target memory chip that has undergone the heat treatment on the rack.

公开(公告)号：US20240304607A1

公开(公告)日：2024-09-12

申请号：US18596528

申请日：2024-03-05

Applicant: Kioxia Corporation

Inventor： Kazuma HASEGAWA

IPC: H01L25/10 ,  H01L23/00 ,  H01L23/31 ,  H10B80/00

CPC classification number: H01L25/105 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/85 ,  H01L24/96 ,  H10B80/00 ,  H01L2224/48145 ,  H01L2224/48225 ,  H01L2224/85801 ,  H01L2224/96 ,  H01L2225/1052 ,  H01L2924/1438

Abstract: A semiconductor device includes a substrate that includes a first surface, a first semiconductor chip that includes a second surface facing the first surface of the substrate and a third surface opposite to the second surface, each of the second and third surfaces having a rectangular shape that includes a plurality of sides and has surface areas that are different, and a second semiconductor chip disposed on the first surface of the substrate on one side of the first semiconductor chip. When viewed in a first direction substantially perpendicular to the substrate, one of the sides of the third surface that is closest to the second semiconductor chip overlaps an interior portion of the second semiconductor chip.

公开(公告)号：US20220285320A1

公开(公告)日：2022-09-08

申请号：US17459866

申请日：2021-08-27

Applicant: Kioxia Corporation

Inventor： Yuichi SANO ,  Masayuki MIURA ,  Kazuma HASEGAWA

IPC: H01L25/065 ,  H01L23/00 ,  H01L29/417

Abstract: A semiconductor device includes a first stacked body including a plurality of first semiconductor chips stacked along a first direction, each of the first semiconductor chips being offset from the other first semiconductor chips along a second direction perpendicular to the first direction; a first columnar electrode connected to an electrode pad of the first stacked body, and extending in the first direction; a second stacked body including a plurality of second semiconductor chips stacked along the first direction, each of the second semiconductor chips being offset from the other second semiconductor chips along the second direction, the second stacked body having a height larger than the first stacked body and overlap at least a portion of the first stacked body when viewed from the top; and a second columnar electrode connected to an electrode pad of the second stacked body, and extending in the first direction.

公开(公告)号：US20240421121A1

公开(公告)日：2024-12-19

申请号：US18734204

申请日：2024-06-05

Applicant: Kioxia Corporation

Inventor： Masayuki MIURA ,  Kazuma HASEGAWA ,  Hideko MUKAIDA ,  Kana KUDO

IPC: H01L25/065 ,  H10B80/00

Abstract: A semiconductor device according to an embodiment includes a substrate, a first stack, a second stack, a first bonding layer, a second bonding layer, a first wire, and a second wire. The first stack has a plurality of first semiconductor chips. The second stack has a plurality of second semiconductor chips. The first bonding layer is provided at a lower part of each of the plurality of first semiconductor chips. The second bonding layer is provided at a lower part of each of the plurality of second semiconductor chips. The first wire electrically connects the first semiconductor chips and the second semiconductor chips to one another. The second wire electrically connects the substrate and the second semiconductor chips. The first bonding layer provided at the lower part of the first semiconductor chip in a lowest stage has a thickness different from the thickness of the other first bonding layers.

公开(公告)号：US20230089223A1

公开(公告)日：2023-03-23

申请号：US17681487

申请日：2022-02-25

Applicant: Kioxia Corporation

Inventor： Soichi HOMMA ,  Kazuma HASEGAWA

IPC: H01L25/065 ,  H01L25/00

Abstract: A semiconductor device includes: an interconnect substrate including a plurality of interconnect layers; a first semiconductor chip disposed over the interconnect substrate; a second semiconductor chip disposed over the first semiconductor chip in a shifted manner and including a plurality of metal bumps on a surface of the second semiconductor chip facing the interconnect substrate; and a plurality of columnar electrodes connecting the interconnect structure to the metal bumps.

公开(公告)号：US20220285319A1

公开(公告)日：2022-09-08

申请号：US17459376

申请日：2021-08-27

Applicant: Kioxia Corporation

Inventor： Masayuki MIURA ,  Yuichi SANO ,  Kazuma HASEGAWA

IPC: H01L25/065 ,  H01L23/498 ,  H01L25/00

Abstract: A semiconductor device includes a first stacked body including first semiconductor chips stacked in a first direction and offset relative to each other in a second direction; a first columnar electrode coupled to the first semiconductor chip and extending in the first direction; a second stacked body arranged relative to the first stacked body in the second direction and including second semiconductor chips stacked in the first direction and offset relative to each other in the second direction; a second columnar electrode coupled to the second semiconductor chip and extending in the first direction; and a third semiconductor chip arranged substantially equally spaced to the first columnar electrode and the second columnar electrode.

公开(公告)号：US20230207520A1

公开(公告)日：2023-06-29

申请号：US17934135

申请日：2022-09-21

Applicant: Kioxia Corporation

Inventor： Masayuki MIURA ,  Kazuma HASEGAWA ,  Kazushige KAWASAKI

IPC: H01L25/065 ,  H01L23/00

CPC classification number: H01L25/0652 ,  H01L24/48 ,  H01L24/32 ,  H01L24/73 ,  H01L2924/1438 ,  H01L2924/1431 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L24/16 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48149 ,  H01L2224/48225 ,  H01L2924/182 ,  H01L21/563

Abstract: A semiconductor device includes a wiring substrate inside which a wiring layer is provided, a plurality of first semiconductor chips stacked in a shifted manner on the wiring substrate and each provided with a connection terminal on a surface facing the wiring substrate, and a second semiconductor chip having a function different from functions of the first semiconductor chips and provided on the wiring substrate on a side where the connection terminals are electrically connected to the wiring substrate.