公开(公告)号：US12094805B2

公开(公告)日：2024-09-17

申请号：US18079054

申请日：2022-12-12

Applicant: Kioxia Corporation

Inventor： Yasuhito Yoshimizu ,  Yoshiro Shimojo ,  Shinya Arai

IPC: H01L21/28 ,  H01L21/768 ,  H01L23/48 ,  H01L23/522 ,  H10B41/27 ,  H10B43/10 ,  H10B43/27

CPC classification number: H01L23/481 ,  H01L21/76805 ,  H01L21/76831 ,  H01L21/76834 ,  H01L23/5226 ,  H10B41/27 ,  H10B43/10 ,  H10B43/27

Abstract: According to one embodiment, a stacked body includes a plurality of electrode layers stacked with an insulator interposed. A conductive via pierces the stacked body, and connects an upper layer interconnect and a lower layer interconnect. A insulating film is provided between the via and the stacked body. A distance along a diametral direction of the via between a side surface of the via and an end surface of one of the electrode layers opposing the side surface of the via is greater than a distance along the diametral direction between the side surface of the via and an end surface of the insulator opposing the side surface of the via.

公开(公告)号：US11552000B2

公开(公告)日：2023-01-10

申请号：US17079736

申请日：2020-10-26

Applicant: Kioxia Corporation

Inventor： Yasuhito Yoshimizu ,  Yoshiro Shimojo ,  Shinya Arai

IPC: H01L23/48 ,  H01L21/768 ,  H01L27/11556 ,  H01L27/11582 ,  H01L27/11565 ,  H01L23/522

Abstract: According to one embodiment, a stacked body includes a plurality of electrode layers stacked with an insulator interposed. A conductive via pierces the stacked body, and connects an upper layer interconnect and a lower layer interconnect. A insulating film is provided between the via and the stacked body. A distance along a diametral direction of the via between a side surface of the via and an end surface of one of the electrode layers opposing the side surface of the via is greater than a distance along the diametral direction between the side surface of the via and an end surface of the insulator opposing the side surface of the via.

公开(公告)号：US12211913B2

公开(公告)日：2025-01-28

申请号：US17409751

申请日：2021-08-23

Applicant: KIOXIA CORPORATION

Inventor： Yoshiro Shimojo

IPC: G11C16/04 ,  H01L21/28 ,  H01L23/528 ,  H01L29/423 ,  H01L29/66 ,  H01L29/792 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35

Abstract: A semiconductor storage device includes a first stacked body including first insulating films and first conductive films that are alternately stacked in a first direction. A first columnar body and a second columnar body extend within the first stacked body in the first direction. A second conductive film is provided above the first stacked body, and extends in a third direction intersecting the first direction and the second direction. A third insulator is adjacent to the second conductive film and extends in the third direction. A third conductive film is adjacent to the third insulator and extends in the third direction. A third columnar body is provided on the first columnar body. A fourth columnar body is provided on the second columnar body. A thickness of a third semiconductor portion in the first direction is greater than a thickness of the second conductive film in the first direction.

公开(公告)号：US20230114433A1

公开(公告)日：2023-04-13

申请号：US18079054

申请日：2022-12-12

Applicant: Kioxia Corporation

Inventor： Yasuhito YOSHIMIZU ,  Yoshiro Shimojo ,  Shinya Arai

IPC: H01L23/48 ,  H01L21/768 ,  H01L23/522

Abstract: According to one embodiment, a stacked body includes a plurality of electrode layers stacked with an insulator interposed. A conductive via pierces the stacked body, and connects an upper layer interconnect and a lower layer interconnect. A insulating film is provided between the via and the stacked body.
A distance along a diametral direction of the via between a side surface of the via and an end surface of one of the electrode layers opposing the side surface of the via is greater than a distance along the diametral direction between the side surface of the via and an end surface of the insulator opposing the side surface of the via.

公开(公告)号：US12232325B2

公开(公告)日：2025-02-18

申请号：US17462854

申请日：2021-08-31

Applicant: Kioxia Corporation

Inventor： Keisuke Nakatsuka ,  Yoshitaka Kubota ,  Tetsuaki Utsumi ,  Yoshiro Shimojo ,  Ryota Katsumata

IPC: H10B43/10 ,  H10B41/10 ,  H10B41/20 ,  H10B41/35 ,  H10B41/41 ,  H10B43/20 ,  H10B43/35 ,  H10B43/40

Abstract: A semiconductor storage device includes a first conductive layer, a second conductive layer, a third conductive layer, a contact plug, a memory trench extending between the second conductive layer and the third conductive layer. The memory trench is formed around the contact plug, and surrounds a first area in which the contact plug is disposed. A second area is separated from the first area and includes a pillar penetrating the first conductive layer. The second conductive layer extends between the first and second areas, and is connected to the first conductive layer. The third conductive layer is on the opposite side of the first area to the second area, and is connected to the first conductive layer.

公开(公告)号：US12185539B2

公开(公告)日：2024-12-31

申请号：US17412933

申请日：2021-08-26

Applicant: Kioxia Corporation

Inventor： Kazuharu Yamabe ,  Yoshiro Shimojo

IPC: H10B43/27

Abstract: In a method for manufacturing a memory, a first stacked body is formed by stacking a first insulating film and a first sacrificial film. A first columnar body including a first semiconductor portion extending in the first stacked body in the first direction and a charge trapping film provided on an outer peripheral surface of the first semiconductor portion is formed. A second columnar body provided in a second direction of the first columnar body and including a second semiconductor portion stretching in the first stacked body in the first direction and a charge trapping film on an outer peripheral surface of the second semiconductor portion is formed. A second insulating film is formed above the first stacked body. A third columnar body including a third semiconductor portion provided on both the first columnar body and the second columnar body and stretching in the second insulating film in the first direction and a first gate insulating film provided on an outer peripheral surface of the third semiconductor portion is formed. A first division insulating film extending in the first direction and a third direction intersecting the first direction and the second direction and dividing the third semiconductor portion of the third columnar body in the second direction is formed.

公开(公告)号：US12089404B2

公开(公告)日：2024-09-10

申请号：US17165169

申请日：2021-02-02

Applicant: Kioxia Corporation

Inventor： Yoshiro Shimojo

IPC: H10B41/50 ,  H10B41/10 ,  H10B41/27 ,  H10B41/40 ,  H10B43/10 ,  H10B43/27 ,  H10B43/40 ,  H10B43/50

CPC classification number: H10B41/50 ,  H10B41/10 ,  H10B41/27 ,  H10B41/40 ,  H10B43/10 ,  H10B43/27 ,  H10B43/40 ,  H10B43/50

Abstract: According to one embodiment, a semiconductor memory device includes: a substrate; a first interconnect; a second interconnect; a plurality of third interconnects; a fourth interconnect; a semiconductor member; a charge storage member; and a conductive member. One of the plurality of third interconnects is disposed on two second-direction sides of the conductive member. Portions of the one of the plurality of third interconnects disposed on the two second-direction sides of the conductive member are formed as one body.