公开(公告)号：US11763890B2

公开(公告)日：2023-09-19

申请号：US17409584

申请日：2021-08-23

Applicant: KIOXIA CORPORATION

Inventor： Yuki Shimizu ,  Yoshihiko Kamata ,  Tsukasa Kobayashi ,  Hideyuki Kataoka ,  Koji Kato ,  Takumi Fujimoto ,  Yoshinao Suzuki ,  Yuui Shimizu

IPC: G11C16/30 ,  G11C16/04 ,  G11C16/08 ,  G11C16/24 ,  G11C7/24 ,  G11C16/10 ,  G11C7/10 ,  G11C16/28

CPC classification number: G11C16/0483 ,  G11C7/109 ,  G11C7/24 ,  G11C16/08 ,  G11C16/10 ,  G11C16/24 ,  G11C16/28 ,  G11C16/30

Abstract: A semiconductor memory device includes a substrate, first and second P-type well regions on the substrate, an N-type well region on the substrate and sandwiched between the first and second P-type well regions, a first peripheral circuit on a region of the first P-type well region adjacent to the N-type well region and supplied with a reference voltage via a first wiring, and a second peripheral circuit on a region of the second P-type well region adjacent to the N-type well region and supplied with a reference voltage via a second wiring.

公开(公告)号：US11133066B2

公开(公告)日：2021-09-28

申请号：US16934978

申请日：2020-07-21

Applicant: KIOXIA CORPORATION

Inventor： Yuki Shimizu ,  Yoshihiko Kamata ,  Tsukasa Kobayashi ,  Hideyuki Kataoka ,  Koji Kato ,  Takumi Fujimoto ,  Yoshinao Suzuki ,  Yuui Shimizu

IPC: G11C16/04 ,  G11C16/08 ,  G11C16/24 ,  G11C7/24 ,  G11C16/30 ,  G11C16/10 ,  G11C7/10 ,  G11C16/28

Abstract: A semiconductor memory device includes a substrate, first and second P-type well regions on the substrate, an N-type well region on the substrate and sandwiched between the first and second P-type well regions, a first peripheral circuit on a region of the first P-type well region adjacent to the N-type well region and supplied with a reference voltage via a first wiring, and a second peripheral circuit on a region of the second P-type well region adjacent to the N-type well region and supplied with a reference voltage via a second wiring.