Predictive Modeling Based Focus Error Prediction
    1.
    发明申请
    Predictive Modeling Based Focus Error Prediction 有权
    基于预测模型的焦点误差预测

    公开(公告)号:US20150302312A1

    公开(公告)日:2015-10-22

    申请号:US14457706

    申请日:2014-08-12

    Abstract: Predictive modeling based focus error prediction method and system are disclosed. The method includes obtaining wafer geometry measurements of a plurality of training wafers and grouping the plurality of training wafers to provide at least one training group based on relative homogeneity of wafer geometry measurements among the plurality of training wafers. For each particular training group of the at least one training group, a predictive model is develop utilizing non-linear predictive modeling. The predictive model establishes correlations between wafer geometry parameters and focus error measurements obtained for each wafer within that particular training group, and the predictive model can be utilized to provide focus error prediction for an incoming wafer belonging to that particular training group.

    Abstract translation: 公开了基于预测建模的聚焦误差预测方法和系统。 该方法包括获得多个训练晶片的晶片几何测量,并且基于多个训练晶片之间的晶片几何测量的相对均匀性,分组多个训练晶片以提供至少一个训练组。 对于至少一个训练组的每个特定训练组,利用非线性预测建模来开发预测模型。 该预测模型建立晶片几何参数和该特定训练组内的每个晶片获得的聚焦误差测量值之间的相关性,并且该预测模型可用于为属于该特定训练组的输入晶片提供聚焦误差预测。

    Automatic Defect Classification Without Sampling and Feature Selection
    2.
    发明申请
    Automatic Defect Classification Without Sampling and Feature Selection 审中-公开
    自动缺陷分类无抽样和特征选择

    公开(公告)号:US20160163035A1

    公开(公告)日:2016-06-09

    申请号:US14956326

    申请日:2015-12-01

    Abstract: Systems and methods for defection classification in a semiconductor process are provided. The system includes a communication line configured to receive a defect image of a wafer from the semiconductor process and a deep-architecture neural network in electronic communication with the communication line. The neural network has a first convolution layer of neurons configured to convolve pixels from the defect image with a filter to generate a first feature map. The neural network also includes a first subsampling layer configured to reduce the size and variation of the first feature map. A classifier is provided for determining a defect classification based on the feature map. The system may include more than one convolution layers and/or subsampling layers. A method includes extracting one or more features from a defect image using a deep-architecture neural network, for example a convolutional neural network.

    Abstract translation: 提供半导体工艺中的缺陷分类的系统和方法。 该系统包括被配置为从半导体处理接收晶片的缺陷图像的通信线路和与通信线路进行电子通信的深层架构神经网络。 神经网络具有第一卷积层的神经元,其被构造成用来过滤来自缺陷图像的像素来卷积第一特征图。 神经网络还包括被配置为减小第一特征图的大小和变化的第一子采样层。 提供了一种基于特征图来确定缺陷分类的分类器。 系统可以包括多于一个卷积层和/或子采样层。 一种方法包括使用深层架构神经网络(例如卷积神经网络)从缺陷图像中提取一个或多个特征。

    Determining critical parameters using a high-dimensional variable selection model

    公开(公告)号:US11456194B2

    公开(公告)日:2022-09-27

    申请号:US16449400

    申请日:2019-06-23

    Abstract: A high-dimensional variable selection unit determines a list of critical parameters from sensor data and parametric tool measurements from a semiconductor manufacturing tool, such as a semiconductor inspection tool or other types of semiconductor manufacturing tools. The high-dimensional variable selection model can be, for example, elastic net, forward-stagewise regression, or least angle regression. The list of critical parameters may be used to design a next generation semiconductor manufacturing tool, to bring the semiconductor manufacturing tool back to a normal status, to match a semiconductor manufacturing tool's results with that of another semiconductor manufacturing tool, or to develop a specification for the semiconductor manufacturing tool.

    Automatic defect classification without sampling and feature selection

    公开(公告)号:US10650508B2

    公开(公告)日:2020-05-12

    申请号:US14956326

    申请日:2015-12-01

    Abstract: Systems and methods for defection classification in a semiconductor process are provided. The system includes a communication line configured to receive a defect image of a wafer from the semiconductor process and a deep-architecture neural network in electronic communication with the communication line. The neural network has a first convolution layer of neurons configured to convolve pixels from the defect image with a filter to generate a first feature map. The neural network also includes a first subsampling layer configured to reduce the size and variation of the first feature map. A classifier is provided for determining a defect classification based on the feature map. The system may include more than one convolution layers and/or subsampling layers. A method includes extracting one or more features from a defect image using a deep-architecture neural network, for example a convolutional neural network.

    Determining critical parameters using a high-dimensional variable selection model

    公开(公告)号:US10361105B2

    公开(公告)日:2019-07-23

    申请号:US14955752

    申请日:2015-12-01

    Abstract: A high-dimensional variable selection unit determines a list of critical parameters from sensor data and parametric tool measurements from a semiconductor manufacturing tool, such as a semiconductor inspection tool or other types of semiconductor manufacturing tools. The high-dimensional variable selection model can be, for example, elastic net, forward-stagewise regression, or least angle regression. The list of critical parameters may be used to design a next generation semiconductor manufacturing tool, to bring the semiconductor manufacturing tool back to a normal status, to match a semiconductor manufacturing tool's results with that of another semiconductor manufacturing tool, or to develop a specification for the semiconductor manufacturing tool.

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