公开(公告)号：US20240172436A1

公开(公告)日：2024-05-23

申请号：US17990333

申请日：2022-11-18

Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY

Inventor： Joon Young KWAK ,  Minkyung KIM ,  Suyoun LEE ,  Inho KIM ,  Jong-Keuk PARK ,  Jaewook KIM ,  Jongkil PARK ,  YeonJoo JEONG

IPC: H10B43/27

CPC classification number: H10B43/27

Abstract: A flash memory device including multi-layered oxide for neuromorphic computing system is disclosed. According to embodiments, the flash memory device includes: a substrate; a channel layer disposed on the substrate; source/drain patterns disposed on both ends of the channel layer; a tunneling insulating layer disposed on the channel layer; a trapping layer disposed on the tunneling insulating layer and including a plurality of nitride layers; an intermediate barrier layer interposed within the trapping layer, and including an oxide layer, the oxide layer having a high dielectric constant; a blocking insulating layer disposed on the trapping layer; and an upper gate disposed on the blocking insulating layer.

公开(公告)号：US20230206047A1

公开(公告)日：2023-06-29

申请号：US17889483

申请日：2022-08-17

Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY

Inventor： Hyunjung YI ,  Suyoun LEE ,  Junseok LEE ,  Seon Jeong KIM

IPC: G06N3/063 ,  G16H50/20

CPC classification number: G06N3/063 ,  G16H50/20

Abstract: Disclosed are a circuit for providing an artificial tactile neuron, and an apparatus for predicting a disease based on the circuit for providing an artificial tactile neuron. The circuit for providing an artificial tactile neuron according to an embodiment includes a piezoresistive device that receives pressure applied from an external object and changes a magnitude of resistance based on the pressure; and a switching device that changes a magnitude of resistance based on a voltage applied from an input voltage, wherein the pressure and a mechanical property of the external object are quantified from an output voltage set based on the input voltage and the voltage applied to the switching device.

公开(公告)号：US20220138546A1

公开(公告)日：2022-05-05

申请号：US17205620

申请日：2021-03-18

Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY

Inventor： Joon Young KWAK ,  Suyoun LEE ,  Inho KIM ,  Jong-Keuk PARK ,  Kyeong Seok LEE ,  Jaewook KIM ,  Jongkil PARK ,  YeonJoo JEONG ,  Gyuweon HWANG

IPC: G06N3/063 ,  G06N3/04 ,  G11C11/54

Abstract: A neuromorphic circuit according to example embodiments of inventive concepts includes a first neuron array including a plurality of neuron circuits generating a spike signal; a first synapse array including a plurality of first synapse circuits to process and output the spike signal transmitted from the first neuron array; a second synapse array including a plurality of second synapse circuits; a first connecting block positioned between the first synapse array and the second synapse array and connecting the first synapse array and the second synapse array in response to a control signal; and a control logic to generate the control signal. The neuromorphic circuit may easily expand the size of the synapse element array to a desired size by using a connecting block.

公开(公告)号：US20170271537A1

公开(公告)日：2017-09-21

申请号：US15444806

申请日：2017-02-28

Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY

Inventor： Suyoun LEE ,  Byung-ki CHEONG ,  Seong Keun KIM ,  Do Kyung HWANG ,  Hyunsu JU ,  Young Tack LEE

IPC: H01L31/032 ,  H01L31/109 ,  H01L31/112 ,  H01L27/146

CPC classification number: H01L31/0324 ,  H01L27/14645 ,  H01L27/14647 ,  H01L31/032 ,  H01L31/109 ,  H01L31/1129

Abstract: Embodiments are directed to a chalcogenide material-based filterless color image sensor, which includes a substrate, a first chalcogenide material layer formed on a substrate for a first color, a second chalcogenide material layer formed on the first chalcogenide material layer for a second color, and a third chalcogenide material layer formed on the second chalcogenide material layer for a third color.

公开(公告)号：US20230170017A1

公开(公告)日：2023-06-01

申请号：US17966305

申请日：2022-10-14

Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY

Inventor： Jaewook KIM ,  Kyu Sik MUN ,  Yeonjoo JEONG ,  Joon Young KWAK ,  Jongkil PARK ,  Suyoun LEE ,  Jong-Keuk PARK ,  Inho KIM ,  Seongsik PARK

IPC: G11C13/00

CPC classification number: G11C13/0038 ,  G11C13/0061

Abstract: The present disclosure relates to a nonlinearity compensation circuit for a memristive device. The circuit according to an embodiment includes at least one power source unit to apply an input pulse; a modulation unit connected to the at least one power source unit to adjust a pulse width of an update pulse to be applied to the memristive device; and the memristive device to which the modulated update pulse is applied.

公开(公告)号：US20140299833A1

公开(公告)日：2014-10-09

申请号：US14242146

申请日：2014-04-01

Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY

Inventor： Byung-ki CHEONG ,  Sudong KIM ,  Suyoun LEE ,  Sang-Yeol SHIN ,  Hyung-Woo AHN

IPC: H01L45/00

CPC classification number: H01L45/143 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/141 ,  H01L45/1625

Abstract: Disclosed is a method for manufacturing a chalcogenide switching device includes forming a first electrode on a SOI substrate, forming a chalcogenide material composed of Gex and Se1-x formed on the first electrode, and forming a second electrode on the chalcogenide material, wherein the value x is greater than 0 and smaller than 1. A chalcogenide switching device manufactured by this method is also disclosed.

Abstract translation: 公开了一种硫族化物开关器件的制造方法，包括在SOI衬底上形成第一电极，形成在第一电极上形成的由Gex和Se1-x构成的硫族化物材料，并在硫族化物材料上形成第二电极， x大于0且小于1.还公开了通过该方法制造的硫族化物开关器件。

公开(公告)号：US20220399353A1

公开(公告)日：2022-12-15

申请号：US17538747

申请日：2021-11-30

Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY

Inventor： Joon Young KWAK ,  Eunpyo PARK ,  Suyoun LEE ,  Inho KIM ,  Jong-Keuk PARK ,  Jaewook KIM ,  Jongkil PARK ,  YeonJoo JEONG

IPC: H01L27/11521 ,  H01L29/788 ,  H01L29/423 ,  H01L29/43 ,  H01L29/66

Abstract: A flash memory device is provided. The flash memory device is disposed on a substrate, a channel layer made of a two-dimensional material, sources and drains disposed at both ends of the channel layer, a tunneling insulating layer having a first dielectric constant and a tunneling insulating layer disposed on the channel layer, a floating gate made of a two-dimensional material, a blocking insulating layer disposed on the floating gate and having a second dielectric constant greater than the first dielectric constant, and an upper gate disposed on the blocking insulating layer.

公开(公告)号：US20220156565A1

公开(公告)日：2022-05-19

申请号：US17205790

申请日：2021-03-18

Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY

Inventor： Joon Young KWAK ,  Suyoun LEE ,  Inho KIM ,  Jong-Keuk PARK ,  Kyeong Seok LEE ,  Jaewook KIM ,  Jongkil PARK ,  YeonJoo JEONG ,  Gyuweon HWANG

IPC: G06N3/063 ,  G11C16/04 ,  G11C16/10

Abstract: Embodiments of inventive concepts relate to a neuromorphic circuit including a flash memory-based spike regulator capable of generating a stable spike signal with a small number of devices. The neuromorphic circuit may generate a simple and stable spike signal using a flash memory-based spike regulator. Therefore, it is possible to implement a semiconductor neuromorphic circuit at low power and low cost by using the spike regulator of the present invention. Example embodiments of inventive concepts provide a neuromorphic circuit comprising a control signal generator for generating a control signal for generating a pulse signal; and a spike regulator for generating a spike signal in response to the control signal. Wherein the spike regulator comprises a first transistor for switching an input signal transmitted to one terminal to the other terminal in response to the control signal; and a first flash memory type transistor having a drain terminal connected to the other terminal of the first transistor and transferring the switched input signal to a source terminal as a spike signal.