公开(公告)号：US20220138546A1

公开(公告)日：2022-05-05

申请号：US17205620

申请日：2021-03-18

Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY

Inventor： Joon Young KWAK ,  Suyoun LEE ,  Inho KIM ,  Jong-Keuk PARK ,  Kyeong Seok LEE ,  Jaewook KIM ,  Jongkil PARK ,  YeonJoo JEONG ,  Gyuweon HWANG

IPC: G06N3/063 ,  G06N3/04 ,  G11C11/54

Abstract: A neuromorphic circuit according to example embodiments of inventive concepts includes a first neuron array including a plurality of neuron circuits generating a spike signal; a first synapse array including a plurality of first synapse circuits to process and output the spike signal transmitted from the first neuron array; a second synapse array including a plurality of second synapse circuits; a first connecting block positioned between the first synapse array and the second synapse array and connecting the first synapse array and the second synapse array in response to a control signal; and a control logic to generate the control signal. The neuromorphic circuit may easily expand the size of the synapse element array to a desired size by using a connecting block.

公开(公告)号：US20150146180A1

公开(公告)日：2015-05-28

申请号：US14253522

申请日：2014-04-15

Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY

Inventor： Kyeong Seok LEE ,  Won Mok KIM ,  Taek Sung LEE ,  Wook Seong LEE ,  Doo Seok JEONG ,  Inho KIM

IPC: G02B5/00 ,  G01N21/552 ,  G02B5/02 ,  G03F7/38

CPC classification number: G02B5/008 ,  B82Y15/00 ,  B82Y40/00 ,  G01N21/554 ,  G02B5/0278 ,  G03F7/2014 ,  G03F7/70375

Abstract: A method for fabricating a nanoantenna array may include forming a resist layer on a substrate, forming a focusing layer having a dielectric microstructure array on the resist layer, diffusing light one-dimensionally in a specific direction by using a linear diffuser, forming an anisotropic pattern on the resist layer by illuminating the light diffused by the linear diffuser on the focusing layer and the resist layer, depositing a material suitable for a plasmonic resonance onto the substrate and the resist layer on which the pattern is formed, and forming a nanoantenna array on the substrate by removing the resist layer and the material deposited on the resist layer. A light diffusing angle by the linear diffuser and a size of the dielectric microstructure are determined based on an aspect ratio of the pattern to be formed.

Abstract translation: 制造纳米天线阵列的方法可以包括在基板上形成抗蚀剂层，在抗蚀剂层上形成具有电介质微结构阵列的聚焦层，通过使用线性漫射器在特定方向上一维地漫射光，形成各向异性图案 在抗蚀剂层上通过在聚焦层和抗蚀剂层上照射由线性扩散器扩散的光，将适合于等离子体激元谐振的材料沉积到衬底上并形成图案的抗蚀剂层上，并形成纳米天线阵列 通过去除抗蚀剂层和沉积在抗蚀剂层上的材料来形成衬底。 基于要形成的图案的纵横比来确定通过线性漫射器的光散射角和电介质微结构的尺寸。

公开(公告)号：US20180038003A1

公开(公告)日：2018-02-08

申请号：US15608082

申请日：2017-05-30

Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY

Inventor： Wook Seong LEE ,  Young-Jin KO ,  Young Joon BAIK ,  Jong-Keuk PARK ,  Kyeong Seok LEE ,  Inho KIM ,  Doo Seok JEONG

IPC: C25B11/04 ,  C23C16/32 ,  C25B11/02

Abstract: A method for manufacturing an electrode for hydrogen production using a tungsten carbide nanoflake may include: forming a tungsten carbide nanoflake on a nanocrystalline diamond film by means of a chemical vapor deposition process in which hydrogen plasma is applied; and increasing activity of the tungsten carbide nanoflake to a hydrogen evolution reaction by removing an oxide layer or a graphene layer from a surface of the tungsten carbide nanoflake. Since an oxide layer and/or a graphene layer of a surface of tungsten carbide is removed by means of cyclic cleaning after tungsten carbide is formed, hydrogen evolution reaction (HER) activity of the tungsten carbide may be increased, thereby enhancing utilization as a catalyst electrode.

公开(公告)号：US20220399353A1

公开(公告)日：2022-12-15

申请号：US17538747

申请日：2021-11-30

Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY

Inventor： Joon Young KWAK ,  Eunpyo PARK ,  Suyoun LEE ,  Inho KIM ,  Jong-Keuk PARK ,  Jaewook KIM ,  Jongkil PARK ,  YeonJoo JEONG

IPC: H01L27/11521 ,  H01L29/788 ,  H01L29/423 ,  H01L29/43 ,  H01L29/66

Abstract: A flash memory device is provided. The flash memory device is disposed on a substrate, a channel layer made of a two-dimensional material, sources and drains disposed at both ends of the channel layer, a tunneling insulating layer having a first dielectric constant and a tunneling insulating layer disposed on the channel layer, a floating gate made of a two-dimensional material, a blocking insulating layer disposed on the floating gate and having a second dielectric constant greater than the first dielectric constant, and an upper gate disposed on the blocking insulating layer.

公开(公告)号：US20220156565A1

公开(公告)日：2022-05-19

申请号：US17205790

申请日：2021-03-18

Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY

Inventor： Joon Young KWAK ,  Suyoun LEE ,  Inho KIM ,  Jong-Keuk PARK ,  Kyeong Seok LEE ,  Jaewook KIM ,  Jongkil PARK ,  YeonJoo JEONG ,  Gyuweon HWANG

IPC: G06N3/063 ,  G11C16/04 ,  G11C16/10

Abstract: Embodiments of inventive concepts relate to a neuromorphic circuit including a flash memory-based spike regulator capable of generating a stable spike signal with a small number of devices. The neuromorphic circuit may generate a simple and stable spike signal using a flash memory-based spike regulator. Therefore, it is possible to implement a semiconductor neuromorphic circuit at low power and low cost by using the spike regulator of the present invention. Example embodiments of inventive concepts provide a neuromorphic circuit comprising a control signal generator for generating a control signal for generating a pulse signal; and a spike regulator for generating a spike signal in response to the control signal. Wherein the spike regulator comprises a first transistor for switching an input signal transmitted to one terminal to the other terminal in response to the control signal; and a first flash memory type transistor having a drain terminal connected to the other terminal of the first transistor and transferring the switched input signal to a source terminal as a spike signal.

公开(公告)号：US20210220631A1

公开(公告)日：2021-07-22

申请号：US17153969

申请日：2021-01-21

Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY ,  Industry-University Cooperation Foundation Hanyang University ERICA Campus

Inventor： Myoung-Ryul OK ,  So Yeon KIM ,  Yoon Ki JOUNG ,  Yu Chan KIM ,  Hyun Kwang SEOK ,  Hyung-Seop HAN ,  Hojeong JEON ,  Hyunseon SEO ,  Inho KIM ,  Kyoung Won PARK ,  Yongwoo CHUNG ,  Jaekyun KIM

IPC: A61M37/00 ,  A61N5/06

Abstract: Provided are phototherapeutic needle patches usable for phototherapy by using needle patches capable of injecting drugs or cosmetic substances to patients, and methods of manufacturing the same. A phototherapeutic needle patch may include a patch body attachable to skin of a patient, at least one microneedle protruding from the patch body, one end of the microneedle configured to deliver a drug through stratum corneum of the skin to inner tissues of the skin, and light grooves formed in a concave shape along a length direction of the microneedle in such a manner that therapeutic light radiated from a light source for phototherapy easily penetrates into the skin along the microneedle.

公开(公告)号：US20240172436A1

公开(公告)日：2024-05-23

申请号：US17990333

申请日：2022-11-18

Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY

Inventor： Joon Young KWAK ,  Minkyung KIM ,  Suyoun LEE ,  Inho KIM ,  Jong-Keuk PARK ,  Jaewook KIM ,  Jongkil PARK ,  YeonJoo JEONG

IPC: H10B43/27

CPC classification number: H10B43/27

Abstract: A flash memory device including multi-layered oxide for neuromorphic computing system is disclosed. According to embodiments, the flash memory device includes: a substrate; a channel layer disposed on the substrate; source/drain patterns disposed on both ends of the channel layer; a tunneling insulating layer disposed on the channel layer; a trapping layer disposed on the tunneling insulating layer and including a plurality of nitride layers; an intermediate barrier layer interposed within the trapping layer, and including an oxide layer, the oxide layer having a high dielectric constant; a blocking insulating layer disposed on the trapping layer; and an upper gate disposed on the blocking insulating layer.

公开(公告)号：US20230170017A1

公开(公告)日：2023-06-01

申请号：US17966305

申请日：2022-10-14

Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY

Inventor： Jaewook KIM ,  Kyu Sik MUN ,  Yeonjoo JEONG ,  Joon Young KWAK ,  Jongkil PARK ,  Suyoun LEE ,  Jong-Keuk PARK ,  Inho KIM ,  Seongsik PARK

IPC: G11C13/00

CPC classification number: G11C13/0038 ,  G11C13/0061

Abstract: The present disclosure relates to a nonlinearity compensation circuit for a memristive device. The circuit according to an embodiment includes at least one power source unit to apply an input pulse; a modulation unit connected to the at least one power source unit to adjust a pulse width of an update pulse to be applied to the memristive device; and the memristive device to which the modulated update pulse is applied.

公开(公告)号：US20150116856A1

公开(公告)日：2015-04-30

申请号：US14219506

申请日：2014-03-19

Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY

Inventor： Kyeong Seok LEE ,  Won Mok KIM ,  Taek Sung LEE ,  Wook Seong LEE ,  Doo Seok JEONG ,  Inho KIM

IPC: G02B5/20 ,  C23C16/06

CPC classification number: G02B5/206 ,  B82Y20/00 ,  C23C14/0015 ,  C23C14/0688 ,  C23C14/3464 ,  G02B5/008 ,  G02B5/26 ,  Y10S977/932

Abstract: A plasmonic nano-color coating layer includes a composite layer including a plurality of metal particle layers and a plurality of matrix layers and having a periodic multilayer structure in which the metal particle layers and the matrix layers are alternately arranged, a dielectric buffer layer located below the composite layer, and a mirror layer located below the dielectric buffer layer, wherein the color of the plasmonic nano-color coating layer is determined based on a nominal thickness of the metal particle layer and a separation between the metal particle layers.

Abstract translation: 等离子体激光纳米彩色涂层包括复合层，该复合层包括多个金属颗粒层和多个矩阵层，并且具有周期性多层结构，其中金属颗粒层和矩阵层交替布置，介质缓冲层位于下面 复合层和位于介质缓冲层下面的镜层，其中基于金属颗粒层的标称厚度和金属颗粒层之间的间隔来确定等离子体激元纳米彩色涂层的颜色。