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公开(公告)号：US10714897B2
公开(公告)日：2020-07-14
申请号：US16084898
申请日：2016-09-01
发明人： Shinji Saito , Tsutomu Kakuno , Osamu Yamane , Akira Tsumura
摘要： A distributed feedback semiconductor laser of includes a semiconductor stacked body and a first electrode. The semiconductor stacked body includes a first layer, an active layer that is provided on the first layer and is configured to emit laser light by an intersubband optical transition, and a second layer that is provided on the active layer. The semiconductor stacked body has a first surface including a flat portion and a trench portion; the flat portion includes a front surface of the second layer; the trench portion reaches the first layer from the front surface; the flat portion includes a first region and a second region; the first region extends along a first straight line; the second region extends to be orthogonal to the first straight line; and the trench portion and the second region outside the first region form a diffraction grating having a prescribed pitch along the first straight line. The first electrode is provided in the first region.
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公开(公告)号：US09159726B2
公开(公告)日：2015-10-13
申请号：US14202088
申请日：2014-03-10
发明人： Osamu Yamane , Yoshihiro Yanai , Hiromitsu Mashita
IPC分类号： H01L29/94 , H01L31/062 , H01L31/113 , H01L21/335 , H01L21/337 , H01L21/8238 , H01L27/10
CPC分类号： H01L27/10 , G11C16/0483 , H01L27/11565 , H01L27/11575 , H01L27/11582
摘要： According to one embodiment, a semiconductor memory device includes a semiconductor substrate and a memory array. The semiconductor substrate has a first face. The memory array region is provided on the first face and includes a plurality of semiconductor pillars. The semiconductor pillars extend in a first direction perpendicular to the first face. Each of the semiconductor pillars includes a plurality of memory cells connected in series. Each of the semiconductor pillars is disposed at the nodes of a honeycomb shape when viewed in the first direction. When the semiconductor pillars are projected onto a first plane along the first and second directions perpendicular to the first direction, a component in the second direction of an interval between the semiconductor pillars has first and second intervals repeated alternately. The second interval is an integer multiple of the first interval greater than or equal to 2.
摘要翻译： 根据一个实施例，半导体存储器件包括半导体衬底和存储器阵列。 半导体衬底具有第一面。 存储器阵列区域设置在第一面上并且包括多个半导体柱。 半导体柱沿垂直于第一面的第一方向延伸。 每个半导体柱包括串联连接的多个存储单元。 当从第一方向观察时，每个半导体柱布置在蜂窝形状的节点处。 当沿着垂直于第一方向的第一和第二方向将半导体柱投影到第一平面上时，半导体柱之间的间隔的第二方向上的分量具有交替重复的第一和第二间隔。 第二个间隔是大于或等于2的第一个间隔的整数倍。
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公开(公告)号：US10290995B2
公开(公告)日：2019-05-14
申请号：US15693601
申请日：2017-09-01
发明人： Tsutomu Kakuno , Shinji Saito , Osamu Yamane
IPC分类号： H01S5/06 , H01S5/02 , H01S5/024 , H01S5/042 , H01S5/12 , H01S5/22 , H01S5/34 , H01S5/0625 , H01S5/10 , H01S5/343 , H01S5/028
摘要： A terahertz quantum cascade laser device includes a substrate, q semiconductor stacked body and a first electrode. The semiconductor stacked body includes an active layer and a first clad layer. The active layer is provided on the substrate and is configured to emit infrared laser light by an intersubband optical transition. The first clad layer is provided on the active layer. A ridge waveguide is provided in the semiconductor stacked body. A first distributed feedback region and a second distributed feedback region are provided at an upper surface of the first clad layer to be separated from each other along an extension direction of the ridge waveguide. The first electrode is provided at the upper surface of the first clad layer. A planar size of the first distributed feedback region is smaller than a planar size of the second distributed feedback region.
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4.发明授权Method for manufacturing a semiconductor device including a stacked body comprising pluralities of first and second metallic conductive layers 有权一种半导体器件的制造方法，包括具有多个第一和第二金属导电层的层叠体公开(公告)号：US08912089B2
公开(公告)日：2014-12-16
申请号：US13848294
申请日：2013-03-21
发明人： Seiichi Omoto , Yoshihiro Uozumi , Tadashi Iguchi , Osamu Yamane , Kazuyuki Masukawa , Yoshihiro Yanai
IPC分类号： H01L21/4763 , H01L27/115 , H01L29/792 , H01L29/66 , H01L29/78 , H01L29/788
CPC分类号： H01L29/66666 , H01L27/11565 , H01L27/11575 , H01L27/11582 , H01L29/66825 , H01L29/66833 , H01L29/7827 , H01L29/7889 , H01L29/7926
摘要： According to one embodiment, a method for manufacturing a semiconductor device includes forming a stacked body on a substrate. The stacked body includes a plurality of first conductive layers including a metallic element as a main component and a plurality of second conductive layers including a metallic element as a main component provided respectively between the first conductive layers. The method includes making a hole to pierce the stacked body. The method includes making a slit to divide the stacked body. The method includes making a gap between the first conductive layers by removing the second conductive layers by etching via the slit or the hole. The method includes forming a memory film including a charge storage film at a side wall of the hole. The method includes forming a channel body on an inner side of the memory film inside the hole.
摘要翻译： 根据一个实施例，一种用于制造半导体器件的方法包括在衬底上形成层叠体。 所述层叠体包括多个第一导电层，所述第一导电层包含以金属元素为主要成分的多个第二导电层，以及分别设置在所述第一导电层之间的包含金属元素作为主要成分的多个第二导电层。 该方法包括形成一个孔以刺穿层叠体。 该方法包括制作狭缝以分开堆叠体。 该方法包括通过经由狭缝或孔的蚀刻去除第二导电层来在第一导电层之间形成间隙。 该方法包括在孔的侧壁形成包括电荷存储膜的记忆膜。 该方法包括在孔内的记忆膜的内侧形成通道体。
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公开(公告)号：US09893493B2
公开(公告)日：2018-02-13
申请号：US15246750
申请日：2016-08-25
发明人： Shinji Saito , Tsutomu Kakuno , Osamu Yamane , Akira Tsumura
CPC分类号： H01S5/3402 , H01S5/0425 , H01S5/105 , H01S5/18 , H01S5/183 , H01S5/2027 , H01S5/2228 , H01S2301/145
摘要： A surface emitting quantum cascade laser includes an active layer, a first semiconductor layer, and first electrode. The active layer has a plurality of quantum well layers stacked therein. The active layer is capable of emitting laser light by inter-subband transition. The first semiconductor layer is provided on the active layer and having a first surface provided with a plurality of pits so as to constitute a two-dimensional lattice. The first electrode is provided on the first semiconductor layer and having a periodic opening. Each pit is asymmetric with respect to a line parallel to a side of the lattice. The laser light is emitted in a direction generally perpendicular to the active layer from a pit exposed to the opening.
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公开(公告)号：US20150069568A1
公开(公告)日：2015-03-12
申请号：US14202088
申请日：2014-03-10
发明人： Osamu Yamane , Yoshihiro Yanai , Hiromitsu Mashita
CPC分类号： H01L27/10 , G11C16/0483 , H01L27/11565 , H01L27/11575 , H01L27/11582
摘要： According to one embodiment, a semiconductor memory device includes a semiconductor substrate and a memory array. The semiconductor substrate has a first face. The memory array region is provided on the first face and includes a plurality of semiconductor pillars. The semiconductor pillars extend in a first direction perpendicular to the first face. Each of the semiconductor pillars includes a plurality of memory cells connected in series. Each of the semiconductor pillars is disposed at the nodes of a honeycomb shape when viewed in the first direction. When the semiconductor pillars are projected onto a first plane along the first and second directions perpendicular to the first direction, a component in the second direction of an interval between the semiconductor pillars has first and second intervals repeated alternately. The second interval is an integer multiple of the first interval greater than or equal to 2.
摘要翻译： 根据一个实施例，半导体存储器件包括半导体衬底和存储器阵列。 半导体衬底具有第一面。 存储器阵列区域设置在第一面上并且包括多个半导体柱。 半导体柱沿垂直于第一面的第一方向延伸。 每个半导体柱包括串联连接的多个存储单元。 当从第一方向观察时，每个半导体柱布置在蜂窝形状的节点处。 当沿着垂直于第一方向的第一和第二方向将半导体柱投影到第一平面上时，半导体柱之间的间隔的第二方向上的分量具有交替重复的第一和第二间隔。 第二个间隔是大于或等于2的第一个间隔的整数倍。
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7.发明授权Exposure tolerance estimation method and method for manufacturing semiconductor device 有权曝光容差估计方法及半导体装置的制造方法公开(公告)号：US08956791B2
公开(公告)日：2015-02-17
申请号：US14027353
申请日：2013-09-16
发明人： Osamu Yamane , Kazuyuki Masukawa , Yasunobu Kai
IPC分类号： G03F7/20
CPC分类号： G03F7/20 , G03F7/70625 , G03F7/70641
摘要： According to one embodiment, an exposure tolerance estimation method is disclosed. The method can include setting a plurality of regions along a first surface of a substrate. The method can form a plurality of patterns for estimation by performing exposure on each of the regions using at least three levels of exposure condition using an exposure mask. The method can measure dimensions of the patterns for estimation and find relationships between the exposure condition and the dimensions. The method can select a first region from the regions. In the first region, a first dimension of a first pattern for estimation formed by exposure using a first exposure condition of an intermediate level out of the at least three levels falls within a previously set range. In addition, the method can calculate an exposure tolerance from a relationship between the first exposure condition and the first dimension.
摘要翻译： 根据一个实施例，公开了一种曝光容限估计方法。 该方法可以包括沿着衬底的第一表面设置多个区域。 该方法可以通过使用曝光掩模使用至少三个曝光条件的水平来对每个区域进行曝光来形成用于估计的多个图案。 该方法可以测量用于估计的图案的尺寸并且找到曝光条件和尺寸之间的关系。 该方法可以从区域中选择第一区域。 在第一区域中，通过使用在至少三个级别中的中间级别的第一曝光条件的曝光形成的用于估计的第一图案的第一尺寸落在预先设定的范围内。 此外，该方法可以根据第一曝光条件和第一尺寸之间的关系来计算曝光公差。
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公开(公告)号：US20140061752A1
公开(公告)日：2014-03-06
申请号：US13848294
申请日：2013-03-21
发明人： Seiichi Omoto , Yoshihiro Uozumi , Tadashi Iguchi , Osamu Yamane , Kazuyuki Masukawa , Yoshihiro Yanai
CPC分类号： H01L29/66666 , H01L27/11565 , H01L27/11575 , H01L27/11582 , H01L29/66825 , H01L29/66833 , H01L29/7827 , H01L29/7889 , H01L29/7926
摘要： According to one embodiment, a method for manufacturing a semiconductor device includes forming a stacked body on a substrate. The stacked body includes a plurality of first conductive layers including a metallic element as a main component and a plurality of second conductive layers including a metallic element as a main component provided respectively between the first conductive layers. The method includes making a hole to pierce the stacked body. The method includes making a slit to divide the stacked body. The method includes making a gap between the first conductive layers by removing the second conductive layers by etching via the slit or the hole. The method includes forming a memory film including a charge storage film at a side wall of the hole. The method includes forming a channel body on an inner side of the memory film inside the hole.
摘要翻译： 根据一个实施例，一种用于制造半导体器件的方法包括在衬底上形成层叠体。 所述层叠体包括多个第一导电层，所述第一导电层包含以金属元素为主要成分的多个第二导电层，以及分别设置在所述第一导电层之间的包含金属元素作为主要成分的多个第二导电层。 该方法包括形成一个孔以刺穿层叠体。 该方法包括制作狭缝以分开堆叠体。 该方法包括通过经由狭缝或孔的蚀刻去除第二导电层来在第一导电层之间形成间隙。 该方法包括在孔的侧壁形成包括电荷存储膜的记忆膜。 该方法包括在孔内的记忆膜的内侧形成通道体。
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