公开(公告)号：US20050246672A1

公开(公告)日：2005-11-03

申请号：US11089569

申请日：2004-04-29

申请人： Karl Bois ,  David Quint ,  Mark Frank ,  Jerimy Nelson

发明人： Karl Bois ,  David Quint ,  Mark Frank ,  Jerimy Nelson

IPC分类号： G06F9/45 ,  G06F17/50

CPC分类号： G06F17/5009

摘要： A method for verifying coupling in a differential trace pair group includes reading victim properties of a victim differential trace pair and culprit properties of a plurality of culprit differential trace pairs from a circuit design database. The method also includes calculating a plurality of coupling factors based on the victim properties and the culprit properties, one from each of the plurality of culprit differential trace pairs to the victim differential trace pair. The method also includes calculating a total coupling factor for the victim differential trace pair based on the plurality of coupling factors, and flagging the victim differential trace pair if the total coupling factor exceeds a total coupling threshold level.

摘要翻译： 用于验证差分跟踪对组中的耦合的方法包括从电路设计数据库读取受害者差分跟踪对的受害者属性和来自电路设计数据库的多个歹徒差分跟踪对的歹徒属性。 该方法还包括基于受害者属性和罪魁祸首性质计算多个耦合因子，其中一个来自多个凶手差分跟踪对中的每一个到受害者差分跟踪对。 该方法还包括基于多个耦合因子计算受害者差分跟踪对的总耦合因子，以及如果总耦合因子超过总耦合阈值水平则标记受害者差分跟踪对。

公开(公告)号：US20050246671A1

公开(公告)日：2005-11-03

申请号：US11089568

申请日：2004-04-29

申请人： Karl Bois ,  David Quint ,  Mark Frank ,  Jerimy Nelson

发明人： Karl Bois ,  David Quint ,  Mark Frank ,  Jerimy Nelson

IPC分类号： G06F17/50

CPC分类号： G06F17/5081

摘要： A method for calculating worst case coupling for a differential pair group includes identifying a victim differential pair and at least one culprit differential pair in the differential pair group, calculating a coupling factor between each of the culprit differential pairs and the victim differential pair, and summing the absolute value of each of the coupling factors to generate a worst case coupling factor.

摘要翻译： 一种用于计算差分对组的最差情况耦合的方法包括识别差分对组中的受害者差分对和至少一个歹徒差分对，计算每个歹徒差异对和受害者差分对之间的耦合因子，并求和 每个耦合因子的绝对值产生最坏情况耦合因子。

公开(公告)号：US20050246670A1

公开(公告)日：2005-11-03

申请号：US11089566

申请日：2004-04-29

申请人： Karl Bois ,  David Quint ,  Mark Frank ,  Jerimy Nelson

发明人： Karl Bois ,  David Quint ,  Mark Frank ,  Jerimy Nelson

IPC分类号： G06F17/50

CPC分类号： G06F17/5036

摘要： A method for verifying coupling in a differential via pair group includes identifying a differential via pair group in a design database and identifying a victim differential via pair in the differential via pair group. All other differential via pairs in the differential via pair group are identified as culprit differential pairs. The differential via pair group includes at least one culprit differential via pair. The method also includes obtaining a total coupling threshold level and calculating a total coupling factor for the victim differential via pair within the differential via pair group. The method also includes flagging the victim differential via pair if the calculated total coupling factor exceeds the total coupling threshold level.

摘要翻译： 用于验证差分通路对组合中的耦合的方法包括在设计数据库中识别差分通路对组，并且通过差分通路对组中的对识别受害者差分。 差分通孔对组中的所有其他差分通孔对被识别为凶手差分对。 差分通路对组包括至少一个故障差分通路对。 该方法还包括获得总耦合阈值电平并且计算差分通路对组内的受损差分通路对的总耦合系数。 如果计算的总耦合系数超过总耦合阈值电平，该方法还包括通过对标记受害者差分。

公开(公告)号：US20050249479A1

公开(公告)日：2005-11-10

申请号：US10838855

申请日：2004-05-04

申请人： Mark Frank ,  Jerimy Nelson ,  Karl Bois

发明人： Mark Frank ,  Jerimy Nelson ,  Karl Bois

IPC分类号： G02B6/26 ,  G06F17/50 ,  H05K1/02 ,  H05K1/11 ,  H05K3/00

CPC分类号： G06F17/5036 ,  H05K1/0216 ,  H05K1/115 ,  H05K3/0005

摘要： Various embodiments of a system, apparatus and method for determining the signal coupling coefficient of a via in the design of a substrate are disclosed. One apparatus embodiment comprises a via signal coupling coefficient tool.

摘要翻译： 公开了用于确定衬底设计中的通孔的信号耦合系数的系统，装置和方法的各种实施例。 一个装置实施例包括通孔信号耦合系数工具。

公开(公告)号：US20050251769A1

公开(公告)日：2005-11-10

申请号：US10838851

申请日：2004-05-04

申请人： Mark Frank ,  Jerimy Nelson ,  Karl Bois

发明人： Mark Frank ,  Jerimy Nelson ,  Karl Bois

IPC分类号： G06F17/50

CPC分类号： G06F17/5036

摘要： Various embodiments of a system, apparatus and method for determining the signal coupling coefficient of a path in the design of a substrate are disclosed. One apparatus embodiment comprises a path signal coupling coefficient tool.

摘要翻译： 公开了用于确定衬底设计中的路径的信号耦合系数的系统，装置和方法的各种实施例。 一个装置实施例包括路径信号耦合系数工具。

公开(公告)号：US20050197807A1

公开(公告)日：2005-09-08

申请号：US10793533

申请日：2004-03-04

申请人： Jerimy Nelson ,  Mark Frank ,  Karl Bois

发明人： Jerimy Nelson ,  Mark Frank ,  Karl Bois

IPC分类号： G05B19/42 ,  G06F17/50 ,  G06F19/00

CPC分类号： G06F17/50

摘要： According to at least one embodiment, a system comprises logic for maintaining homogeneity between a model of an object designed in a computer-aided modeling system and corresponding parameter information for the model included in a model documentation file.

摘要翻译： 根据至少一个实施例，系统包括用于维持在计算机辅助建模系统中设计的对象的模型与模型文档文件中包含的模型的相应参数信息之间的均匀性的逻辑。

公开(公告)号：US20050125747A1

公开(公告)日：2005-06-09

申请号：US10727974

申请日：2003-12-04

申请人： Jerimy Nelson ,  Mark Frank ,  Karl Bois

发明人： Jerimy Nelson ,  Mark Frank ,  Karl Bois

IPC分类号： G06F19/00

CPC分类号： G06F17/5045

摘要： According to at least one embodiment, a method comprises generating a data file having design parameters for an electrical design, and with a computer-executable program, accessing the data file and populating a computer-aided design (CAD) program's database with the design parameters.

摘要翻译： 根据至少一个实施例，一种方法包括生成具有用于电气设计的设计参数的数据文件，以及使用计算机可执行程序访问数据文件并使用设计参数填充计算机辅助设计（CAD）程序的数据库 。

公开(公告)号：US20060055022A1

公开(公告)日：2006-03-16

申请号：US10939654

申请日：2004-09-13

申请人： Jerimy Nelson ,  Mark Frank ,  Peter Moldauer ,  Karl Bois

发明人： Jerimy Nelson ,  Mark Frank ,  Peter Moldauer ,  Karl Bois

IPC分类号： H01L23/52

CPC分类号： H01L23/50 ,  H01L23/49827 ,  H01L23/49838 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K1/0219 ,  H05K1/0222 ,  H05K1/0263 ,  H05K1/0298 ,  H05K1/112 ,  H05K1/115 ,  H05K2201/09627 ,  H01L2924/00

摘要： A method for routing vias in a multilayer substrate is disclosed. One embodiment of a method may comprise providing a multilayer substrate with an internal bond surface having a plurality of internal bond pads and an external bond surface with a plurality of external bond pads. A plurality of power vias and ground vias may be routed from a first redistribution layer between the internal bond surface and the external bond surface to a second redistribution layer between the first redistribution layer and the external bond surface based on a via pattern. The via pattern may comprise routing a power via and a ground via adjacent one another spaced apart at a distance that is substantially equal to a minimum routing pitch associated with the multilayer substrate.

摘要翻译： 公开了一种在多层衬底中布线过孔的方法。 方法的一个实施例可以包括提供具有内部结合表面的多层基底，所述内部结合表面具有多个内部接合垫和具有多个外部键合垫的外部结合表面。 基于通孔图案，多个电源通孔和接地通孔可以从内部接合表面和外部接合表面之间的第一再分配层路由到第一再分配层和外部接合表面之间的第二再分配层。 通孔图案可以包括以基本上等于与多层基板相关联的最小路由间距的间隔相互隔开相邻的方式布置电力通孔和接地。

公开(公告)号：US20060225916A1

公开(公告)日：2006-10-12

申请号：US11446669

申请日：2006-06-05

申请人： Jerimy Nelson ,  Mark Frank ,  Peter Moldauer ,  Gary Taylor ,  David Quint

发明人： Jerimy Nelson ,  Mark Frank ,  Peter Moldauer ,  Gary Taylor ,  David Quint

IPC分类号： H05K1/11 ,  H05K7/06

CPC分类号： H01L23/5384 ,  H01L23/49838 ,  H01L23/50 ,  H01L2924/0002 ,  H05K1/0219 ,  H05K1/0222 ,  H05K1/0231 ,  H05K1/113 ,  H05K1/115 ,  H05K2201/09309 ,  H05K2201/09627 ,  H05K2201/0979 ,  H01L2924/00

摘要： A method for routing vias in a multilayer substrate from bypass capacitor pads is disclosed. One embodiment of a method may comprise arranging a bypass capacitor power pad spaced apart from a bypass capacitor ground pad on a first surface of the multilayer substrate, routing a plurality of power vias from the bypass capacitor power pad to a first redistribution layer spaced from the first surface, and routing a plurality of ground vias from the bypass capacitor ground pad to the first redistribution layer. The methodology may further comprise jogging the plurality of ground vias at the first redistribution layer to the plurality of power vias to provide a power and ground via pattern, and routing the power and ground vias from the first redistribution layer to a second redistribution layer spaced apart from the first redistribution layer based on the power and ground via pattern.

公开(公告)号：US20060055049A1

公开(公告)日：2006-03-16

申请号：US10940100

申请日：2004-09-14

申请人： Jerimy Nelson ,  Mark Frank ,  Peter Moldauer ,  Gary Taylor ,  David Quint

发明人： Jerimy Nelson ,  Mark Frank ,  Peter Moldauer ,  Gary Taylor ,  David Quint

IPC分类号： H01L23/48

CPC分类号： H01L23/5384 ,  H01L23/49838 ,  H01L23/50 ,  H01L2924/0002 ,  H05K1/0219 ,  H05K1/0222 ,  H05K1/0231 ,  H05K1/113 ,  H05K1/115 ,  H05K2201/09309 ,  H05K2201/09627 ,  H05K2201/0979 ,  H01L2924/00

摘要： A method for routing vias in a multilayer substrate from bypass capacitor pads is disclosed. One embodiment of a method may comprise arranging a bypass capacitor power pad spaced apart from a bypass capacitor ground pad on a first surface of the multilayer substrate, routing a plurality of power vias from the bypass capacitor power pad to a first redistribution layer spaced from the first surface, and routing a plurality of ground vias from the bypass capacitor ground pad to the first redistribution layer. The methodology may further comprise jogging the plurality of ground vias at the first redistribution layer to the plurality of power vias to provide a power and ground via pattern, and routing the power and ground vias from the first redistribution layer to a second redistribution layer spaced apart from the first redistribution layer based on the power and ground via pattern.