公开(公告)号：US20240298406A1

公开(公告)日：2024-09-05

申请号：US18591021

申请日：2024-02-29

申请人： IBIDEN CO., LTD.

发明人： Jun SAKAI ,  Kyohei YOSHIKAWA ,  Shunya HATANAKA

IPC分类号： H05K1/11 ,  H05K1/02 ,  H05K1/03

CPC分类号： H05K1/112 ,  H05K1/0221 ,  H05K1/0222 ,  H05K1/0306 ,  H05K2201/0209 ,  H05K2201/09518 ,  H05K2201/10977

摘要： A printed wiring board includes a first conductor layer, a resin insulating layer formed on the first conductor layer, a second conductor layer formed on the resin insulating layer and including a seed layer and a metal layer on the seed layer, a via conductor formed in the resin insulating layer such that the via conductor is connecting the first conductor layer and the second conductor layer, and a base layer formed on the resin insulating layer and including resin and one of iron and chromium in a range of 0.2 at % to 5.0 at % with respect to the resin such that the base layer includes part formed between the resin insulating layer and the seed layer.

公开(公告)号：US12058808B2

公开(公告)日：2024-08-06

申请号：US17689318

申请日：2022-03-08

申请人： Huawei Technologies Co., Ltd.

发明人： Wenliang Li ,  Zewen Wang ,  Xusheng Liu ,  Ertang Xie ,  Zhong Yan ,  Wang Xiong

IPC分类号： H05K1/02 ,  H05K1/11

CPC分类号： H05K1/0222 ,  H05K1/115 ,  H05K2201/0338

摘要： A printed circuit board includes a connector insertion area including many rows of crimping holes, each row of crimping holes includes at least two pairs of signal crimping holes (SCHs), and each pair of SCHs includes two SCHs. In a row arrangement direction of the crimping holes, at least one ground crimping hole (GCH) is arranged on either side of each pair of SCHs. A depth of the GCH is greater than or equal to a depth of the SCH, the GCH includes a main hole and a shielding component on at least one side of the main hole, a part of a side wall of the main hole is a part of a side wall of the shielding component, and a sum of lengths of the main hole and the shielding component in a first direction is greater than a length of the SCHs in the first direction.

公开(公告)号：US12057381B2

公开(公告)日：2024-08-06

申请号：US17498757

申请日：2021-10-12

申请人： Unimicron Technology Corp.

发明人： Chih-Chiang Lu ,  Hsin-Ning Liu ,  Jun-Rui Huang ,  Pei-Wei Wang ,  Ching Sheng Chen ,  Shih-Lian Cheng

IPC分类号： H01L23/498 ,  H01L21/48 ,  H05K1/02 ,  H05K3/00 ,  H05K3/42 ,  H05K3/46 ,  H01L23/00

CPC分类号： H01L23/49827 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/49822 ,  H05K1/0222 ,  H05K3/0094 ,  H05K3/429 ,  H05K3/4614 ,  H05K3/4623 ,  H01L24/16 ,  H01L2224/16227 ,  H05K2201/09509 ,  H05K2201/0959

摘要： A circuit board includes a first external circuit layer, a first substrate, a second substrate, a third substrate, and a conductive through hole structure. The first substrate includes conductive pillars electrically connecting the first external circuit layer and the second substrate. The second substrate has an opening and includes a first dielectric layer. The opening penetrates the second substrate, and the first dielectric layer fills the opening. The third substrate includes an insulating layer, a second external circuit layer, and conductive holes. A conductive material layer of the conductive through hole structure covers an inner wall of a through hole and electrically connects the first and the second external circuit layers to define a signal path. The first external circuit layer, the conductive pillars, the second substrate, the conductive holes and the second external circuit layer are electrically connected to define a ground path surrounding the signal path.

公开(公告)号：US11937373B2

公开(公告)日：2024-03-19

申请号：US17689611

申请日：2022-03-08

申请人： Hewlett Packard Enterprise Development LP

发明人： Melvin K. Benedict ,  Paul Danna ,  Chi Kim Sides ,  Wayne Vuong ,  Michael Chan

IPC分类号： H05K1/02 ,  H05K1/11

CPC分类号： H05K1/115 ,  H05K1/0222 ,  H05K1/0245 ,  H05K1/0251 ,  H05K1/0298 ,  H05K1/116 ,  H05K2201/09263 ,  H05K2201/09609

摘要： One aspect of the instant application provides techniques to reduce the amount of crosstalk on single-ended signals in the pin field region of an integrated circuit device on a printed circuit board (PCB). The PCB can include a plurality of layers and an array of vias comprising a plurality of rows configured to route signals across layers. An inner layer of the PCB can include first and second signal traces positioned between first and second adjacent rows of the vias, the first signal trace positioned adjacent to the first row and the second signal trace positioned adjacent to the second row. The first signal trace can include at least one curved segment that curves around a substantial portion of a corresponding via in the first row such that separation between the first and second signal traces varies along the curved segment.

公开(公告)号：US11895773B2

公开(公告)日：2024-02-06

申请号：US17853933

申请日：2022-06-30

申请人： Unimicron Technology Corp.

发明人： Shih-Lian Cheng

IPC分类号： H05K1/11 ,  H05K1/02 ,  H05K3/46

CPC分类号： H05K1/116 ,  H05K1/0222 ,  H05K2201/0195 ,  H05K2201/09509

摘要： A circuit board structure includes a substrate, a third dielectric layer, a fourth dielectric layer, a first external circuit layer, a second external circuit layer, a conductive through hole, a first annular retaining wall, and a second annular retaining wall. The conductive through hole penetrates through the third dielectric layer, a second dielectric layer, and the fourth dielectric layer. The conductive through hole is electrically connected to the first external circuit layer and the second external circuit layer. The first annular retaining wall is disposed in the third dielectric layer, surrounds the conductive through hole, and is electrically connected to the first external circuit layer and the first inner circuit layer. The second annular retaining wall is disposed in the fourth dielectric layer, surrounds the conductive through hole, and connects to the second external circuit layer and the second inner circuit layer electrically.

公开(公告)号：US11737206B2

公开(公告)日：2023-08-22

申请号：US17873153

申请日：2022-07-26

申请人： Unimicron Technology Corp.

发明人： Shih-Lian Cheng

IPC分类号： H05K1/02

CPC分类号： H05K1/0222 ,  H05K1/024 ,  H05K2201/096 ,  H05K2201/0959 ,  H05K2201/09509 ,  H05K2201/09536

摘要： A circuit board structure includes a first dielectric layer, first and second inner circuit layers, a conductive connection layer, a second dielectric layer, two third dielectric layers, third and fourth inner circuit layers, two conductive through vias, first and second annular retaining walls, two fourth dielectric layers, first and second external circuit layers, and third and fourth annular retaining walls. The conductive through vias penetrate the third and second dielectric layers and electrically connect the third and fourth inner circuit layers. The first and second annular retaining walls surround the conductive through vias and electrically connect the third and first and the fourth and second inner circuit layers. The third and fourth annular retaining walls are respectively disposed in the fourth dielectric layers and electrically connect the first external circuit layer and the third inner circuit layer and the second external circuit layer and the fourth inner circuit layer.

公开(公告)号：US20180276176A1

公开(公告)日：2018-09-27

申请号：US15641186

申请日：2017-07-03

申请人： Intel Corporation

发明人： Timothy Wig ,  Umair I. Khan

IPC分类号： G06F13/42 ,  G06F13/40

CPC分类号： G06F13/4282 ,  G06F13/4068 ,  G06F2213/0026 ,  H01R13/6471 ,  H01R13/6474 ,  H05K1/0222 ,  H05K1/115 ,  H05K3/366 ,  H05K2201/09227 ,  H05K2201/09709 ,  H05K2201/10303

摘要： Embodiments are directed to systems and device that include a printed circuit board (PCB) and a through-hole pin-field. The pin-field includes a plurality of ground through-holes arranged along a centerline; a plurality of ground pins, each of the plurality of ground pins coupled to a corresponding ground through-hole; a first signal though-hole arranged on a first side of the centerline; a second signal through-hole arrange on a second side of the centerline, the first side oppose the second side; a first signal pin electrically connected to the PCB through the first signal through-hole, the first signal pin comprising a bend in a first direction and disposed proximate the first through-hole; and a second signal pin electrically connected to the PCB through the second signal through-hole, the second signal pin comprising a bend in a second direction opposite the first direction and disposed proximate the second through-hole.

公开(公告)号：US10054979B1

公开(公告)日：2018-08-21

申请号：US15627018

申请日：2017-06-19

申请人： DELL PRODUCTS, L.P.

发明人： Chun-Lin Liao ,  Ching Huei Chen ,  Bhyrav M. Mutnury ,  Siang Chen

IPC分类号： H05K7/00 ,  H05K5/00 ,  G06F1/16 ,  H05K1/11 ,  H05K1/02 ,  H05K3/40

CPC分类号： G06F1/16 ,  H05K1/0222 ,  H05K1/0245 ,  H05K1/115 ,  H05K3/4038

摘要： A circuit board assembly of an information handling system has an adjacent pair of vias that carry differential communication signal through printed circuit board (PCB) substrates. Pairs of ground vias each having a first ground via and a second ground via placed symmetrically on both sides of a virtual ground plane that passes between the adjacent pair of vias. Ground vias are placed at a substantially identical radius from a respective one of the adjacent pair of vias that is on the same side of the virtual ground plane. First ground via(s) are annularly spaced substantially equally from each other and from a pair of reference points on the virtual ground plane that are each radially spaced from both of the adjacent pair of vias by the substantially identical radius. The second ground via(s) are annularly spaced from each other and the pair of reference points.

公开(公告)号：US20180124917A1

公开(公告)日：2018-05-03

申请号：US15858289

申请日：2017-12-29

申请人： Lockheed Martin Corporation

发明人： Jack V. Ajoian

IPC分类号： H05K1/11 ,  H05K3/42

CPC分类号： H05K1/115 ,  H01L2924/01078 ,  H01L2924/01079 ,  H05K1/0222 ,  H05K1/111 ,  H05K1/112 ,  H05K1/116 ,  H05K3/3452 ,  H05K3/429 ,  H05K3/4602 ,  H05K2201/0355 ,  H05K2201/096 ,  H05K2201/09809 ,  H05K2201/09854

摘要： A system and method of isolating a layer-to-layer transition between conductors in a multilayer printed circuit board includes formation of a first ground via at least partially surrounding a first signal conductor in at least one layer of the printed circuit board and formation of a second ground via at least partially surrounding a second signal conductor in another layer of the printed circuit board. The first and second ground vias are plated with a conductive material.

公开(公告)号：US20170318664A1

公开(公告)日：2017-11-02

申请号：US15142213

申请日：2016-04-29

申请人： STMicroelectronics (Grenoble 2) SAS

发明人： Laurent Marechal ,  Richard Rembert ,  Jerome Lopez

IPC分类号： H05K1/02 ,  H05K1/11 ,  H05K3/42 ,  H05K3/10

CPC分类号： H05K1/0251 ,  H05K1/0222

摘要： An electronic device disclosed herein includes a first conductor layer, a first nonconducting layer, and a second conductor layer in a stacked arrangement. A signal carrying conductive via is formed in the first nonconducting layer and extends between the first conductor layer and the second conductor layer. A shielding conductive via is formed in the first nonconducting layer, is not electrically coupled to the signal carrying conductive via, and substantially completely surrounds the signal carrying conductive via in spaced apart relation thereto.