公开(公告)号：US20070025492A1

公开(公告)日：2007-02-01

申请号：US11171114

申请日：2005-06-30

申请人： Karthisha Canagasaby ,  Ken Drottar ,  David Dunning ,  Sanjay Dabral

发明人： Karthisha Canagasaby ,  Ken Drottar ,  David Dunning ,  Sanjay Dabral

IPC分类号： H04L23/00

CPC分类号： H04L25/0282

摘要： A source terminated serial link can recover from a low power mode by turning on multiple current-mode drivers in a phased sequence where the phased sequence is related to a resonant characteristic of a power supply net.

摘要翻译： 源端接串行链路可以通过在分相序列中打开多个电流模式驱动器从低功率模式恢复，其中相序序列与电源网络的谐振特性相关。

公开(公告)号：US6147366A

公开(公告)日：2000-11-14

申请号：US248350

申请日：1999-02-08

申请人： Ken Drottar ,  David Dunning

发明人： Ken Drottar ,  David Dunning

IPC分类号： H01L27/146 ,  H01L27/15 ,  H01L29/26 ,  H01L31/12 ,  H04B10/00

CPC分类号： H04B10/801 ,  H01L27/14643

摘要： CMOS optical receiver and optical transmitters are described. The optical receiver is formed from a CMOS CCD which is modified to immediately output all information indicative of incoming light, i.e., with no transfer gate. The optical transmitter is formed of a modulation window device. Both the optical transmitter and optical receiver are located on-chip with a microprocessor and form the I/O for the microprocessor. Since the modified I/O is serial, a serial to parallel converter, and parallel to serial converter are provided.

摘要翻译： 描述了CMOS光接收机和光发射机。 光接收器由CMOS CCD形成，其被修改为立即输出指示入射光的所有信息，即没有传输门。 光发射机由调制窗口装置构成。 光发射机和光接收机均采用微处理器位于芯片上，形成微处理器的I / O。 由于修改的I / O是串行的，因此提供串并转换器和串并转换器。

公开(公告)号：US07056760B2

公开(公告)日：2006-06-06

申请号：US10984598

申请日：2004-11-08

申请人： Ken Drottar ,  David Dunning

发明人： Ken Drottar ,  David Dunning

IPC分类号： H01L21/00

CPC分类号： H04B10/801 ,  H01L27/14643

摘要： CMOS optical receiver and optical transmitters are described. The optical receiver is formed from a CMOS CCD which is modified to immediately output all information indicative of incoming light, i.e., with no transfer gate. The optical transmitter is formed of a modulation window device. Both the optical transmitter and optical receiver are located on-chip with a microprocessor and form the I/O for the microprocessor. Since the modified I/O is serial, a serial to parallel converter, and parallel to serial converter are provided.

公开(公告)号：US20050095004A1

公开(公告)日：2005-05-05

申请号：US10984598

申请日：2004-11-08

申请人： Ken Drottar ,  David Dunning

发明人： Ken Drottar ,  David Dunning

IPC分类号： H01L27/146 ,  H01L27/15 ,  H01L29/26 ,  H01L31/12 ,  H04B10/00

CPC分类号： H04B10/801 ,  H01L27/14643

摘要： CMOS optical receiver and optical transmitters are described. The optical receiver is formed from a CMOS CCD which is modified to immediately output all information indicative of incoming light, i.e., with no transfer gate. The optical transmitter is formed of a modulation window device. Both the optical transmitter and optical receiver are located on-chip with a microprocessor and form the I/O for the microprocessor. Since the modified I/O is serial, a serial to parallel converter, and parallel to serial converter are provided.

摘要翻译： 描述了CMOS光接收机和光发射机。 光接收器由CMOS CCD形成，其被修改为立即输出指示入射光的所有信息，即没有传输门。 光发射机由调制窗口装置构成。 光发射机和光接收机均采用微处理器位于芯片上，形成微处理器的I / O。 由于修改的I / O是串行的，因此提供串并转换器和串并转换器。

公开(公告)号：US06861673B1

公开(公告)日：2005-03-01

申请号：US09569324

申请日：2000-05-11

申请人： David Dunning ,  Ken Drottar

发明人： David Dunning ,  Ken Drottar

IPC分类号： H01L27/146 ,  H01L27/15 ,  H01L29/26 ,  H01L31/12 ,  H04B10/00

CPC分类号： H04B10/801 ,  H01L27/14643

摘要： CMOS optical receiver and optical transmitters are described. The optical receiver is formed from a CMOS CCD which is modified to immediately output all information indicative of incoming light, i.e., with no transfer gate. The optical transmitter is formed of a modulation window device. Both the optical transmitter and optical receiver are located on-chip with a microprocessor and form the I/O for the microprocessor. Since the modified I/O is serial, a serial to parallel converter, and parallel to serial converter are provided.

摘要翻译： 描述了CMOS光接收机和光发射机。 光接收器由CMOS CCD形成，其被修改为立即输出指示入射光的所有信息，即没有传输门。 光发射机由调制窗口装置构成。 光发射机和光接收机均采用微处理器位于芯片上，形成微处理器的I / O。 由于修改的I / O是串行的，因此提供串并转换器和串并转换器。

公开(公告)号：US20140359311A1

公开(公告)日：2014-12-04

申请号：US13906652

申请日：2013-05-31

申请人： Sanjeev S. Jahagirdar ,  Satish K. Damaraju ,  Yun-Han Chen ,  Ryan D. Wells ,  Inder M. Sodhi ,  Vishram Sarurkar ,  Ken Drottar ,  Ashish V. Choubal ,  Rabiul Islam

发明人： Sanjeev S. Jahagirdar ,  Satish K. Damaraju ,  Yun-Han Chen ,  Ryan D. Wells ,  Inder M. Sodhi ,  Vishram Sarurkar ,  Ken Drottar ,  Ashish V. Choubal ,  Rabiul Islam

IPC分类号： G06F1/26

CPC分类号： G06F1/26 ,  G06F1/3243 ,  G06F1/3296 ,  G06F9/5094 ,  Y02D10/152 ,  Y02D10/172 ,  Y02D10/22

摘要： In one embodiment, a processor includes a plurality of domains each to operate at an independently controllable voltage and frequency, a plurality of linear regulators each to receive a first voltage from an off-chip source and controllable to provide a regulated voltage to at least one of the plurality of domains, and a plurality of selectors each coupled to one of the domains, where each selector is configured to provide a regulated voltage from one of the linear regulators or a bypass voltage to a corresponding domain. Other embodiments are described and claimed.

摘要翻译： 在一个实施例中，处理器包括多个域，每个域以独立可控的电压和频率工作，多个线性稳压器各自接收来自芯片外源的第一电压并可控制以将调节电压提供给至少一个 以及多个选择器，每个选择器都耦合到所述域中的一个，其中每个选择器被配置为从所述线性调节器之一提供调节电压或将旁路电压提供给相应的域。 描述和要求保护其他实施例。

公开(公告)号：US07474714B2

公开(公告)日：2009-01-06

申请号：US10334935

申请日：2002-12-31

申请人： Chamath Abhayagunawardhana ,  Dave Dunning ,  Sanjay Dabral ,  Ken Drottar

发明人： Chamath Abhayagunawardhana ,  Dave Dunning ,  Sanjay Dabral ,  Ken Drottar

IPC分类号： H04L27/00

CPC分类号： H04L7/033

摘要： A receiving device within a digital electronic system includes a sampling unit, a voter block, and a local clock phase adjustment unit. The sampling unit samples an input line at three points in time at intervals of one half of a bit period. The sampling unit delivers the values obtained in the sampling process to the voter block. The voter block determines whether to deliver an up or a down vote to the local clock phase adjustment unit. The voter block communicates with the local clock phase adjustment unit via up and down control signals. The local clock phase adjustment unit determines whether the local clock phase should be adjusted, and if so, whether to advance or delay the local clock phase. If certain meta-stable conditions are observed by the voter block, the voter block will vote in one direction in order to push the system out of the meta-stable condition.

摘要翻译： 数字电子系统内的接收装置包括采样单元，选举块和本地时钟相位调整单元。 采样单元在三个时间点以一个位周期的一半的间隔对输入行进行采样。 采样单元将采样过程中获得的值传递给选举块。 选民块决定是否向本地时钟相位调整单位输出向上或向下的投票。 选举块通过上下控制信号与本地时钟相位调整单元进行通信。 本地时钟相位调整单元确定是否应调整本地时钟相位，如果是，是否提前或延迟本地时钟相位。 如果选民块观察到某些元稳定条件，则选民块将以一个方向投票，以将该制度推出元稳定状态。

公开(公告)号：US20080122463A1

公开(公告)日：2008-05-29

申请号：US11479888

申请日：2006-06-30

申请人： Sanjay Dabral ,  Mohiuddin Mazumder ,  Ken Drottar ,  Larry Tate ,  John Critchlow

发明人： Sanjay Dabral ,  Mohiuddin Mazumder ,  Ken Drottar ,  Larry Tate ,  John Critchlow

IPC分类号： G01R31/308

CPC分类号： G01R1/071 ,  G01R31/311 ,  G01R31/31728 ,  G01R31/3177

摘要： Testing microelectronic devices using electro-optic modulator probes is disclosed. In one aspect, a testing apparatus may include an electrical signaling medium to exchange electrical signals with a microelectronic device. The testing apparatus may include an electro-optic modulator probe to provide optical signals that are modulated by the electrical signals. An optoelectronic transducer may be included to convert the modulated optical signals to modulated electrical signals. The testing apparatus may further include a logic analyzer module to receive and analyze the modulated electrical signals. Other testing apparatus are disclosed, as well as systems incorporating such apparatus, and various methods of testing microelectronic devices.

摘要翻译： 公开了使用电光调制器探针测试微电子器件。 在一个方面，测试装置可以包括用于与微电子装置交换电信号的电信令介质。 测试装置可以包括电光调制器探针，以提供由电信号调制的光信号。 可以包括光电转换器以将经调制的光信号转换成调制的电信号。 测试装置还可以包括用于接收和分析调制的电信号的逻辑分析器模块。 公开了其它测试装置，以及结合这种装置的系统以及测试微电子装置的各种方法。

公开(公告)号：US06333929B1

公开(公告)日：2001-12-25

申请号：US09139022

申请日：1998-08-24

申请人： Ken Drottar ,  David S. Dunning

发明人： Ken Drottar ,  David S. Dunning

IPC分类号： H04J302

CPC分类号： H04L1/0057 ,  H04L1/0059 ,  H04L1/0072 ,  H04L1/16 ,  H04L1/1635 ,  H04L1/1806 ,  H04L1/1835 ,  H04L1/1877 ,  H04L1/188 ,  H04L1/1883 ,  H04L29/06 ,  H04L43/0811 ,  H04L67/10 ,  H04L67/2804 ,  H04L67/2819 ,  H04L69/14 ,  H04L69/22 ,  H04L69/26 ,  H04L69/32 ,  H04L69/324 ,  H04L2001/0092 ,  H04L2001/0096

摘要： A method is provided for transmitting a packet including information describing a bus transaction to be executed at a remote device. A bus transaction is detected on a first bus and a network packet is generated for transmission over a network. The network packet includes an opcode describing the type of bus transaction. One or more control signals of the bus transaction map directly to one or more bits of the opcode to simplify decoding or converting of the bus transaction to the opcode. The packet is transmitted to a remote device and the bus transaction is then replayed at a second bus. In addition, the packet includes a data field having a size that is a multiple of a cache line size. The packet includes separate CRCs for the data and header. The packet also includes a transaction ID to support split transactions over the network. Also, fields in the packet header are provided in a particular order to improve switching efficiency.

摘要翻译： 提供了一种用于发送包括描述要在远程设备处执行的总线事务的信息的分组的方法。 在第一总线上检测到总线事务，并且生成网络分组用于通过网络传输。 网络分组包括描述总线事务类型的操作码。 总线事务的一个或多个控制信号直接映射到操作码的一个或多个位，以简化总线事务的解码或转换到操作码。 该分组被发送到远程设备，然后总线事务在第二总线上重放。 此外，分组包括具有高速缓存行大小的倍数的数据字段。 该数据包包括用于数据和报头的单独的CRC。 该分组还包括用于支持通过网络进行拆分事务的事务ID。 此外，分组报头中的字段以特定顺序提供以提高切换效率。

公开(公告)号：US06181704B2

公开(公告)日：2001-01-30

申请号：US09141136

申请日：1998-08-27

申请人： Ken Drottar ,  David S. Dunning ,  Donald F. Cameron

发明人： Ken Drottar ,  David S. Dunning ,  Donald F. Cameron

IPC分类号： H04Q1104

CPC分类号： H04L1/0057 ,  H04L1/16 ,  H04L1/1621 ,  H04L1/1635 ,  H04L1/1806 ,  H04L1/1835 ,  H04L1/1877 ,  H04L1/188 ,  H04L1/1883 ,  H04L29/06 ,  H04L41/0663 ,  H04L47/10 ,  H04L47/17 ,  H04L47/26 ,  H04L47/34 ,  H04L67/28 ,  H04L67/2876 ,  H04L69/14 ,  H04L69/22 ,  H04L69/26 ,  H04L69/32 ,  H04L69/324 ,  H04L2001/0092 ,  H04L2001/0096

摘要： A method for transmitting data in a network from a source node to a destination node includes the steps of transmitting data packets from the source node to an intermediary point, and assigning each of the packets a corresponding sequence number. A copy of each packet is stored in a buffer at the source node until receiving an acknowledgment that each packet was successfully received by the intermediary point. Upon successfully reaching the intermediate point, the intermediate point assigns an intermediate point sequence number to each packet. A copy of each packet is retained in a buffer at the intermediate point until receiving an acknowledgment that the packet was successfully received at the next delivery point. Once a particular packet is successfully received at an intermediary point, the particular packet is de-allocated at the source node, as are any other packets in the buffer between the particular packet and the last acknowledged packet. Upon receipt of an error indication, each packet is retransmitted along with all subsequent packets. At the receiving end, all received packets following the packet associated with the error indication are dropped until successfully receiving a retransmitted version of the packet. In addition, a single negative acknowledgment is used to indicate that a packet associated with the negative acknowledgment includes at least one error and to simultaneously indicate that all previous packets received prior to the packet associated with the negative acknowledgment were received correctly. Finally, a link sequence number is assigned to each of packet before transmitting it from a origination point in a link. Subsequently, each new link origination point assigns a sequence number that is independent from the sequence number assigned by the source node or the previous origination point.

摘要翻译： 一种用于在网络中从源节点向目的地节点发送数据的方法包括以下步骤：将数据分组从源节点发送到中间点，并且分配每个分组相应的序列号。 每个分组的副本被存储在源节点的缓冲器中，直到接收到每个分组被中间点成功接收的确认。 中间点成功到达中间点后，将中间点序列号分配给每个数据包。 每个分组的副本保留在中间点的缓冲器中，直到接收到在下一个传送点成功接收到分组的确认。 一旦在中间点成功地接收到特定分组，则特定分组在源节点处被去分配，以及特定分组和最后确认分组之间的缓冲器中的任何其他分组。 在接收到错误指示时，每个数据包与所有后续数据包一起被重新发送。 在接收端，删除与错误指示相关联的分组之后的所有接收到的分组，直到成功接收到分组的重传版本为止。 此外，单个否定确认用于指示与否定确认相关联的分组包括至少一个错误并且同时指示在与否定确认相关联的分组之前接收的所有先前分组被正确接收。 最后，在从链路中的发起点发送之前，将链路序列号分配给每个分组。 随后，每个新的链路起始点分配与源节点或先前发起点分配的序列号无关的序列号。