-
公开(公告)号:US20050121704A1
公开(公告)日:2005-06-09
申请号:US10983658
申请日:2004-11-09
IPC分类号: H01L21/764 , H01L21/265 , H01L21/336 , H01L21/76 , H01L29/06 , H01L29/76 , H01L29/78
CPC分类号: H01L29/7802 , H01L29/0634 , H01L29/0653 , H01L29/66712
摘要: Provided is a semiconductor device including a semiconductor substrate which includes a first semiconductor layer of a first conductivity and a pair of second semiconductor layers disposed on the first semiconductor layer and spaced apart from each other to form a trench therebetween, wherein the second semiconductor layer includes a first impurity-diffused region of the first conductivity extending from a lower surface toward an upper surface of the second semiconductor layer, and a second impurity-diffused region of a second conductivity which extends from the lower surface toward the upper surface and is adjacent to the first impurity-diffused region, an insulating layer covering a sidewall of the trench, and a cap layer which is in contact with the semiconductor substrate and covers an opening of the trench to form an enclosed space in the trench, a material of the cap layer being almost the same as that of the semiconductor substrate.
摘要翻译: 提供了一种半导体器件,其包括半导体衬底,该半导体衬底包括第一导电性的第一半导体层和设置在第一半导体层上并且彼此间隔开以在其间形成沟槽的一对第二半导体层,其中第二半导体层包括 从第一半导体层的下表面向上表面延伸的第一导电性的第一杂质扩散区和从下表面向上表面延伸的第二导电性的第二杂质扩散区, 第一杂质扩散区域,覆盖沟槽的侧壁的绝缘层,以及与半导体衬底接触并覆盖沟槽的开口以在沟槽中形成封闭空间的覆盖层,帽的材料 层几乎与半导体衬底的层相同。
-
公开(公告)号:US07391077B2
公开(公告)日:2008-06-24
申请号:US10983658
申请日:2004-11-09
IPC分类号: H01L21/764
CPC分类号: H01L29/7802 , H01L29/0634 , H01L29/0653 , H01L29/66712
摘要: Provided is a semiconductor device including a semiconductor substrate which includes a first semiconductor layer of a first conductivity and a pair of second semiconductor layers disposed on the first semiconductor layer and spaced apart from each other to form a trench therebetween, wherein the second semiconductor layer includes a first impurity-diffused region of the first conductivity extending from a lower surface toward an upper surface of the second semiconductor layer, and a second impurity-diffused region of a second conductivity which extends from the lower surface toward the upper surface and is adjacent to the first impurity-diffused region, an insulating layer covering a sidewall of the trench, and a cap layer which is in contact with the semiconductor substrate and covers an opening of the trench to form an enclosed space in the trench, a material of the cap layer being almost the same as that of the semiconductor substrate.
摘要翻译: 提供了一种半导体器件,其包括半导体衬底,该半导体衬底包括第一导电性的第一半导体层和设置在第一半导体层上并且彼此间隔开以在其间形成沟槽的一对第二半导体层,其中第二半导体层包括 从第一半导体层的下表面向上表面延伸的第一导电性的第一杂质扩散区和从下表面向上表面延伸的第二导电性的第二杂质扩散区, 第一杂质扩散区域,覆盖沟槽的侧壁的绝缘层,以及与半导体衬底接触并覆盖沟槽的开口以在沟槽中形成封闭空间的覆盖层,帽的材料 层几乎与半导体衬底的层相同。
-
公开(公告)号:US20050006699A1
公开(公告)日:2005-01-13
申请号:US10844323
申请日:2004-05-13
申请人: Shingo Sato , Atsuko Yamashita , Hideki Okumura , Kenichi Tokano
发明人: Shingo Sato , Atsuko Yamashita , Hideki Okumura , Kenichi Tokano
IPC分类号: H01L21/336 , H01L29/06 , H01L29/10 , H01L29/78 , H01L29/76
CPC分类号: H01L29/7802 , H01L29/0634 , H01L29/0696 , H01L29/1095 , H01L29/66712
摘要: A semiconductor device comprises: a semiconductor layer of a first conductivity type; a first semiconductor pillar layer of the first conductivity type; a second semiconductor pillar layer of a second conductivity type; a third semiconductor pillar layer of the first conductivity type; a forth semiconductor pillar layer of the second conductivity type; a fifth semiconductor pillar layer of the first conductivity type provided on the major surface of the semiconductor layer; a first semiconductor base layer of the second conductivity type provided on the second semiconductor pillar layer; a second semiconductor base layer of the second conductivity type provided on the forth semiconductor pillar layer; first semiconductor region of the first conductivity type selectively provided on a surface of the first semiconductor base layer; second semiconductor region of the first conductivity type selectively provided on a surface of the second semiconductor base layer; gate insulating film provided on the first semiconductor base layer between the first semiconductor region and the first semiconductor pillar layer and between the first semiconductor region and the third semiconductor pillar layer, and provided on the second semiconductor base layer between the second semiconductor region and the third semiconductor pillar layer and between the second semiconductor region and the fifth semiconductor pillar layer; and gate electrode provided on the gate insulating film. Each width of the first through fifth semiconductor pillar layers seen in a perpendicular direction to interfaces of p-n junctions formed among the first through fifth semiconductor pillar layers respectively is 10 microns or less.
摘要翻译: 半导体器件包括:第一导电类型的半导体层; 第一导电类型的第一半导体柱层; 第二导电类型的第二半导体柱层; 第一导电类型的第三半导体柱层; 第二导电类型的第四半导体柱层; 设置在半导体层的主表面上的第一导电类型的第五半导体柱层; 设置在第二半导体柱层上的第二导电类型的第一半导体基底层; 设置在第四半导体柱层上的第二导电类型的第二半导体基底层; 选择性地设置在第一半导体基底层的表面上的第一导电类型的第一半导体区域; 选择性地设置在第二半导体基底层的表面上的第一导电类型的第二半导体区域; 栅极绝缘膜,设置在第一半导体基底层之间的第一半导体区域和第一半导体柱层之间以及第一半导体区域和第三半导体柱层之间,并且设置在第二半导体基底层上的第二半导体区域和第三半导体区域之间 半导体柱层和第二半导体区域和第五半导体柱层之间; 以及设置在栅极绝缘膜上的栅电极。 在与第一至第五半导体柱层之间形成的p-n结的界面的垂直方向上分别看到的第一至第五半导体柱层的宽度分别为10微米以下。
-
公开(公告)号:US07075149B2
公开(公告)日:2006-07-11
申请号:US10844323
申请日:2004-05-13
申请人: Shingo Sato , Atsuko Yamashita , Hideki Okumura , Kenichi Tokano
发明人: Shingo Sato , Atsuko Yamashita , Hideki Okumura , Kenichi Tokano
IPC分类号: H01L29/76
CPC分类号: H01L29/7802 , H01L29/0634 , H01L29/0696 , H01L29/1095 , H01L29/66712
摘要: A semiconductor device comprises: a semiconductor layer of a first conductivity type; a first semiconductor pillar layer of the first conductivity type; a second semiconductor pillar layer of a second conductivity type; a third semiconductor pillar layer of the first conductivity type; a forth semiconductor pillar layer of the second conductivity type; a fifth semiconductor pillar layer of the first conductivity type provided on the major surface of the semiconductor layer; a first semiconductor base layer of the second conductivity type provided on the second semiconductor pillar layer; a second semiconductor base layer of the second conductivity type provided on the forth semiconductor pillar layer; first semiconductor region of the first conductivity type selectively provided on a surface of the first semiconductor base layer; second semiconductor region of the first conductivity type selectively provided on a surface of the second semiconductor base layer; gate insulating film provided on the first semiconductor base layer between the first semiconductor region and the first semiconductor pillar layer and between the first semiconductor region and the third semiconductor pillar layer, and provided on the second semiconductor base layer between the second semiconductor region and the third semiconductor pillar layer and between the second semiconductor region and the fifth semiconductor pillar layer; and gate electrode provided on the gate insulating film. Each width of the first through fifth semiconductor pillar layers seen in a perpendicular direction to interfaces of p-n junctions formed among the first through fifth semiconductor pillar layers respectively is 10 microns or less.
摘要翻译: 半导体器件包括:第一导电类型的半导体层; 第一导电类型的第一半导体柱层; 第二导电类型的第二半导体柱层; 第一导电类型的第三半导体柱层; 第二导电类型的第四半导体柱层; 设置在半导体层的主表面上的第一导电类型的第五半导体柱层; 设置在第二半导体柱层上的第二导电类型的第一半导体基底层; 设置在第四半导体柱层上的第二导电类型的第二半导体基底层; 选择性地设置在第一半导体基底层的表面上的第一导电类型的第一半导体区域; 选择性地设置在第二半导体基底层的表面上的第一导电类型的第二半导体区域; 栅极绝缘膜,设置在第一半导体基底层之间的第一半导体区域和第一半导体柱层之间以及第一半导体区域和第三半导体柱层之间,并且设置在第二半导体基底层上的第二半导体区域和第三半导体区域之间 半导体柱层和第二半导体区域和第五半导体柱层之间; 以及设置在栅极绝缘膜上的栅电极。 在与第一至第五半导体柱层之间形成的p-n结的界面的垂直方向上分别看到的第一至第五半导体柱层的宽度分别为10微米以下。
-
公开(公告)号:US08809942B2
公开(公告)日:2014-08-19
申请号:US13419400
申请日:2012-03-13
申请人: Shizue Matsuda , Shingo Sato , Wataru Saito
发明人: Shizue Matsuda , Shingo Sato , Wataru Saito
IPC分类号: H01L29/772
CPC分类号: H01L29/7811 , H01L29/0653 , H01L29/0661 , H01L29/66734 , H01L29/7813
摘要: According to an embodiment, a trench structure and a second semiconductor layer are provided in a semiconductor device. In the trench structure, a trench is provided in a surface of a device termination portion with a first semiconductor layer of a first conductive type including a device portion and the device termination portion, and an insulator is buried in the trench in such a manner to cover the trench. The second semiconductor layer, which is of a second conductive type, is provided on the surface of the first semiconductor layer, is in contact with at least a side on the device portion of the trench, and has a smaller depth than the trench. The insulator and a top passivation film for the semiconductor device are made of the same material.
摘要翻译: 根据实施例,在半导体器件中设置沟槽结构和第二半导体层。 在沟槽结构中,在器件端子部分的表面中设置沟槽,其中第一半导体层具有包括器件部分和器件端接部分的第一导电类型,并且绝缘体以这样的方式被掩埋在沟槽中: 覆盖沟槽。 具有第二导电类型的第二半导体层设置在第一半导体层的表面上,与沟槽的器件部分的至少一侧接触,并且具有比沟槽更小的深度。 用于半导体器件的绝缘体和顶部钝化膜由相同的材料制成。
-
公开(公告)号:US20140014056A1
公开(公告)日:2014-01-16
申请号:US14009399
申请日:2012-04-03
申请人: Shingo Sato
发明人: Shingo Sato
IPC分类号: F02M35/108
CPC分类号: F02M35/108 , F02M26/19 , F02M26/41 , F02M26/44 , F02M35/10072 , F02M35/10111 , F02M35/10222 , F02M35/112 , Y02T10/121
摘要: An intake manifold is equipped with a sub-stream passage connected to branch passages through respective connection ports to introduce intake-air substream other than intake-air mainstream to the plural branch passages. Two of the branch passages which communicate with each other through the sub-stream passage and successively introduce intake air to the internal combustion engine are defined as a first combination. Of the first combinations, a second combination is defined to have a shortest communication length via the sub-stream passage. Of the second combination, the connection port of one of the branch passages where the intake air is introduced later is narrower than that of the other of the branch passages where the intake air is introduced earlier.
摘要翻译: 进气歧管配备有通过各个连接口连接到分支通道的子流通道,以将进气 - 空气主流以外的进气气流引入多个分支通道。 通过副流路相互连通并连续地向内燃机中引入进气的两个分支通道被定义为第一组合。 在第一组合中,第二组合被定义为具有经由子流通道的最短通信长度。 在第二组合中,稍后引入吸入空气的分支通道中的一个的连接端口比较早引入进气的其他分支通道的连接口窄。
-
公开(公告)号:US20090117396A1
公开(公告)日:2009-05-07
申请号:US12226564
申请日:2007-04-24
CPC分类号: C09D175/06 , B05D7/572 , B05D7/577 , B05D2202/10 , C08G18/2865 , C08G18/288 , C08G18/706 , C08G18/797 , C08G18/798 , C08G18/80 , C08K3/011 , C09D167/00 , C09D167/02 , Y10T428/31681
摘要: This invention offers a method for forming multilayer coating film by successively applying onto a coating object a water-based first coloring paint, water-based second coloring paint and clear paint, and simultaneously baking the resultant first coloring coating film, second coloring coating film and clear coating film, in which the water-based first coloring paint (A) comprises polyester resin and curing agent, the polyester resin containing benzene ring and cyclohexane ring in its molecules, their combined content in the polyester resin being within a range of 1.0-2.2 mols/kg (solid resin content); and that the curing agent is at least one compound selected from the group consisting of isocyanate group-containing compound, oxazoline group-containing compound, carbodiimide group-containing compound, hydrazide group-containing compound and semicarbazide group-containing compound. According to this method, multilayer coating film excelling in smoothness, distinctness of image, chipping resistance and water resistance can be formed by 3-coat-1-bake system.
摘要翻译: 本发明提供一种通过依次向涂布对象施加水性第一着色涂料,水性第二着色涂料和透明涂料来形成多层涂膜的方法,并同时烘烤得到的第一着色涂膜,第二着色涂膜和 其中水性第一着色涂料(A)包含聚酯树脂和固化剂,分子中含有苯环和环己烷环的聚酯树脂,其在聚酯树脂中的组合含量在1.0〜 2.2摩尔/ kg(固体树脂含量); 并且所述固化剂是选自含异氰酸酯基的化合物,含恶唑啉基的化合物,含碳二亚胺基的化合物,含酰肼基的化合物和含有氨基脲基的化合物中的至少一种化合物。 根据该方法,可以通过3-涂层1烘烤系统形成平滑度,图像清晰度,耐崩裂性和耐水性优异的多层涂膜。
-
公开(公告)号:US20060292805A1
公开(公告)日:2006-12-28
申请号:US11447114
申请日:2006-06-06
申请人: Keiko Kawamura , Shingo Sato
发明人: Keiko Kawamura , Shingo Sato
IPC分类号: H01L21/336 , H01L29/76
CPC分类号: H01L29/7802 , H01L29/165 , H01L29/4238 , H01L29/66348 , H01L29/66734 , H01L29/7395 , H01L29/7397 , H01L29/7813
摘要: A semiconductor device is provided, which includes a first main electrode region having an upper main surface and a lower main surface; a drift layer of a first conductivity type formed on the upper main surface of the first main electrode region; a base layer of a second conductivity type formed on the drift layer; a second main electrode region of the first conductivity type formed on the base layer; a trench formed through the second main electrode region to the drift layer; a gate insulation film formed on an inner wall of the trench; and a gate electrode buried in the trench with the gate insulation film interposed therebetween, wherein the drift layer includes a graded region close to the first main electrode region, the graded region having band gap decreasing from the base layer toward the first main electrode region.
摘要翻译: 提供一种半导体器件,其包括具有上主表面和下主表面的第一主电极区域; 形成在第一主电极区域的上主表面上的第一导电类型的漂移层; 形成在漂移层上的第二导电类型的基底层; 形成在基底层上的第一导电类型的第二主电极区域; 通过所述第二主电极区域形成到所述漂移层的沟槽; 形成在沟槽的内壁上的栅极绝缘膜; 以及埋设在所述沟槽中的栅电极,其间插入有所述栅极绝缘膜,其中所述漂移层包括靠近所述第一主电极区域的渐变区域,所述渐变区域具有从所述基极层朝向所述第一主电极区域的带隙。
-
公开(公告)号:US06438248B1
公开(公告)日:2002-08-20
申请号:US09630232
申请日:2000-08-01
申请人: Tomohiko Kamimura , Satoru Fujiwara , Koji Nasu , Shingo Sato
发明人: Tomohiko Kamimura , Satoru Fujiwara , Koji Nasu , Shingo Sato
IPC分类号: H04R2500
CPC分类号: H04M1/15 , H04M1/05 , H04M1/6041
摘要: A hand-free apparatus having improved portability is disclosed. The apparatus includes an apparatus body including a transmitter and a receiver, an input/output cable connected with the transmitter and the receiver and extending outside from the apparatus body, a cable case incorporating a cable spool capable of taking up the cable and a retaining member capable of detachably retaining the apparatus body on the cable case. The apparatus body when retained by the retaining member extends along a peripheral face of the cable spool.
摘要翻译: 公开了一种具有改进的便携性的免提装置。 该装置包括:装置本体,包括发射器和接收器,与发射器和接收器连接的输入/输出电缆,并从设备主体向外延伸;电缆壳体,包括能够吸收电缆的电缆线轴和保持构件 能够将设备主体可拆卸地保持在电缆壳体上。 当由保持构件保持时的装置主体沿着电缆线轴的外周面延伸。
-
公开(公告)号:USH782H
公开(公告)日:1990-05-01
申请号:US95714
申请日:1987-09-14
申请人: Mitsunori Ono , Koji Tamoto , Yoshisada Nakamura , Shingo Sato
发明人: Mitsunori Ono , Koji Tamoto , Yoshisada Nakamura , Shingo Sato
CPC分类号: G03C7/3225
摘要: A silver halide color photographic material in disclosed which comprises a support having thereon at least one silver halide emulsion layer, wherein the photographic material contains at least one compound represented by general formula (I) and at least one compound represented by general formula (II) in combination:Cp--(TIME).sub.n --X--Dye (I)wherein Cp represents a coupler residue capable of releasing --(TIME).sub.n --X--Dye upon coupling with an oxidation product of an aromatic primary amine developing agent; TIME represents a timing group; n represents 0 or a positive integer; Dye represents a dye residue, and X represents an auxochromic group of said dye; ##STR1## wherein R represents a hydrogen atom or a substituent; Y represents a hydrogen atom or a coupling-off group; Za, Zb and Zc each represents a methine group, a substituted methine group, .dbd.N-- or --NH--; either the Za--Zb bond or the Zb-Zc bond represents a double bond and the other represents a single bond, provided that when Za, Zb or Zc represents a substituted methine group, one of the substituted methine group or R may be a divalent group capable of linking to form a dimer or higher polymer, and provided that Y does not represent --(TIME).sub.n --X--Dye as defined in general formula (I). The photographic material has improved sharpness and color reproducibility.
-
-
-
-
-
-
-
-
-