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1.发明授权公开(公告)号：US08747682B2
公开(公告)日：2014-06-10
申请号：US12849599
申请日：2010-08-03
CPC分类号： H01L21/0337 , B81C1/00031 , B81C2201/0149
摘要： According to one embodiment, a pattern formation method is disclosed. The method includes forming a plurality of regions on a foundation and the plurality of the regions correspond to different pattern sizes. The method includes separating each of a plurality of block copolymers from another one of the plurality of the block copolymers and segregating the each of the plurality of the block copolymers into a corresponding one of the regions. The method includes performing a phase separation of the each of the block copolymers of each of the regions. The method includes selectively removing a designated phase of each of the phase-separated block copolymers to form a pattern of the each of the block copolymers and the pattern has a different pattern size for the each of the regions.
摘要翻译： 根据一个实施例，公开了图案形成方法。 该方法包括在基础上形成多个区域，并且多个区域对应于不同的图案尺寸。 该方法包括从多个嵌段共聚物中的另一个嵌段共聚物中分离多个嵌段共聚物，并将多个嵌段共聚物中的每一个分离成相应的一个区域。 该方法包括进行每个区域的每个嵌段共聚物的相分离。 该方法包括选择性地除去每个相分离的嵌段共聚物的指定相以形成每个嵌段共聚物的图案，并且该图案对于每个区域具有不同的图案尺寸。
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2.发明申请公开(公告)号：US20110034029A1
公开(公告)日：2011-02-10
申请号：US12849599
申请日：2010-08-03
IPC分类号： H01L21/306
CPC分类号： H01L21/0337 , B81C1/00031 , B81C2201/0149
摘要： According to one embodiment, a pattern formation method is disclosed. The method includes forming a plurality of regions on a foundation and the plurality of the regions correspond to different pattern sizes. The method includes separating each of a plurality of block copolymers from another one of the plurality of the block copolymers and segregating the each of the plurality of the block copolymers into a corresponding one of the regions. The method includes performing a phase separation of the each of the block copolymers of each of the regions. The method includes selectively removing a designated phase of each of the phase-separated block copolymers to form a pattern of the each of the block copolymers and the pattern has a different pattern size for the each of the regions.
摘要翻译： 根据一个实施例，公开了图案形成方法。 该方法包括在基础上形成多个区域，并且多个区域对应于不同的图案尺寸。 该方法包括从多个嵌段共聚物中的另一个嵌段共聚物中分离多个嵌段共聚物，并将多个嵌段共聚物中的每一个分离成相应的一个区域。 该方法包括进行每个区域的每个嵌段共聚物的相分离。 该方法包括选择性地除去每个相分离的嵌段共聚物的指定相以形成每个嵌段共聚物的图案，并且该图案对于每个区域具有不同的图案尺寸。
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公开(公告)号：US08329385B2
公开(公告)日：2012-12-11
申请号：US12481919
申请日：2009-06-10
IPC分类号： G03F7/26
CPC分类号： G03F7/095 , G03F7/091 , H01L21/0337 , H01L21/0338 , H01L21/31144 , H01L21/32139
摘要： A method of manufacturing a semiconductor device according to one embodiment, includes: forming a first mask material film on a workpiece film formed on a semiconductor substrate; forming a resist pattern on the first mask material film; forming a second mask material film having a desired film thickness on the first mask material film so as to cover the resist pattern; carrying out etchback of the second mask material film so as to expose the resist pattern and the first mask material film; processing the resist pattern and the first mask material film simultaneously which are exposed, while leaving the second mask material film of which etchback is carried out; and processing the workpiece film which exposes under the first mask material film.
摘要翻译： 根据一个实施例的制造半导体器件的方法包括：在形成在半导体衬底上的工件膜上形成第一掩模材料膜; 在第一掩模材料膜上形成抗蚀剂图案; 在所述第一掩模材料膜上形成具有所需膜厚度的第二掩模材料膜以覆盖所述抗蚀剂图案; 对所述第二掩模材料膜进行回蚀以暴露所述抗蚀图案和所述第一掩模材料膜; 同时处理曝光的抗蚀剂图案和第一掩模材料膜，同时留下进行回蚀的第二掩模材料膜; 并处理在第一掩模材料膜下露出的工件膜。
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公开(公告)号：US20090305166A1
公开(公告)日：2009-12-10
申请号：US12481919
申请日：2009-06-10
IPC分类号： G03F7/20
CPC分类号： G03F7/095 , G03F7/091 , H01L21/0337 , H01L21/0338 , H01L21/31144 , H01L21/32139
摘要： A method of manufacturing a semiconductor device according to one embodiment, includes: forming a first mask material film on a workpiece film formed on a semiconductor substrate; forming a resist pattern on the first mask material film; forming a second mask material film having a desired film thickness on the first mask material film so as to cover the resist pattern; carrying out etchback of the second mask material film so as to expose the resist pattern and the first mask material film; processing the resist pattern and the first mask material film simultaneously which are exposed, while leaving the second mask material film of which etchback is carried out; and processing the workpiece film which exposes under the first mask material film.
摘要翻译： 根据一个实施例的制造半导体器件的方法包括：在形成在半导体衬底上的工件膜上形成第一掩模材料膜; 在第一掩模材料膜上形成抗蚀剂图案; 在所述第一掩模材料膜上形成具有所需膜厚度的第二掩模材料膜以覆盖所述抗蚀剂图案; 对所述第二掩模材料膜进行回蚀以暴露所述抗蚀剂图案和所述第一掩模材料膜; 同时处理曝光的抗蚀剂图案和第一掩模材料膜，同时留下进行回蚀的第二掩模材料膜; 并处理在第一掩模材料膜下露出的工件膜。
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公开(公告)号：US08158332B2
公开(公告)日：2012-04-17
申请号：US12689830
申请日：2010-01-19
申请人： Kentaro Matsunaga , Tomoya Oori , Eishi Shiobara
发明人： Kentaro Matsunaga , Tomoya Oori , Eishi Shiobara
IPC分类号： G03C5/00
CPC分类号： G03F7/0035 , G03F7/40 , H01L21/0273 , H01L21/0337 , H01L21/0338 , H01L21/31144 , H01L27/11517 , H01L27/11521
摘要： A method of fabricating a semiconductor device according to an embodiment includes: forming a first resist pattern made of a first resist material on a workpiece material; irradiating an energy beam onto the first resist pattern, the energy beam exposing the first resist material to light; performing a treatment for improving resistance the first resist pattern after irradiation of the energy beam; forming a coating film on the workpiece material so as to cover the first resist pattern; and forming a second resist pattern made of a second resist material on the coating film after the treatment.
摘要翻译： 根据实施例的制造半导体器件的方法包括：在工件材料上形成由第一抗蚀剂材料制成的第一抗蚀剂图案; 将能量束照射到所述第一抗蚀剂图案上，所述能量束将所述第一抗蚀剂材料暴露于光; 进行能量束照射后的第一抗蚀剂图案的改善电阻的处理; 在所述工件材料上形成涂覆膜以覆盖所述第一抗蚀剂图案; 以及在处理后在涂膜上形成由第二抗蚀剂材料制成的第二抗蚀剂图案。
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公开(公告)号：US20100183982A1
公开(公告)日：2010-07-22
申请号：US12689830
申请日：2010-01-19
申请人： Kentaro MATSUNAGA , Tomoya Oori , Eishi Shiobara
发明人： Kentaro MATSUNAGA , Tomoya Oori , Eishi Shiobara
IPC分类号： G03F7/20
CPC分类号： G03F7/0035 , G03F7/40 , H01L21/0273 , H01L21/0337 , H01L21/0338 , H01L21/31144 , H01L27/11517 , H01L27/11521
摘要： A method of fabricating a semiconductor device according to an embodiment includes: forming a first resist pattern made of a first resist material on a workpiece material; irradiating an energy beam onto the first resist pattern, the energy beam exposing the first resist material to light; performing a treatment for improving resistance the first resist pattern after irradiation of the energy beam; forming a coating film on the workpiece material so as to cover the first resist pattern; and forming a second resist pattern made of a second resist material on the coating film after the treatment.
摘要翻译： 根据实施例的制造半导体器件的方法包括：在工件材料上形成由第一抗蚀剂材料制成的第一抗蚀剂图案; 将能量束照射到所述第一抗蚀剂图案上，所述能量束将所述第一抗蚀剂材料暴露于光; 进行能量束照射后的第一抗蚀剂图案的改善电阻的处理; 在所述工件材料上形成涂覆膜以覆盖所述第一抗蚀剂图案; 以及在处理后在涂膜上形成由第二抗蚀剂材料制成的第二抗蚀剂图案。
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公开(公告)号：US08138059B2
公开(公告)日：2012-03-20
申请号：US12564440
申请日：2009-09-22
申请人： Kentaro Matsunaga , Hirokazu Kato , Tomoya Oori
发明人： Kentaro Matsunaga , Hirokazu Kato , Tomoya Oori
IPC分类号： H01L21/76
CPC分类号： H01L21/0273 , G03F7/40 , H01L21/0337 , H01L21/0338 , H01L21/31144
摘要： A semiconductor device manufacturing method includes: forming a core pattern on a foundation film, the core pattern containing a material generating acid by light exposure; selectively exposing part of the core pattern except an longitudinal end portion; supplying a mask material onto the foundation film so as to cover the core pattern, the mask material being crosslinkable upon supply acid from the core pattern; etching back the mask material to expose an upper surface of the core pattern and remove a portion of the mask material formed on the end portion of the core pattern, thereby leaving a mask material side wall portion formed on a side wall of the core pattern; and removing the core pattern and processing the foundation film by using the mask material sidewall portion left on the foundation film as a mask.
摘要翻译： 半导体器件制造方法包括：在基底膜上形成芯图案，所述芯图案含有通过曝光产生酸的材料; 选择性地暴露除了纵向端部之外的芯图案的一部分; 将掩模材料供应到所述基底膜上以覆盖所述芯图案，所述掩模材料在从所述芯图案供给酸时可交联; 蚀刻掩模材料以露出芯图案的上表面并且去除形成在芯图案的端部上的掩模材料的一部分，从而留下形成在芯图案的侧壁上的掩模材料侧壁部分; 并且通过使用留在基底膜上的掩模材料侧壁部分作为掩模去除芯图案和处理基底膜。
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公开(公告)号：US08765362B2
公开(公告)日：2014-07-01
申请号：US13720162
申请日：2012-12-19
申请人： Tomoya Oori
发明人： Tomoya Oori
IPC分类号： G03F7/20
CPC分类号： G03F7/20 , G03F7/0035 , G03F7/203 , G03F7/70466
摘要： According to one embodiment, a patterning method includes exposure-transferring a plurality of first island pattern images and a plurality of second island pattern images onto a resist film, each of the plurality of first island pattern images having a configuration having a contour line or a major axis extending in a third direction, the plurality of first island pattern images having a staggered arrangement, each of the plurality of second island pattern images having a configuration having a contour line or a major axis extending in a fourth direction, the plurality of second island pattern images having a staggered arrangement, the first island pattern images and the second island pattern images being continuous in the first direction by a portion of each of the second island pattern images overlapping one of the first island pattern images.
摘要翻译： 根据一个实施例，图案化方法包括将多个第一岛状图案和多个第二岛状图案曝光转印到抗蚀剂膜上，多个第一岛状图案中的每一个具有轮廓线或 长轴在第三方向上延伸，所述多个第一岛状图案具有交错布置，所述多个第二岛状图案图像中的每一个具有轮廓线或沿第四方向延伸的长轴的构造，所述多个第二岛状图案 岛图案图像具有交错布置，第一岛图案图像和第二岛图案图像在与第一岛图案图像重叠的第二岛图案图像中的每一个的一部分沿第一方向连续。
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公开(公告)号：US20100120255A1
公开(公告)日：2010-05-13
申请号：US12564440
申请日：2009-09-22
申请人： Kentaro MATSUNGA , Hirokazu Kato , Tomoya Oori
发明人： Kentaro MATSUNGA , Hirokazu Kato , Tomoya Oori
IPC分类号： H01L21/3065 , H01L21/306
CPC分类号： H01L21/0273 , G03F7/40 , H01L21/0337 , H01L21/0338 , H01L21/31144
摘要： A semiconductor device manufacturing method includes: forming a core pattern on a foundation film, the core pattern containing a material generating acid by light exposure; selectively exposing part of the core pattern except an longitudinal end portion; supplying a mask material onto the foundation film so as to cover the core pattern, the mask material being crosslinkable upon supply acid from the core pattern; etching back the mask material to expose an upper surface of the core pattern and remove a portion of the mask material formed on the end portion of the core pattern, thereby leaving a mask material side wall portion formed on a side wall of the core pattern; and removing the core pattern and processing the foundation film by using the mask material sidewall portion left on the foundation film as a mask.
摘要翻译： 半导体器件制造方法包括：在基底膜上形成芯图案，所述芯图案含有通过曝光产生酸的材料; 选择性地暴露除了纵向端部之外的芯图案的一部分; 将掩模材料供应到所述基底膜上以覆盖所述芯图案，所述掩模材料在从所述芯图案供给酸时可交联; 蚀刻掩模材料以露出芯图案的上表面并且去除形成在芯图案的端部上的掩模材料的一部分，从而留下形成在芯图案的侧壁上的掩模材料侧壁部分; 并且通过使用留在基底膜上的掩模材料侧壁部分作为掩模去除芯图案和处理基底膜。
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