Piston outer panel mold and method of constructing a piston and forming an undercut cooling gallery of a piston therewith
    1.
    发明授权
    Piston outer panel mold and method of constructing a piston and forming an undercut cooling gallery of a piston therewith 有权
    活塞外板模具以及构造活塞的方法以及形成活塞的底切冷却槽

    公开(公告)号:US08459332B1

    公开(公告)日:2013-06-11

    申请号:US13544978

    申请日:2012-07-09

    IPC分类号: B22D33/04 B22D17/00

    摘要: An outer panel mold and method of constructing a piston and forming an undercut cooling gallery of a piston therewith is provided. The outer panel mold is operably attachable to a conventional piston mold machine. The outer panel mold has a pair of gudgeon core members and a pair of gudgeon guide blocks. The gudgeon core members are moveable toward and away from one another along an axis that is substantially perpendicular to a longitudinal central axis of a piston. Each of the gudgeon guide blocks have an opening receiving a separate one of the gudgeon core members. A pair of outer panels are moveable into a closed position between the pair of gudgeon guide blocks to form an undercut cooling gallery of the piston and an open position to allow extraction of the piston vertically along the longitudinal central axis in response to movement of the gudgeon guide blocks.

    摘要翻译: 提供了一种外板模具和构造活塞并形成活塞底切冷却槽的方法。 外板模具可操作地附接到常规活塞模具机。 外板模具具有一对舵柄芯部件和一对舵杆导向块。 舵柄芯件可沿着基本上垂直于活塞的纵向中心轴线的轴线彼此移动并远离彼此。 每个舵导向块具有接收独立的舵柄芯部构件的开口。 一对外板可移动到一对舵杆导向块之间的关闭位置,以形成活塞的底切冷却槽,并且打开位置以允许响应于舵柄的移动沿着纵向中心轴垂直地提取活塞 导块。

    FPGA implemented bit-serial multiplier and infinite impulse response
    2.
    发明授权
    FPGA implemented bit-serial multiplier and infinite impulse response 失效
    FPGA实现了位串行乘法器和无限脉冲响应

    公开(公告)号:US06438570B1

    公开(公告)日:2002-08-20

    申请号:US09358508

    申请日:1999-07-21

    申请人: Andrew J. Miller

    发明人: Andrew J. Miller

    IPC分类号: G06F752

    摘要: A bit-serial multiplier and an infinite impulse response filter implemented therewith, both implemented on an FPGA, are described in various embodiments. The bit-serial multiplier includes function generators configured as a multiplicand memory, a multiplier memory, a product memory, a bit-serial multiplier, and a bit-serial adder. The function generators are arranged to perform bit-serial multiplication of values in the multiplier and multiplicand memories.

    摘要翻译: 在各种实施例中描述了在FPGA上实现的位串行乘法器和实现的无限脉冲响应滤波器。 位串行乘法器包括被配置为被乘数存储器,乘法器存储器,乘积存储器,位串行乘法器和位串行加法器的函数发生器。 功能发生器被布置为执行乘法器和被乘数存储器中的值的位串行乘法。

    FPGA implemented bit-serial multiplier and infinite impulse response filter
    5.
    发明授权
    FPGA implemented bit-serial multiplier and infinite impulse response filter 失效
    FPGA实现了位串行乘法器和无限脉冲响应滤波器

    公开(公告)号:US06584481B1

    公开(公告)日:2003-06-24

    申请号:US10215778

    申请日:2002-08-09

    申请人: Andrew J. Miller

    发明人: Andrew J. Miller

    IPC分类号: G06F1710

    摘要: A bit-serial multiplier and an infinite impulse response filter implemented therewith, both implemented on an FPGA, are described in various embodiments. The bit-serial multiplier includes function generators configured as a multiplicand memory, a multiplier memory, a product memory, a bit-serial multiplier, and a bit-serial adder. The function generators are arranged to perform bit-serial multiplication of values in the multiplier and multiplicand memories.

    摘要翻译: 在各种实施例中描述了在FPGA上实现的位串行乘法器和实现的无限脉冲响应滤波器。 位串行乘法器包括被配置为被乘数存储器,乘法器存储器,乘积存储器,位串行乘法器和位串行加法器的函数发生器。 功能发生器被布置为执行乘法器和被乘数存储器中的值的位串行乘法。

    Nut locking clip assembly
    6.
    发明授权
    Nut locking clip assembly 有权
    螺母锁扣组件

    公开(公告)号:US06558095B2

    公开(公告)日:2003-05-06

    申请号:US09774508

    申请日:2001-01-31

    申请人: Andrew J. Miller

    发明人: Andrew J. Miller

    IPC分类号: F16B3910

    摘要: A nut locking clip assembly holds a nut in a desired orientation. The clip assembly has a first member or arm secured to a structure. A second arm is secured to the first arm through a spring portion. The first member defines a hole whereas the second member defines a longitudinal opening. The longitudinal opening has two edges define a width that is slightly wider than the width of the nut head. When the nut is threaded into the structure through the hole in the first member, it is oriented to allow the second member to slide over the nut. The edges of the longitudinal opening or slot prevent the edges of the nut from rotating. To remove the nut, the second member is forced back toward the first member allowing the nut to rotate.

    摘要翻译: 螺母锁定夹组件将螺母保持在期望的方向。 夹子组件具有固定到结构的第一构件或臂。 第二臂通过弹簧部分固定到第一臂。 第一构件限定孔,而第二构件限定纵向开口。 纵向开口具有两个边缘,该边缘限定了宽于螺母头的宽度的宽度。 当螺母通过第一构件中的孔拧入结构中时,其被定向成允许第二构件在螺母上滑动。 纵向开口或狭槽的边缘防止螺母的边缘旋转。 为了去除螺母,第二构件被迫朝第一构件返回,允许螺母旋转。

    Lightweight insulated concrete wall
    8.
    发明授权
    Lightweight insulated concrete wall 失效
    轻质隔热混凝土墙

    公开(公告)号:US5697189A

    公开(公告)日:1997-12-16

    申请号:US497626

    申请日:1995-06-30

    IPC分类号: E04C2/288

    CPC分类号: E04C2/2885

    摘要: A lightweight structural concrete wall panel for house construction, includes a sandwich construction of two thin fiber reinforced concrete faces enclosing vertical panels of insulation material consisting of expanded polystyrene. Vertical structural concrete ribs between the insulation panels are used to interconnect the concrete faces. A continuous track system cast in the upper edge of the panel and projecting connect bars at the lower edge of the wall, connecting this wall to the surrounding structure in such a manner that the floor slab can be poured after erecting the walls. The face of the wall panel can be cast in such a manner as to appear as siding or another desirable building surface. Window and door openings can also be cast into this wall.

    摘要翻译: 一种用于房屋建筑的轻质结构混凝土墙板,包括两个薄壁钢筋混凝土面的夹层结构,其中包括由发泡聚苯乙烯构成的绝缘材料的垂直面板。 绝缘板之间的垂直结构混凝土筋用于连接混凝土面。 连续轨道系统铸造在面板的上边缘,并在壁的下边缘处突出连接杆,将墙壁连接到周围结构,使得在竖立墙壁之后可以倒下地板。 墙板的表面可以以如出现作为侧板或另一个理想的建筑物表面的方式铸造。 窗户和门口也可以投入这个墙壁。

    Linear feedback shift register in a programmable gate array
    9.
    发明授权
    Linear feedback shift register in a programmable gate array 有权
    可编程门阵列中的线性反馈移位寄存器

    公开(公告)号:US06181164B2

    公开(公告)日:2001-01-30

    申请号:US09312369

    申请日:1999-05-13

    申请人: Andrew J. Miller

    发明人: Andrew J. Miller

    IPC分类号: H03K19173

    CPC分类号: H03K19/1736

    摘要: A linear feedback shift register in a programmable gate array. A first lookup table is configured as a shift register having n selectable taps and a shift-input. A second lookup table is configured as a parity generator and has inputs coupled to the n selectable taps and an output coupled to the shift-input of the shift register.

    摘要翻译: 可编程门阵列中的线性反馈移位寄存器。 第一查找表被配置为具有n个可选抽头和移位输入的移位寄存器。 第二查找表被配置为奇偶校验发生器并且具有耦合到n个可选抽头的输入和耦合到移位寄存器的移位输入的输出。