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公开(公告)号：US20060142001A1
公开(公告)日：2006-06-29
申请号：US11024540
申请日：2004-12-28
申请人： Kevin Moisan , Juan Martinez , Michael Tisiker , Dick Khan , Amit Rele
发明人： Kevin Moisan , Juan Martinez , Michael Tisiker , Dick Khan , Amit Rele
IPC分类号： H04Q7/20
CPC分类号： H04L43/045 , H04L41/0681 , H04L41/22 , H04L41/5009 , H04L43/0817 , H04L43/0852 , H04L43/16
摘要： Methods and apparatus for monitoring a communication network are disclosed. A disclosed method of monitoring a communication network periodically collects data from a plurality of network elements within the communication network. The disclosed method analyzes the collected data in accordance with a rule that corresponds to a characteristic of performance or capacity of the plurality of network elements to form performance or capacity data representative of a user experience of the communication network. The disclosed method then presents the performance or capacity data via a web browser using a plurality of view levels and types.
摘要翻译： 公开了用于监视通信网络的方法和装置。 所公开的监控通信网络的方法周期性地从通信网络内的多个网络元件收集数据。 所公开的方法根据与多个网络元件的性能或容量的特性对应的规则来分析所收集的数据，以形成表示通信网络的用户体验的性能或容量数据。 所公开的方法然后通过使用多个视图级别和类型的web浏览器呈现性能或容量数据。
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公开(公告)号：US20070162808A1
公开(公告)日：2007-07-12
申请号：US11684053
申请日：2007-03-09
申请人： Francisco Cano , Juan Martinez
发明人： Francisco Cano , Juan Martinez
CPC分类号： G01R31/318558 , G01R31/31723 , G01R31/318511 , G01R31/318572
摘要： An apparatus and method to test components in a semiconductor test structure. On a semiconductor wafer, a test module implemented in one or more scribe lines between a plurality of semiconductor dies is used to test components in the semiconductor test structure. The test module may, for example, test electrical characteristics of chains of vias, transistors, and functional devices, such as oscillators. The test module contains a scan chain control coupled through a plurality of pass gates to each component to be tested. The scan chain control sequentially closes the pass gates to separately test the components in the semiconductor test structure. The test module further interfaces with an external testing device and the results of each test are compared with the expected results to identify faulty components.
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公开(公告)号：US20050059444A1
公开(公告)日：2005-03-17
申请号：US10660174
申请日：2003-09-11
CPC分类号： H01Q1/362 , H01Q1/40 , H01Q21/28 , H04M1/0202
摘要： A communication device (100, 500, 800) includes a housing (115) and an antenna system. The housing (115) comprises at least one metallic portion (110) and at least one non-metallic portion (105). The antenna system is for tuning the communication device (100, 500, 800) to radiate at one or more frequencies. The antenna system is located within the non-metallic portion (105) of the housing (115).
摘要翻译： 通信设备（100,500,800）包括壳体（115）和天线系统。 壳体（115）包括至少一个金属部分（110）和至少一个非金属部分（105）。 天线系统用于调谐通信设备（100,500,800）以一个或多个频率辐射。 天线系统位于壳体（115）的非金属部分（105）内。
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公开(公告)号：US20110208889A1
公开(公告)日：2011-08-25
申请号：US13125972
申请日：2008-10-31
申请人： Christopher Rijken , Juan Martinez , Shan Chen , Peter W. Austin , Chi W. So
发明人： Christopher Rijken , Juan Martinez , Shan Chen , Peter W. Austin , Chi W. So
IPC分类号： G06F13/14
CPC分类号： G06F13/385 , G06F3/0632 , G06F3/0634 , G06F2213/0032 , G06F2213/3802 , H01R31/06
摘要： In one embodiment, a computer system comprises one or more processors, a circuit board assembly having at least one SATA port, a general purpose input/output port proximate the SATA port, signal generating logic to generate a signal when the general purpose input/output port is coupled to a connector, and a memory module communicatively connected to the one or more processors and comprising logic instructions stored in a computer readable medium which, when executed on the one or more processors, configure the one or more processors to configure the SATA port according to the signal generated by the signal generating circuitry.
摘要翻译： 在一个实施例中，计算机系统包括一个或多个处理器，具有至少一个SATA端口，靠近SATA端口的通用输入/输出端口的电路板组件，当通用输入/输出 端口耦合到连接器，以及存储器模块，其通信地连接到所述一个或多个处理器，并且包括存储在计算机可读介质中的逻辑指令，所述逻辑指令在所述一个或多个处理器上执行时配置所述一个或多个处理器以配置所述SATA 端口，根据信号发生电路产生的信号。
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公开(公告)号：US20070236849A1
公开(公告)日：2007-10-11
申请号：US11278915
申请日：2006-04-06
申请人： Richard Bono , Juan Martinez , Stephen Whitney
发明人： Richard Bono , Juan Martinez , Stephen Whitney
IPC分类号： H02H5/04
CPC分类号： H01H85/44 , H01C7/12 , H01H2085/0034 , H01H2085/0414 , H01L2924/0002 , H01L2924/00
摘要： A circuit protection device includes a fuse placed in electrical communication with first and second conductors. An overvoltage protection component is placed in electrical communication with the first conductor and a third conductor. An insulative housing encloses the fuse, overvoltage protection component and portions of the first, second and third conductors. The first and second conductors include first and second terminal portions, respectively, that extend through the housing and reside at least substantially flush with an outer surface of the housing.
摘要翻译： 电路保护装置包括与第一和第二导体电连通的保险丝。 过电压保护部件与第一导体和第三导体电连通。 绝缘壳体包围保险丝，过电压保护元件以及第一，第二和第三导体的部分。 第一和第二导体分别包括延伸穿过壳体并且至少基本上与壳体的外表面齐平的第一和第二端子部分。
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公开(公告)号：US20060044001A1
公开(公告)日：2006-03-02
申请号：US11218650
申请日：2005-09-02
申请人： Francisco Cano , Juan Martinez
发明人： Francisco Cano , Juan Martinez
IPC分类号： G01R31/26
CPC分类号： G01R31/318558 , G01R31/31723 , G01R31/318511 , G01R31/318572
摘要： An apparatus and method to test components in a semiconductor test structure. On a semiconductor wafer, a test module implemented in one or more scribe lines between a plurality of semiconductor dies is used to test components in the semiconductor test structure. The test module may, for example, test electrical characteristics of chains of vias, transistors, and functional devices, such as oscillators. The test module contains a scan chain control coupled through a plurality of pass gates to each component to be tested. The scan chain control sequentially closes the pass gates to separately test the components in the semiconductor test structure. The test module further interfaces with an external testing device and the results of each test are compared with the expected results to identify faulty components.
摘要翻译： 一种在半导体测试结构中测试元件的设备和方法。 在半导体晶片上，使用在多个半导体管芯之间的一个或多个划线中实现的测试模块来测试半导体测试结构中的部件。 测试模块可以例如测试通孔链，晶体管和诸如振荡器的功能器件的电气特性。 测试模块包含通过多个通过门耦合到要测试的每个组件的扫描链控制。 扫描链控制顺序关闭通过门以分开测试半导体测试结构中的组件。 测试模块进一步与外部测试设备接口，并将每个测试的结果与预期结果进行比较，以识别故障组件。
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公开(公告)号：US20100321777A1
公开(公告)日：2010-12-23
申请号：US12487443
申请日：2009-06-18
申请人： Juan Martinez , Andrew Berger
发明人： Juan Martinez , Andrew Berger
CPC分类号： G02B27/26 , G03B35/00 , H04N13/207
摘要： A method for optimizing stereoscopic effect in a three-dimensional image is provided. The method for optimizing stereoscopic effect comprises capturing a first unpolarized beam of light representing a first image and a second unpolarized beam of light representing a second image using a lens module, converting the first and second unpolarized beam of light into the first polarized beam of light and the second polarized beam of light using a filter module and adjusting separation and convergence of the lens module using a lens control module for generating an output stream.
摘要翻译： 提供了一种用于优化三维图像中的立体效果的方法。 用于优化立体效果的方法包括使用透镜模块捕获表示第一图像的第一非偏振光束和表示第二图像的第二非偏振光束，将第一和第二非偏振光束转换成第一偏振光束 和第二偏振光束，并且使用用于产生输出流的透镜控制模块调整透镜模块的分离和会聚。
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公开(公告)号：US20070285104A1
公开(公告)日：2007-12-13
申请号：US11842205
申请日：2007-08-21
申请人： Francisco Cano , Juan Martinez
发明人： Francisco Cano , Juan Martinez
CPC分类号： G01R31/318558 , G01R31/31723 , G01R31/318511 , G01R31/318572
摘要： An apparatus and method to test components in a semiconductor test structure. On a semiconductor wafer, a test module implemented in one or more scribe lines between a plurality of semiconductor dies is used to test components in the semiconductor test structure. The test module may, for example, test electrical characteristics of chains of vias, transistors, and functional devices, such as oscillators. The test module contains a scan chain control coupled through a plurality of pass gates to each component to be tested. The scan chain control sequentially closes the pass gates to separately test the components in the semiconductor test structure. The test module further interfaces with an external testing device and the results of each test are compared with the expected results to identify faulty components.
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公开(公告)号：US20070166145A1
公开(公告)日：2007-07-19
申请号：US11511879
申请日：2006-08-29
申请人： Juan Martinez
发明人： Juan Martinez
IPC分类号： B65G1/133
摘要： An automated feeder transports pastry product dishes and/or moulds and includes a movable headstock arranged transversely above a first conveyor. The headstock includes an upper plate, a main linear actuator attached thereto, a lower mobile plate extendable by the main linear actuator, and a plurality of magnetic elements attached to the lower mobile plate. The magnetic elements hold a plurality of metallic plates in a predetermined arrangement. The headstock also includes at least two secondary vertical linear actuators disposed on the upper plate for actuating a releasing mechanism to dislodge the dishes from the magnetic elements and a transportation mechanism to provide longitudinal movement along a pair of longitudinal rails. The transportation mechanism permits the headstock to move between a first position over the first conveyor to a second position over a second.
摘要翻译： 自动进料器输送糕点产品盘和/或模具，并且包括横向放置在第一输送机上方的可移动主轴箱。 主轴箱包括上板，附接到其上的主线性致动器，可由主线性致动器延伸的下移动板和附接到下移动板的多个磁性元件。 磁性元件以预定的布置保持多个金属板。 头架还包括设置在上板上的至少两个次级垂直线性致动器，用于致动释放机构以将盘从磁性元件移出，以及输送机构以沿着一对纵向轨道提供纵向运动。 运输机构允许主轴箱在第一输送机上的第一位置之间移动到第二位置上的第二位置。
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公开(公告)号：US20050193259A1
公开(公告)日：2005-09-01
申请号：US10781477
申请日：2004-02-17
IPC分类号： G06F11/00
CPC分类号： G06F11/0772
摘要： A system and method for reboot reporting or notification is provided. One system embodiment may include, for example, a plurality of computer systems having at least one processor and at least one non-maskable interrupt output, a manager system in circuit communication with the plurality of computer systems and having at least one non-maskable interrupt input associated with the plurality of computer systems.
摘要翻译： 提供了重新启动报告或通知的系统和方法。 一个系统实施例可以包括例如具有至少一个处理器和至少一个不可屏蔽中断输出的多个计算机系统，与多个计算机系统进行电路通信的管理器系统，并具有至少一个不可屏蔽的中断 与多个计算机系统相关联的输入。
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