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    Hardware mechanism for automatically detecting hot-spot references and diverting same from memory traffic in a multiprocessor computer system
    1.
    发明授权
    Hardware mechanism for automatically detecting hot-spot references and diverting same from memory traffic in a multiprocessor computer system 失效
    用于自动检测热点参考并将其从多处理器计算机系统中的存储器流量转移的硬件机制

    公开(公告)号：US4969088A

    公开(公告)日：1990-11-06

    申请号：US186327

    申请日：1988-04-26

    申请人： Kevin P. McAuliffe ,  Vern A. Norton ,  Gregory F. Pfister ,  Bharat D. Rathi

    发明人： Kevin P. McAuliffe ,  Vern A. Norton ,  Gregory F. Pfister ,  Bharat D. Rathi

    IPC分类号： G06F15/167 ,  G06F12/12 ,  G06F13/16 ,  G06F15/173 ,  H04L12/56

    CPC分类号： H04L45/28 ,  G06F12/122 ,  G06F13/1663 ,  G06F15/17393 ,  H04L45/00 ,  H04L45/24

    摘要： An interconnection network management architecture for use with a large shared memory multiprocessor computing system including a plurality of processors and a plurality of separately addressable main memory modules. Two parallel, interconnection networks are provided each capable of interconnecting any processor to any memory module, and each having different latency characteristics. A Hot-Spot detection mechnaism is associated with each main memory module for detecting when a particular address in that module has become a Hot Spot and includes a first memory for storing all detected Hot Spots. A diverter element is associated with each processor for selectively routing memory requests over either the first or second memory network contingent on its status as a Hot Spot. A second memory is included in each diverter element for storing all Hot Spots detected by the detector elements. A control mechanism determines if any current main memory address is a listed Hot Spot within the second memory and, if so, causes the main memory reference to be transmitted to the memory system over a selected interconnection network. Another component of this mechanism determines if a particular address has been accessed a sufficient number of times within a given timeframe to be deemed a Hot Spot and removes Hot Spots from both the first and second memories when necessary.

    Method and apparatus for efficiently handling temporarily cacheable data
    4.
    发明授权
    Method and apparatus for efficiently handling temporarily cacheable data 失效
    用于有效地处理临时可缓存数据的方法和装置

    公开(公告)号：US4885680A

    公开(公告)日：1989-12-05

    申请号：US890428

    申请日：1986-07-25

    申请人： John H. Anthony ,  William C. Brantley, Jr. ,  Kevin P. McAuliffe ,  Vern A. Norton ,  Gregory F. Pfister

    发明人： John H. Anthony ,  William C. Brantley, Jr. ,  Kevin P. McAuliffe ,  Vern A. Norton ,  Gregory F. Pfister

    IPC分类号： G06F12/08 ,  G06F12/10

    CPC分类号： G06F12/1045 ,  G06F12/0837

    摘要： A method and apparatus for marking data that is temporarily cacheable to facilitate the efficient management of said data. A bit in the segment and/or page descriptor of the data called the marked data bit (MDB) is generated by the compiler and included in a request for data from memory by the processor in the form of a memory address and will be stored in the cache directory at a location related to the particular line of data involved. The bit is passed to the cache together with the associated real address after address translation (in the case of a real cache). when the cache controls load the address of the data in the directory it is also stored the marked data bit (MDB) in the directory with the address. When the cacheability of the temporarily cacheable data changes from cacheable to non-cacheable, a single instruction is issued to cause the cache to invalidate all marked data. When an "invalidate marked data" instruction is received, the cache controls sweep through the entire cache directory and invalidate any cache line which has the "marked data bit" set in a single pass. An extension of the invention involves using a multi-bit field rather than a single bit to provide a more versatile control of the temporary cacheability of data.

    摘要翻译： 一种用于标记数据的方法和装置，该数据可临时高速缓存以便于所述数据的有效管理。 称为标记数据位（MDB）的数据的段和/或页面描述符中的一位由编译器生成，并被包含在存储器地址形式中由处理器从存储器请求数据的请求中，并存储在 在与所涉及的特定数据行相关的位置处的缓存目录。 该位在地址转换之后（在实际高速缓存的情况下）与相关联的实际地址一起被传递到高速缓存。 当缓存控件加载目录中的数据的地址时，它也将标记的数据位（MDB）存储在具有地址的目录中。 当临时可缓存数据的可缓存性从可高速缓存改变为不可缓存时，将发出单个指令以使缓存无效所有标记的数据。 当接收到“无效的标记数据”指令时，高速缓存控制扫描整个高速缓存目录，并使在一次通过中设置的“标记数据位”的任何高速缓存行无效。 本发明的扩展涉及使用多比特字段而不是单个比特来提供数据的临时高速缓存的更通用的控制。

    Optimum write-back strategy for directory-based cache coherence protocols
    5.
    发明授权
    Optimum write-back strategy for directory-based cache coherence protocols 失效
    基于目录的缓存一致性协议的最佳回写策略

    公开(公告)号：US5313609A

    公开(公告)日：1994-05-17

    申请号：US704553

    申请日：1991-05-23

    申请人： Sandra J. Baylor ,  Kevin P. McAuliffe ,  Bharat D. Rathi

    发明人： Sandra J. Baylor ,  Kevin P. McAuliffe ,  Bharat D. Rathi

    IPC分类号： G06F12/08 ,  G06F15/16 ,  G06F15/177 ,  G06F12/00

    CPC分类号： G06F12/0817 ,  G06F12/082

    摘要： A directory-based protocol is provided for maintaining data coherency in a multiprocessing (MP) system having a number of processors with associated write-back caches, a multistage interconnection network (MIN) leading to a shared memory, and a global directory associated with the main memory to keep track of state and control information of cache lines. Upon a request by a requesting cache for a cache line which has been exclusively modified by a source cache, two buffers are situated in the global directory to collectively intercept modified data words of the modified cache line during the write-back to memory. A modified word buffer is used to capture modified words within the modified cache line. Moreover, a line buffer stores an old cache line transferred from the memory, during the write back operation. Finally, the line buffer and the modified word buffer, together, provide the entire modified line to a requesting cache.

    摘要翻译： 提供了一种基于目录的协议，用于在具有多个处理器的多处理（MP）系统中维持数据一致性，该处理器具有相关联的回写高速缓存，通向共享存储器的多级互连网络（MIN），以及与 主存储器来跟踪缓存行的状态和控制信息。 在请求高速缓存针对由源高速缓存专门修改的高速缓存行的请求时，两个缓冲器位于全局目录中以在回写到存储器期间共同拦截修改的高速缓存线的修改数据字。 修改后的字缓冲区用于捕获修改后的高速缓存行中的修改字。 此外，在回写操作期间，行缓冲器存储从存储器传送的旧高速缓存行。 最后，行缓冲区和修改后的字缓冲区一起，将整个修改后的行提供给请求缓存。

    Business performance bookmarks
    7.
    发明授权
    Business performance bookmarks 有权

    公开(公告)号：US10515329B2

    公开(公告)日：2019-12-24

    申请号：US11624785

    申请日：2007-01-19

    申请人： David M. Enyeart ,  Kevin P. McAuliffe ,  Billy R. Rowe ,  Eric D. Wayne

    发明人： David M. Enyeart ,  Kevin P. McAuliffe ,  Billy R. Rowe ,  Eric D. Wayne

    IPC分类号： G06Q10/06 ,  G06Q40/00 ,  G06F16/44

    摘要： A performance bookmark of a dashboard view is created, e.g., in response to a triggering event. The performance bookmark includes a name, a timestamp, a reference to the visual properties of the dashboard view at the time that the performance bookmark is created and a reference to relationships of information displayed by the dashboard view at the time the performance bookmark is created. When a performance bookmark is recalled, the dashboard view is configured to correspond with the visual properties and relationships of information recorded at the time the select performance bookmark was created. Performance bookmarks are instances and relationships, and are not limited to snap shots captured of a static visual image of a dashboard screen from a corresponding dashboard user interface. As such, a retrieved dashboard view of a performance bookmark that is recalled from the bookmark system is live and supports user interaction.