公开(公告)号：US20080146004A1

公开(公告)日：2008-06-19

申请号：US11610199

申请日：2006-12-13

申请人： Kevin Sean Matocha ,  Vinayak Tilak ,  Stephen Daley Arthur ,  Zachary Matthew Stum

发明人： Kevin Sean Matocha ,  Vinayak Tilak ,  Stephen Daley Arthur ,  Zachary Matthew Stum

IPC分类号： H01L21/20 ,  H01L21/36

CPC分类号： H01L21/0465 ,  H01L29/66068

摘要： A method for fabricating a SiC MOSFET is disclosed. The method includes growing a SiC epilayer over a substrate, planarizing the SiC epilayer to provide a planarized SiC epilayer, and forming a gate dielectric layer in contact with the planarized epilayer.

摘要翻译： 公开了一种制造SiC MOSFET的方法。 该方法包括在衬底上生长SiC外延层，平面化SiC外延层以提供平坦化的SiC外延层，以及形成与平坦化的外延层接触的栅极电介质层。

公开(公告)号：US07781312B2

公开(公告)日：2010-08-24

申请号：US11610199

申请日：2006-12-13

申请人： Kevin Sean Matocha ,  Vinayak Tilak ,  Stephen Daley Arthur ,  Zachary Matthew Stum

发明人： Kevin Sean Matocha ,  Vinayak Tilak ,  Stephen Daley Arthur ,  Zachary Matthew Stum

IPC分类号： H01L21/20

CPC分类号： H01L21/0465 ,  H01L29/66068

摘要： A method for fabricating a SiC MOSFET is disclosed. The method includes growing a SiC epilayer over a substrate, planarizing the SiC epilayer to provide a planarized SiC epilayer, and forming a gate dielectric layer in contact with the planarized epilayer.

摘要翻译： 公开了一种制造SiC MOSFET的方法。 该方法包括在衬底上生长SiC外延层，平面化SiC外延层以提供平坦化的SiC外延层，以及形成与平坦化的外延层接触的栅极电介质层。

公开(公告)号：US07595241B2

公开(公告)日：2009-09-29

申请号：US11466488

申请日：2006-08-23

申请人： Kevin Sean Matocha ,  Jody Alan Fronheiser ,  Larry Burton Rowland ,  Jesse Berkley Tucker ,  Stephen Daley Arthur ,  Zachary Matthew Stum

发明人： Kevin Sean Matocha ,  Jody Alan Fronheiser ,  Larry Burton Rowland ,  Jesse Berkley Tucker ,  Stephen Daley Arthur ,  Zachary Matthew Stum

IPC分类号： H01L21/336

CPC分类号： H01L29/7802 ,  H01L29/0634 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/41766 ,  H01L29/66068

摘要： A method of forming a vertical MOSFET device includes forming a trench within a drift layer substrate, the drift layer comprising a first polarity type, the trench generally defining a well region of a second polarity type opposite the first polarity type. An ohmic contact layer is formed within a bottom surface of the trench, the ohmic contact layer comprising a material of the second polarity type. A layer of the second polarity type is epitaxially grown over the drift layer, sidewall surfaces of the trench, and the ohmic contact layer. A layer of the first polarity type is epitaxially grown over the epitaxially grown layer of the second polarity type so as to refill the trench, and the epitaxially grown layers of the first and second polarity type are planarized so as to expose an upper surface of the drift layer substrate.

摘要翻译： 形成垂直MOSFET器件的方法包括在漂移层衬底内形成沟槽，漂移层包括第一极性类型，沟槽通常限定与第一极性类型相反的第二极性类型的阱区。 欧姆接触层形成在沟槽的底表面内，欧姆接触层包括第二极性类型的材料。 在漂移层，沟槽的侧壁表面和欧姆接触层上外延生长第二极性类型的层。 第一极性类型的层在第二极性类型的外延生长层上外延生长，以便重新填充沟槽，并且将第一和第二极性类型的外延生长层平坦化，以暴露出第二极性类型的上表面 漂移层基板。

公开(公告)号：US20120153362A1

公开(公告)日：2012-06-21

申请号：US12971188

申请日：2010-12-17

申请人： Zachary Matthew Stum ,  Stephen Daley Arthur ,  Kevin Sean Matocha ,  Peter Almern Losee

发明人： Zachary Matthew Stum ,  Stephen Daley Arthur ,  Kevin Sean Matocha ,  Peter Almern Losee

IPC分类号： H01L29/772 ,  H01L21/265

CPC分类号： H01L29/36 ,  H01L21/046 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/7816 ,  H01L29/7827

摘要： A method comprising, introducing a dopant type into a semiconductor layer to define a well region of the semiconductor layer, the well region comprising a channel region, and introducing a dopant type into the well region to define a multiple implant region substantially coinciding with the well region but excluding the channel region.

摘要翻译： 一种方法，包括：将掺杂剂类型引入到半导体层中以限定所述半导体层的阱区，所述阱区包括沟道区，并且将掺杂剂类型引入所述阱区以限定与所述阱大致重合的多个注入区 但不包括渠道区域。

公开(公告)号：US07829402B2

公开(公告)日：2010-11-09

申请号：US12368498

申请日：2009-02-10

申请人： Kevin Sean Matocha ,  Stephen Daley Arthur ,  Ramakrishna Rao ,  Peter Almern Losee ,  Zachary Matthew Stum

发明人： Kevin Sean Matocha ,  Stephen Daley Arthur ,  Ramakrishna Rao ,  Peter Almern Losee ,  Zachary Matthew Stum

IPC分类号： H01L21/336 ,  H01L21/8234

CPC分类号： H01L29/7802 ,  H01L21/0465 ,  H01L29/0615 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/66068 ,  H01L29/66727

摘要： A MOSFET device and a method for fabricating MOSFET devices are disclosed. The method includes providing a semiconductor device structure including a semiconductor device layer of a first conductivity type, and ion implanting a well structure of a second conductivity type in the semiconductor device layer, where the ion implanting includes providing a dopant concentration profile in a single mask implant sequence.

摘要翻译： 公开了MOSFET器件和用于制造MOSFET器件的方法。 该方法包括提供包括第一导电类型的半导体器件层和在半导体器件层中离子注入第二导电类型的阱结构的半导体器件结构，其中离子注入包括在单个掩模中提供掺杂剂浓度分布 植入序列。

公开(公告)号：US20090267141A1

公开(公告)日：2009-10-29

申请号：US12498630

申请日：2009-07-07

申请人： Kevin Sean Matocha ,  Jody Alan Fronheiser ,  Larry Burton Rowland ,  Jesse Berkley Tucker ,  Stephen Daley Arthur ,  Zachary Matthew Stum

发明人： Kevin Sean Matocha ,  Jody Alan Fronheiser ,  Larry Burton Rowland ,  Jesse Berkley Tucker ,  Stephen Daley Arthur ,  Zachary Matthew Stum

IPC分类号： H01L29/78 ,  H01L21/22

CPC分类号： H01L29/7802 ,  H01L29/0634 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/41766 ,  H01L29/66068

摘要： A method of forming a vertical MOSFET device includes forming a trench within a drift layer substrate, the drift layer comprising a first polarity type, the trench generally defining a well region of a second polarity type opposite the first polarity type. An ohmic contact layer is formed within a bottom surface of the trench, the ohmic contact layer comprising a material of the second polarity type. A layer of the second polarity type is epitaxially grown over the drift layer, sidewall surfaces of the trench, and the ohmic contact layer. A layer of the first polarity type is epitaxially grown over the epitaxially grown layer of the second polarity type so as to refill the trench, and the epitaxially grown layers of the first and second polarity type are planarized so as to expose an upper surface of the drift layer substrate.

摘要翻译： 形成垂直MOSFET器件的方法包括在漂移层衬底内形成沟槽，漂移层包括第一极性类型，沟槽通常限定与第一极性类型相反的第二极性类型的阱区。 欧姆接触层形成在沟槽的底表面内，欧姆接触层包括第二极性类型的材料。 在漂移层，沟槽的侧壁表面和欧姆接触层上外延生长第二极性类型的层。 第一极性类型的层在第二极性类型的外延生长层上外延生长，以便重新填充沟槽，并且将第一和第二极性类型的外延生长层平坦化，以暴露出第二极性类型的上表面 漂移层基板。

公开(公告)号：US20090242901A1

公开(公告)日：2009-10-01

申请号：US12483469

申请日：2009-06-12

申请人： Kevin Sean Matocha ,  Gregory Keith Dudoff ,  William Gregg Hawkins ,  Zachary Matthew Stum ,  Stephen Daley Arthur ,  Dale Marius Brown

发明人： Kevin Sean Matocha ,  Gregory Keith Dudoff ,  William Gregg Hawkins ,  Zachary Matthew Stum ,  Stephen Daley Arthur ,  Dale Marius Brown

IPC分类号： H01L29/24 ,  H01L21/285 ,  H01L29/772

CPC分类号： H01L29/4975 ,  H01L21/0465 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/7827 ,  H01L29/872

摘要： The present invention provides a method of fabricating a metal oxide semiconductor field effect transistor. The method includes the steps of forming a source region on a silicon carbide layer and annealing the source region. A gate oxide layer is formed on the source region and the silicon carbide layer. The method further includes providing a gate electrode on the gate oxide layer and disposing a dielectric layer on the gate electrode and the gate oxide layer. The method further includes etching a portion of the dielectric layer and a portion of the gate oxide layer to form sidewalls on the gate electrode. A metal layer is disposed on the gate electrode, the sidewalls and the source region. The method further includes forming a gate contact and a source contact by subjecting the metal layer to a temperature of at least about 800° C. The gate contact and the source contact comprise a metal silicide. The distance between the gate contact and the source contact is less than about 0.6 μm. A vertical SiC MOSFET is also provided.

摘要翻译： 本发明提供一种制造金属氧化物半导体场效应晶体管的方法。 该方法包括以下步骤：在碳化硅层上形成源极区域并退火源极区域。 在源区和碳化硅层上形成栅氧化层。 该方法还包括在栅极氧化物层上设置栅电极，并在栅电极和栅极氧化物层上设置电介质层。 该方法还包括蚀刻介电层的一部分和栅极氧化物层的一部分以在栅电极上形成侧壁。 金属层设置在栅电极，侧壁和源极区上。 该方法还包括通过使金属层经受至少约800℃的温度来形成栅极接触和源极接触。栅极接触和源极接触包括金属硅化物。 栅极触点与源极之间的距离小于0.6μm。 还提供了一个垂直的SiC MOSFET。

公开(公告)号：US20080050876A1

公开(公告)日：2008-02-28

申请号：US11466488

申请日：2006-08-23

申请人： Kevin Sean Matocha ,  Jody Alan Fronheiser ,  Larry Burton Rowland ,  Jesse Berkley Tucker ,  Stephen Daley Arthur ,  Zachary Matthew Stum

发明人： Kevin Sean Matocha ,  Jody Alan Fronheiser ,  Larry Burton Rowland ,  Jesse Berkley Tucker ,  Stephen Daley Arthur ,  Zachary Matthew Stum

IPC分类号： H01L21/336

CPC分类号： H01L29/7802 ,  H01L29/0634 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/41766 ,  H01L29/66068

摘要： A method of forming a vertical MOSFET device includes forming a trench within a drift layer substrate, the drift layer comprising a first polarity type, the trench generally defining a well region of a second polarity type opposite the first polarity type. An ohmic contact layer is formed within a bottom surface of the trench, the ohmic contact layer comprising a material of the second polarity type. A layer of the second polarity type is epitaxially grown over the drift layer, sidewall surfaces of the trench, and the ohmic contact layer. A layer of the first polarity type is epitaxially grown over the epitaxially grown layer of the second polarity type so as to refill the trench, and the epitaxially grown layers of the first and second polarity type are planarized so as to expose an upper surface of the drift layer substrate.

摘要翻译： 形成垂直MOSFET器件的方法包括在漂移层衬底内形成沟槽，漂移层包括第一极性类型，沟槽通常限定与第一极性类型相反的第二极性类型的阱区。 欧姆接触层形成在沟槽的底表面内，欧姆接触层包括第二极性类型的材料。 在漂移层，沟槽的侧壁表面和欧姆接触层上外延生长第二极性类型的层。 第一极性类型的层在第二极性类型的外延生长层上外延生长，以便重新填充沟槽，并且将第一和第二极性类型的外延生长层平坦化，以暴露出第二极性类型的上表面 漂移层基板。

公开(公告)号：US08815721B2

公开(公告)日：2014-08-26

申请号：US12971188

申请日：2010-12-17

申请人： Zachary Matthew Stum ,  Stephen Daley Arthur ,  Kevin Sean Matocha ,  Peter Almern Losee

发明人： Zachary Matthew Stum ,  Stephen Daley Arthur ,  Kevin Sean Matocha ,  Peter Almern Losee

IPC分类号： H01L21/425 ,  H01L21/04 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L29/36 ,  H01L21/046 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/7816 ,  H01L29/7827

摘要： A method comprising, introducing a dopant type into a semiconductor layer to define a well region of the semiconductor layer, the well region comprising a channel region, and introducing a dopant type into the well region to define a multiple implant region substantially coinciding with the well region but excluding the channel region.

摘要翻译： 一种方法，包括：将掺杂剂类型引入到半导体层中以限定所述半导体层的阱区，所述阱区包括沟道区，并且将掺杂剂类型引入所述阱区以限定与所述阱大致重合的多个注入区 但不包括渠道区域。

公开(公告)号：US08377812B2

公开(公告)日：2013-02-19

申请号：US12483469

申请日：2009-06-12

申请人： Kevin Sean Matocha ,  Gregory Keith Dudoff ,  William Gregg Hawkins ,  Zachary Matthew Stum ,  Stephen Daley Arthur ,  Dale Marius Brown

发明人： Kevin Sean Matocha ,  Gregory Keith Dudoff ,  William Gregg Hawkins ,  Zachary Matthew Stum ,  Stephen Daley Arthur ,  Dale Marius Brown

IPC分类号： H01L21/28

CPC分类号： H01L29/4975 ,  H01L21/0465 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/7827 ,  H01L29/872

摘要： The present invention provides a method of fabricating a metal oxide semiconductor field effect transistor. The method includes the steps of forming a source region on a silicon carbide layer and annealing the source region. A gate oxide layer is formed on the source region and the silicon carbide layer. The method further includes providing a gate electrode on the gate oxide layer and disposing a dielectric layer on the gate electrode and the gate oxide layer. The method further includes etching a portion of the dielectric layer and a portion of the gate oxide layer to form sidewalls on the gate electrode. A metal layer is disposed on the gate electrode, the sidewalls and the source region. The method further includes forming a gate contact and a source contact by subjecting the metal layer to a temperature of at least about 800° C. The gate contact and the source contact comprise a metal silicide. The distance between the gate contact and the source contact is less than about 0.6 μm. A vertical SiC MOSFET is also provided.

摘要翻译： 本发明提供一种制造金属氧化物半导体场效应晶体管的方法。 该方法包括以下步骤：在碳化硅层上形成源极区域并退火源极区域。 在源区和碳化硅层上形成栅氧化层。 该方法还包括在栅极氧化物层上设置栅电极，并在栅电极和栅极氧化物层上设置电介质层。 该方法还包括蚀刻介电层的一部分和栅极氧化物层的一部分以在栅电极上形成侧壁。 金属层设置在栅电极，侧壁和源极区上。 该方法还包括通过使金属层经受至少约800℃的温度来形成栅极接触和源极接触。栅极接触和源极接触包括金属硅化物。 栅极接触点和源极接触点之间的距离小于约0.6μm。 还提供了一个垂直的SiC MOSFET。