Method for fabricating silicon carbide vertical MOSFET devices
    1.
    发明授权
    Method for fabricating silicon carbide vertical MOSFET devices 有权
    制造碳化硅垂直MOSFET器件的方法

    公开(公告)号:US07595241B2

    公开(公告)日:2009-09-29

    申请号:US11466488

    申请日:2006-08-23

    IPC分类号: H01L21/336

    摘要: A method of forming a vertical MOSFET device includes forming a trench within a drift layer substrate, the drift layer comprising a first polarity type, the trench generally defining a well region of a second polarity type opposite the first polarity type. An ohmic contact layer is formed within a bottom surface of the trench, the ohmic contact layer comprising a material of the second polarity type. A layer of the second polarity type is epitaxially grown over the drift layer, sidewall surfaces of the trench, and the ohmic contact layer. A layer of the first polarity type is epitaxially grown over the epitaxially grown layer of the second polarity type so as to refill the trench, and the epitaxially grown layers of the first and second polarity type are planarized so as to expose an upper surface of the drift layer substrate.

    摘要翻译: 形成垂直MOSFET器件的方法包括在漂移层衬底内形成沟槽,漂移层包括第一极性类型,沟槽通常限定与第一极性类型相反的第二极性类型的阱区。 欧姆接触层形成在沟槽的底表面内,欧姆接触层包括第二极性类型的材料。 在漂移层,沟槽的侧壁表面和欧姆接触层上外延生长第二极性类型的层。 第一极性类型的层在第二极性类型的外延生长层上外延生长,以便重新填充沟槽,并且将第一和第二极性类型的外延生长层平坦化,以暴露出第二极性类型的上表面 漂移层基板。

    OPTICALLY TRIGGERED SEMICONDUCTOR DEVICE AND METHOD FOR MAKING THE SAME
    5.
    发明申请
    OPTICALLY TRIGGERED SEMICONDUCTOR DEVICE AND METHOD FOR MAKING THE SAME 有权
    光学触发式半导体器件及其制造方法

    公开(公告)号:US20130323873A1

    公开(公告)日:2013-12-05

    申请号:US13960971

    申请日:2013-08-07

    IPC分类号: H01L31/111

    摘要: A thyristor device includes a semiconductor body and a conductive anode. The semiconductor body has a plurality of doped layers forming a plurality of dopant junctions and includes an optical thyristor, a first amplifying thyristor, and a switching thyristor. The conductive anode is disposed on a first side of the semiconductor body. The optical thyristor is configured to receive incident radiation to generate a first electric current, and the first amplifying thyristor is configured to increase the first electric current from the optical thyristor to at least a threshold current. The switching thyristor switches to the conducting state in order to conduct a second electric current from the anode and through the semiconductor body.

    摘要翻译: 晶闸管器件包括半导体本体和导电阳极。 半导体本体具有形成多个掺杂剂结的多个掺杂层,并且包括光学晶闸管,第一放大晶闸管和开关晶闸管。 导电阳极设置在半导体本体的第一侧上。 光晶闸管被配置为接收入射辐射以产生第一电流,并且第一放大晶闸管被配置为将来自光晶闸管的第一电流增加到至少阈值电流。 开关晶闸管切换到导通状态,以便从阳极和半导体本体传导第二电流。

    SEMICONDUCTOR DEVICE
    6.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号:US20130221374A1

    公开(公告)日:2013-08-29

    申请号:US13597299

    申请日:2012-08-29

    IPC分类号: H01L29/16

    摘要: A semiconductor device includes a substrate comprising a semiconductor material. The substrate has a surface that defines a surface normal direction and includes a P-N junction comprising an interface between a first region and a second region, where the first (second) region includes a first (second) dopant type, so as to have a first (second) conductivity type. The substrate includes a termination extension region disposed adjacent to the P-N junction and having an effective concentration of the second dopant type that is generally the effective concentration of the second dopant type in the second doped region. The substrate includes an adjust region disposed adjacent to the surface and between the surface and at least part of the termination extension region, where the effective concentration of the second dopant type generally decreases when moving from the termination extension region into the adjust region along the surface normal direction.

    摘要翻译: 半导体器件包括包含半导体材料的衬底。 衬底具有限定表面法线方向的表面,并且包括PN结,其包括在第一区域和第二区域之间的界面,其中第一(第二)区域包括第一(第二)掺杂剂类型,以便具有第一 (第二)导电类型。 衬底包括邻近P-N结设置并且具有通常为第二掺杂区域中的第二掺杂剂类型的有效浓度的第二掺杂剂类型的有效浓度的终止延伸区域。 衬底包括与表面相邻并且在表面与终止延伸区域的至少一部分之间布置的调节区域,其中当从端接延伸区域沿着表面移动到调节区域中时,第二掺杂剂类型的有效浓度通常降低 正常方向

    Silicon-carbide MOSFET cell structure and method for forming same
    7.
    发明授权
    Silicon-carbide MOSFET cell structure and method for forming same 有权
    碳化硅MOSFET单元结构及其形成方法

    公开(公告)号:US08377756B1

    公开(公告)日:2013-02-19

    申请号:US13190723

    申请日:2011-07-26

    IPC分类号: H01L29/10 H01L29/76

    摘要: In one embodiment, the invention comprises a MOSFET comprising individual MOSFET cells. Each cell comprises a U-shaped well (228) (P type) and two parallel sources (260) (N type) formed within the well. A plurality of source rungs (262) (doped N) connect sources (260) at multiple locations. Regions between two rungs (262) comprise a body (252) (P type). These features are formed on an N-type epitaxial layer (220), which is formed on an N-type substrate (216). A contact (290) extends across and contacts a plurality of source rungs (262) and bodies (252). Gate oxide and a gate contact overlie a leg of a first well and a leg of a second adjacent well, inverting the conductivity responsive to a gate voltage. A MOSFET comprises a plurality of these cells to attain a desired low channel resistance. The cell regions are formed using self-alignment techniques at several states of the fabrication process.

    摘要翻译: 在一个实施例中,本发明包括一个包含单个MOSFET单元的MOSFET。 每个单元包括形成在孔内的U形孔(228)(P型)和两个平行源(260)(N型)。 多个源极(262)(掺杂N)在多个位置连接源极(260)。 两个梯级(262)之间的区域包括主体(252)(P型)。 这些特征形成在形成在N型衬底(216)上的N型外延层(220)上。 接触件(290)跨越并接触多个源极(262)和主体(252)。 栅极氧化物和栅极接触覆盖第一阱的支腿和第二相邻阱的支路,响应于栅极电压而反转导电性。 MOSFET包括多个这些单元以获得期望的低通道电阻。 在制造过程的几个状态下使用自对准技术形成单元区域。